fixup_pci.c (53b8229e979b68273537e4754f57d68ff0b81d41) | fixup_pci.c (bb0d0a8efc748ae3a7a6f639d373bac067cf8ba1) |
---|---|
1/*- 2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000 BSDi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 12 unchanged lines hidden (view full) --- 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. | 1/*- 2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000 BSDi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 12 unchanged lines hidden (view full) --- 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. |
29 * 30 * $FreeBSD$ |
|
29 */ 30 | 31 */ 32 |
31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD$"); 33 | |
34#include <sys/param.h> | 33#include <sys/param.h> |
35#include <sys/kernel.h> 36#include <sys/malloc.h> 37#include <sys/module.h> | |
38#include <sys/systm.h> | 34#include <sys/systm.h> |
35#include <sys/malloc.h> 36#include <sys/kernel.h> |
|
39#include <sys/bus.h> 40 | 37#include <sys/bus.h> 38 |
41#include <dev/pci/pcivar.h> 42#include <dev/pci/pcireg.h> | 39#include <pci/pcivar.h> 40#include <pci/pcireg.h> |
43 44/* 45 * Chipset fixups. 46 * 47 * These routines are invoked during the probe phase for devices which 48 * typically don't have specific device drivers, but which require 49 * some cleaning up. 50 */ 51 52static int fixup_pci_probe(device_t dev); | 41 42/* 43 * Chipset fixups. 44 * 45 * These routines are invoked during the probe phase for devices which 46 * typically don't have specific device drivers, but which require 47 * some cleaning up. 48 */ 49 50static int fixup_pci_probe(device_t dev); |
51static void fixbushigh_i1225(device_t dev); |
|
53static void fixwsc_natoma(device_t dev); | 52static void fixwsc_natoma(device_t dev); |
54static void fixc1_nforce2(device_t dev); | |
55 56static device_method_t fixup_pci_methods[] = { 57 /* Device interface */ 58 DEVMETHOD(device_probe, fixup_pci_probe), 59 DEVMETHOD(device_attach, bus_generic_attach), 60 { 0, 0 } 61}; 62 --- 6 unchanged lines hidden (view full) --- 69static devclass_t fixup_pci_devclass; 70 71DRIVER_MODULE(fixup_pci, pci, fixup_pci_driver, fixup_pci_devclass, 0, 0); 72 73static int 74fixup_pci_probe(device_t dev) 75{ 76 switch (pci_get_devid(dev)) { | 53 54static device_method_t fixup_pci_methods[] = { 55 /* Device interface */ 56 DEVMETHOD(device_probe, fixup_pci_probe), 57 DEVMETHOD(device_attach, bus_generic_attach), 58 { 0, 0 } 59}; 60 --- 6 unchanged lines hidden (view full) --- 67static devclass_t fixup_pci_devclass; 68 69DRIVER_MODULE(fixup_pci, pci, fixup_pci_driver, fixup_pci_devclass, 0, 0); 70 71static int 72fixup_pci_probe(device_t dev) 73{ 74 switch (pci_get_devid(dev)) { |
75 case 0x12258086: /* Intel 82454KX/GX (Orion) */ 76 fixbushigh_i1225(dev); 77 break; |
|
77 case 0x12378086: /* Intel 82440FX (Natoma) */ 78 fixwsc_natoma(dev); 79 break; | 78 case 0x12378086: /* Intel 82440FX (Natoma) */ 79 fixwsc_natoma(dev); 80 break; |
80 case 0x01e010de: /* nVidia nForce2 */ 81 fixc1_nforce2(dev); 82 break; | |
83 } 84 return(ENXIO); 85} 86 87static void | 81 } 82 return(ENXIO); 83} 84 85static void |
86fixbushigh_i1225(device_t dev) 87{ 88 int supbus; 89 90 supbus = pci_read_config(dev, 0x41, 1); 91 if (supbus != 0xff) { 92 pci_set_secondarybus(dev, supbus + 1); 93 pci_set_subordinatebus(dev, supbus + 1); 94 } 95} 96 97static void |
|
88fixwsc_natoma(device_t dev) 89{ 90 int pmccfg; 91 92 pmccfg = pci_read_config(dev, 0x50, 2); 93#if defined(SMP) 94 if (pmccfg & 0x8000) { 95 printf("Correcting Natoma config for SMP\n"); 96 pmccfg &= ~0x8000; | 98fixwsc_natoma(device_t dev) 99{ 100 int pmccfg; 101 102 pmccfg = pci_read_config(dev, 0x50, 2); 103#if defined(SMP) 104 if (pmccfg & 0x8000) { 105 printf("Correcting Natoma config for SMP\n"); 106 pmccfg &= ~0x8000; |
97 pci_write_config(dev, 0x50, pmccfg, 2); | 107 pci_write_config(dev, 0x50, 2, pmccfg); |
98 } 99#else 100 if ((pmccfg & 0x8000) == 0) { 101 printf("Correcting Natoma config for non-SMP\n"); 102 pmccfg |= 0x8000; | 108 } 109#else 110 if ((pmccfg & 0x8000) == 0) { 111 printf("Correcting Natoma config for non-SMP\n"); 112 pmccfg |= 0x8000; |
103 pci_write_config(dev, 0x50, pmccfg, 2); | 113 pci_write_config(dev, 0x50, 2, pmccfg); |
104 } 105#endif 106} | 114 } 115#endif 116} |
107 108/* 109 * Set the SYSTEM_IDLE_TIMEOUT to 80 ns on nForce2 systems to work 110 * around a hang that is triggered when the CPU generates a very fast 111 * CONNECT/HALT cycle sequence. Specifically, the hang can result in 112 * the lapic timer being stopped. 113 * 114 * This requires changing the value for config register at offset 0x6c 115 * for the Host-PCI bridge at bus/dev/function 0/0/0: 116 * 117 * Chip Current Value New Value 118 * ---- ---------- ---------- 119 * C17 0x1F0FFF01 0x1F01FF01 120 * C18D 0x9F0FFF01 0x9F01FF01 121 * 122 * We do this by always clearing the bits in 0x000e0000. 123 * 124 * See also: http://lkml.org/lkml/2004/5/3/157 125 */ 126static void 127fixc1_nforce2(device_t dev) 128{ 129 uint32_t val; 130 131 if (pci_get_bus(dev) == 0 && pci_get_slot(dev) == 0 && 132 pci_get_function(dev) == 0) { 133 val = pci_read_config(dev, 0x6c, 4); 134 if (val & 0x000e0000) { 135 printf("Correcting nForce2 C1 CPU disconnect hangs\n"); 136 val &= ~0x000e0000; 137 pci_write_config(dev, 0x6c, val, 4); 138 } 139 } 140} | |