pccbb_pci.c (f86e60008bdf690b61af2c18e98ee791ca91433f) pccbb_pci.c (7b9439d081b3a861ab6af2fc94e897c31c61d6ab)
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2000-2001 Jonathan Chen All rights reserved.
5 * Copyright (c) 2002-2004 M. Warner Losh <imp@FreeBSD.org>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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289 int rid;
290 device_t parent;
291
292 parent = device_get_parent(brdev);
293 mtx_init(&sc->mtx, device_get_nameunit(brdev), "cbb", MTX_DEF);
294 sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL);
295 sc->dev = brdev;
296 sc->cbdev = NULL;
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2000-2001 Jonathan Chen All rights reserved.
5 * Copyright (c) 2002-2004 M. Warner Losh <imp@FreeBSD.org>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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289 int rid;
290 device_t parent;
291
292 parent = device_get_parent(brdev);
293 mtx_init(&sc->mtx, device_get_nameunit(brdev), "cbb", MTX_DEF);
294 sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL);
295 sc->dev = brdev;
296 sc->cbdev = NULL;
297 sc->exca[0].pccarddev = NULL;
298 sc->domain = pci_get_domain(brdev);
299 sc->pribus = pcib_get_bus(parent);
300#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
301 pci_write_config(brdev, PCIR_PRIBUS_2, sc->pribus, 1);
302 pcib_setup_secbus(brdev, &sc->bus, 1);
303#else
304 sc->bus.sec = pci_read_config(brdev, PCIR_SECBUS_2, 1);
305 sc->bus.sub = pci_read_config(brdev, PCIR_SUBBUS_2, 1);

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315 return (ENOMEM);
316 } else {
317 DEVPRINTF((brdev, "Found memory at %jx\n",
318 rman_get_start(sc->base_res)));
319 }
320
321 sc->bst = rman_get_bustag(sc->base_res);
322 sc->bsh = rman_get_bushandle(sc->base_res);
297 sc->domain = pci_get_domain(brdev);
298 sc->pribus = pcib_get_bus(parent);
299#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
300 pci_write_config(brdev, PCIR_PRIBUS_2, sc->pribus, 1);
301 pcib_setup_secbus(brdev, &sc->bus, 1);
302#else
303 sc->bus.sec = pci_read_config(brdev, PCIR_SECBUS_2, 1);
304 sc->bus.sub = pci_read_config(brdev, PCIR_SUBBUS_2, 1);

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314 return (ENOMEM);
315 } else {
316 DEVPRINTF((brdev, "Found memory at %jx\n",
317 rman_get_start(sc->base_res)));
318 }
319
320 sc->bst = rman_get_bustag(sc->base_res);
321 sc->bsh = rman_get_bushandle(sc->base_res);
323 exca_init(&sc->exca[0], brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET);
324 sc->exca[0].flags |= EXCA_HAS_MEMREG_WIN;
325 sc->exca[0].chipset = EXCA_CARDBUS;
322 exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET);
323 sc->exca.flags |= EXCA_HAS_MEMREG_WIN;
324 sc->exca.chipset = EXCA_CARDBUS;
326 sc->chipinit = cbb_chipinit;
327 sc->chipinit(sc);
328
329 /*Sysctls*/
330 sctx = device_get_sysctl_ctx(brdev);
331 soid = device_get_sysctl_tree(brdev);
332 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
333 CTLFLAG_RD, &sc->domain, 0, "Domain number");

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376
377 /* attach children */
378 sc->cbdev = device_add_child(brdev, "cardbus", -1);
379 if (sc->cbdev == NULL)
380 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
381 else if (device_probe_and_attach(sc->cbdev) != 0)
382 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));
383
325 sc->chipinit = cbb_chipinit;
326 sc->chipinit(sc);
327
328 /*Sysctls*/
329 sctx = device_get_sysctl_ctx(brdev);
330 soid = device_get_sysctl_tree(brdev);
331 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
332 CTLFLAG_RD, &sc->domain, 0, "Domain number");

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375
376 /* attach children */
377 sc->cbdev = device_add_child(brdev, "cardbus", -1);
378 if (sc->cbdev == NULL)
379 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
380 else if (device_probe_and_attach(sc->cbdev) != 0)
381 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));
382
384 sc->exca[0].pccarddev = device_add_child(brdev, "pccard", -1);
385 if (sc->exca[0].pccarddev == NULL)
383 sc->exca.pccarddev = device_add_child(brdev, "pccard", -1);
384 if (sc->exca.pccarddev == NULL)
386 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n"));
385 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n"));
387 else if (device_probe_and_attach(sc->exca[0].pccarddev) != 0)
386 else if (device_probe_and_attach(sc->exca.pccarddev) != 0)
388 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n"));
389
390 /* Map and establish the interrupt. */
391 rid = 0;
392 sc->irq_res = bus_alloc_resource_any(brdev, SYS_RES_IRQ, &rid,
393 RF_SHAREABLE | RF_ACTIVE);
394 if (sc->irq_res == NULL) {
395 device_printf(brdev, "Unable to map IRQ...\n");
396 goto err;
397 }
398
399 if (bus_setup_intr(brdev, sc->irq_res, INTR_TYPE_AV | INTR_MPSAFE,
400 cbb_pci_filt, NULL, sc, &sc->intrhand)) {
401 device_printf(brdev, "couldn't establish interrupt\n");
402 goto err;
403 }
404
405 /* reset 16-bit pcmcia bus */
387 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n"));
388
389 /* Map and establish the interrupt. */
390 rid = 0;
391 sc->irq_res = bus_alloc_resource_any(brdev, SYS_RES_IRQ, &rid,
392 RF_SHAREABLE | RF_ACTIVE);
393 if (sc->irq_res == NULL) {
394 device_printf(brdev, "Unable to map IRQ...\n");
395 goto err;
396 }
397
398 if (bus_setup_intr(brdev, sc->irq_res, INTR_TYPE_AV | INTR_MPSAFE,
399 cbb_pci_filt, NULL, sc, &sc->intrhand)) {
400 device_printf(brdev, "couldn't establish interrupt\n");
401 goto err;
402 }
403
404 /* reset 16-bit pcmcia bus */
406 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET);
405 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
407
408 /* turn off power */
409 cbb_power(brdev, CARD_OFF);
410
411 /* CSC Interrupt: Card detect interrupt on */
412 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
413
414 /* reset interrupt */

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575 * register (of each slot) to '1010xxxxb' a routing of
576 * IREQ# to INTC# and STSCHG# to INTC# is selected.
577 * Since INTC# isn't connected there will be no
578 * unexpected PCI INT when IREQ# or STSCHG# is active.
579 * However, INTA# (slot 0) or INTB# (slot 1) will
580 * still be correctly generated if NO ISA IRQ is
581 * selected (ExCA regs 03h or 05h are cleared).
582 */
406
407 /* turn off power */
408 cbb_power(brdev, CARD_OFF);
409
410 /* CSC Interrupt: Card detect interrupt on */
411 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
412
413 /* reset interrupt */

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574 * register (of each slot) to '1010xxxxb' a routing of
575 * IREQ# to INTC# and STSCHG# to INTC# is selected.
576 * Since INTC# isn't connected there will be no
577 * unexpected PCI INT when IREQ# or STSCHG# is active.
578 * However, INTA# (slot 0) or INTB# (slot 1) will
579 * still be correctly generated if NO ISA IRQ is
580 * selected (ExCA regs 03h or 05h are cleared).
581 */
583 reg = exca_getb(&sc->exca[0], EXCA_O2MICRO_CTRL_C);
582 reg = exca_getb(&sc->exca, EXCA_O2MICRO_CTRL_C);
584 reg = (reg & 0x0f) |
585 EXCA_O2CC_IREQ_INTC | EXCA_O2CC_STSCHG_INTC;
583 reg = (reg & 0x0f) |
584 EXCA_O2CC_IREQ_INTC | EXCA_O2CC_STSCHG_INTC;
586 exca_putb(&sc->exca[0], EXCA_O2MICRO_CTRL_C, reg);
585 exca_putb(&sc->exca, EXCA_O2MICRO_CTRL_C, reg);
587 break;
588 case CB_TOPIC97:
589 /*
590 * Disable Zoom Video, ToPIC 97, 100.
591 */
592 pci_write_config(sc->dev, TOPIC97_ZV_CONTROL, 0, 1);
593 /*
594 * ToPIC 97, 100
595 * At offset 0xa1: INTERRUPT CONTROL register
596 * 0x1: Turn on INT interrupts.
597 */
598 PCI_MASK_CONFIG(sc->dev, TOPIC_INTCTRL,
599 | TOPIC97_INTCTRL_INTIRQSEL, 1);
600 /*
601 * ToPIC97, 100
602 * Need to assert support for low voltage cards
603 */
586 break;
587 case CB_TOPIC97:
588 /*
589 * Disable Zoom Video, ToPIC 97, 100.
590 */
591 pci_write_config(sc->dev, TOPIC97_ZV_CONTROL, 0, 1);
592 /*
593 * ToPIC 97, 100
594 * At offset 0xa1: INTERRUPT CONTROL register
595 * 0x1: Turn on INT interrupts.
596 */
597 PCI_MASK_CONFIG(sc->dev, TOPIC_INTCTRL,
598 | TOPIC97_INTCTRL_INTIRQSEL, 1);
599 /*
600 * ToPIC97, 100
601 * Need to assert support for low voltage cards
602 */
604 exca_setb(&sc->exca[0], EXCA_TOPIC97_CTRL,
603 exca_setb(&sc->exca, EXCA_TOPIC97_CTRL,
605 EXCA_TOPIC97_CTRL_LV_MASK);
606 goto topic_common;
607 case CB_TOPIC95:
608 /*
609 * SOCKETCTRL appears to be TOPIC 95/B specific
610 */
611 PCI_MASK_CONFIG(sc->dev, TOPIC95_SOCKETCTRL,
612 | TOPIC95_SOCKETCTRL_SCR_IRQSEL, 4);

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639 }
640
641 /*
642 * Need to tell ExCA registers to CSC interrupts route via PCI
643 * interrupts. There are two ways to do this. One is to set
644 * INTR_ENABLE and the other is to set CSC to 0. Since both
645 * methods are mutually compatible, we do both.
646 */
604 EXCA_TOPIC97_CTRL_LV_MASK);
605 goto topic_common;
606 case CB_TOPIC95:
607 /*
608 * SOCKETCTRL appears to be TOPIC 95/B specific
609 */
610 PCI_MASK_CONFIG(sc->dev, TOPIC95_SOCKETCTRL,
611 | TOPIC95_SOCKETCTRL_SCR_IRQSEL, 4);

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638 }
639
640 /*
641 * Need to tell ExCA registers to CSC interrupts route via PCI
642 * interrupts. There are two ways to do this. One is to set
643 * INTR_ENABLE and the other is to set CSC to 0. Since both
644 * methods are mutually compatible, we do both.
645 */
647 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE);
648 exca_putb(&sc->exca[0], EXCA_CSC_INTR, 0);
646 exca_putb(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE);
647 exca_putb(&sc->exca, EXCA_CSC_INTR, 0);
649
650 cbb_disable_func_intr(sc);
651
652 /* close all memory and io windows */
653 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4);
654 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4);
655 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4);
656 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4);

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679 */
680 sc->cardok = 0;
681
682 /*
683 * Place the cards in reset, turn off the interrupts and power
684 * down the socket.
685 */
686 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
648
649 cbb_disable_func_intr(sc);
650
651 /* close all memory and io windows */
652 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4);
653 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4);
654 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4);
655 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4);

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678 */
679 sc->cardok = 0;
680
681 /*
682 * Place the cards in reset, turn off the interrupts and power
683 * down the socket.
684 */
685 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
687 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET);
686 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
688 cbb_set(sc, CBB_SOCKET_MASK, 0);
689 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff);
690 cbb_power(brdev, CARD_OFF);
691
692 /*
693 * For paranoia, turn off all address decoding. Really not needed,
694 * it seems, but it can't hurt
695 */
687 cbb_set(sc, CBB_SOCKET_MASK, 0);
688 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff);
689 cbb_power(brdev, CARD_OFF);
690
691 /*
692 * For paranoia, turn off all address decoding. Really not needed,
693 * it seems, but it can't hurt
694 */
696 exca_putb(&sc->exca[0], EXCA_ADDRWIN_ENABLE, 0);
695 exca_putb(&sc->exca, EXCA_ADDRWIN_ENABLE, 0);
697 pci_write_config(brdev, CBBR_MEMBASE0, 0, 4);
698 pci_write_config(brdev, CBBR_MEMLIMIT0, 0, 4);
699 pci_write_config(brdev, CBBR_MEMBASE1, 0, 4);
700 pci_write_config(brdev, CBBR_MEMLIMIT1, 0, 4);
701 pci_write_config(brdev, CBBR_IOBASE0, 0, 4);
702 pci_write_config(brdev, CBBR_IOLIMIT0, 0, 4);
703 pci_write_config(brdev, CBBR_IOBASE1, 0, 4);
704 pci_write_config(brdev, CBBR_IOLIMIT1, 0, 4);

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728 * the interrupt if READY is set. If this still causes problems, then
729 * the next step would be to read this if we have a 16-bit card *OR*
730 * we have no card. We treat the READY signal as if it were the power
731 * completion signal. Some bridges may double signal things here, bit
732 * signalling twice should be OK since we only sleep on the powerintr
733 * in one place and a double wakeup would be benign there.
734 */
735 if (sc->flags & CBB_16BIT_CARD) {
696 pci_write_config(brdev, CBBR_MEMBASE0, 0, 4);
697 pci_write_config(brdev, CBBR_MEMLIMIT0, 0, 4);
698 pci_write_config(brdev, CBBR_MEMBASE1, 0, 4);
699 pci_write_config(brdev, CBBR_MEMLIMIT1, 0, 4);
700 pci_write_config(brdev, CBBR_IOBASE0, 0, 4);
701 pci_write_config(brdev, CBBR_IOLIMIT0, 0, 4);
702 pci_write_config(brdev, CBBR_IOBASE1, 0, 4);
703 pci_write_config(brdev, CBBR_IOLIMIT1, 0, 4);

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727 * the interrupt if READY is set. If this still causes problems, then
728 * the next step would be to read this if we have a 16-bit card *OR*
729 * we have no card. We treat the READY signal as if it were the power
730 * completion signal. Some bridges may double signal things here, bit
731 * signalling twice should be OK since we only sleep on the powerintr
732 * in one place and a double wakeup would be benign there.
733 */
734 if (sc->flags & CBB_16BIT_CARD) {
736 csc = exca_getb(&sc->exca[0], EXCA_CSC);
735 csc = exca_getb(&sc->exca, EXCA_CSC);
737 if (csc & EXCA_CSC_READY) {
738 atomic_add_int(&sc->powerintr, 1);
739 wakeup((void *)&sc->powerintr);
740 retval = FILTER_HANDLED;
741 }
742 }
743
744 /*

--- 243 unchanged lines hidden --- 		736 if (csc & EXCA_CSC_READY) {
737 atomic_add_int(&sc->powerintr, 1);
738 wakeup((void *)&sc->powerintr);
739 retval = FILTER_HANDLED;
740 }
741 }
742
743 /*

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