nctgpio.c (8e6ea10c31220b5f56dbd966a0ee7163d46d30d1) nctgpio.c (f03a7e52769e7d5cf706021d4b21953e5bd945a4)
1/*-
2 * Copyright (c) 2016 Daniel Wyatt <Daniel.Wyatt@gmail.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 1186 unchanged lines hidden (view full) ---

1195 }
1196
1197 GPIO_LOCK_INIT(sc);
1198 GPIO_LOCK(sc);
1199
1200 pin_num = 0;
1201 sc->npins = 0;
1202 for (g = 0, gp = sc->nctdevp->groups; g < sc->nctdevp->ngroups; g++, gp++) {
1/*-
2 * Copyright (c) 2016 Daniel Wyatt <Daniel.Wyatt@gmail.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 1186 unchanged lines hidden (view full) ---

1195 }
1196
1197 GPIO_LOCK_INIT(sc);
1198 GPIO_LOCK(sc);
1199
1200 pin_num = 0;
1201 sc->npins = 0;
1202 for (g = 0, gp = sc->nctdevp->groups; g < sc->nctdevp->ngroups; g++, gp++) {
1203
1204 sc->grpmap[gp->grpnum] = gp;
1205
1206 /*
1207 * Caching input values is meaningless as an input can be changed at any
1208 * time by an external agent. But outputs are controlled by this
1209 * driver, so it can cache their state. Also, the hardware remembers
1210 * the output state of a pin when the pin is switched to input mode and
1211 * then back to output mode. So, the cache stays valid.
1212 * The only problem is with pins that are in input mode at the attach
1213 * time. For them the output state is not known until it is set by the
1214 * driver for the first time.
1215 * 'out' and 'out_known' bits form a tri-state output cache:
1216 * |-----+-----------+---------|
1217 * | out | out_known | cache |
1218 * |-----+-----------+---------|
1219 * | X | 0 | invalid |
1220 * | 0 | 1 | 0 |
1221 * | 1 | 1 | 1 |
1222 * |-----+-----------+---------|
1223 */
1224 sc->cache.inv[gp->grpnum] = nct_read_reg(sc, REG_INV, gp->grpnum);
1225 sc->cache.ior[gp->grpnum] = nct_read_reg(sc, REG_IOR, gp->grpnum);
1226 sc->cache.out[gp->grpnum] = nct_read_reg(sc, REG_DAT, gp->grpnum);
1227 sc->cache.out_known[gp->grpnum] = ~sc->cache.ior[gp->grpnum];
1228
1203 sc->npins += gp->npins;
1204 for (i = 0; i < gp->npins; i++, pin_num++) {
1205 struct gpio_pin *pin;
1206
1207 sc->pinmap[pin_num].group = gp;
1208 sc->pinmap[pin_num].grpnum = gp->grpnum;
1209 sc->pinmap[pin_num].bit = gp->pinbits[i];
1210
1229 sc->npins += gp->npins;
1230 for (i = 0; i < gp->npins; i++, pin_num++) {
1231 struct gpio_pin *pin;
1232
1233 sc->pinmap[pin_num].group = gp;
1234 sc->pinmap[pin_num].grpnum = gp->grpnum;
1235 sc->pinmap[pin_num].bit = gp->pinbits[i];
1236
1211 sc->grpmap[gp->grpnum] = gp;
1212
1213 pin = &sc->pins[pin_num];
1214 pin->gp_pin = pin_num;
1215 pin->gp_caps = gp->caps;
1216 pin->gp_flags = 0;
1217
1218 snprintf(pin->gp_name, GPIOMAXNAME, "GPIO%u%u",
1219 gp->grpnum, gp->pinbits[i]);
1220

--- 8 unchanged lines hidden (view full) ---

1229 pin->gp_flags |= GPIO_PIN_PUSHPULL;
1230
1231 if (nct_pin_is_inverted(sc, pin_num))
1232 pin->gp_flags |= (GPIO_PIN_INVIN | GPIO_PIN_INVOUT);
1233 }
1234 }
1235 NCT_VERBOSE_PRINTF(dev, "%d pins available\n", sc->npins);
1236
1237 pin = &sc->pins[pin_num];
1238 pin->gp_pin = pin_num;
1239 pin->gp_caps = gp->caps;
1240 pin->gp_flags = 0;
1241
1242 snprintf(pin->gp_name, GPIOMAXNAME, "GPIO%u%u",
1243 gp->grpnum, gp->pinbits[i]);
1244

--- 8 unchanged lines hidden (view full) ---

1253 pin->gp_flags |= GPIO_PIN_PUSHPULL;
1254
1255 if (nct_pin_is_inverted(sc, pin_num))
1256 pin->gp_flags |= (GPIO_PIN_INVIN | GPIO_PIN_INVOUT);
1257 }
1258 }
1259 NCT_VERBOSE_PRINTF(dev, "%d pins available\n", sc->npins);
1260
1237 /*
1238 * Caching input values is meaningless as an input can be changed at any
1239 * time by an external agent. But outputs are controlled by this
1240 * driver, so it can cache their state. Also, the hardware remembers
1241 * the output state of a pin when the pin is switched to input mode and
1242 * then back to output mode. So, the cache stays valid.
1243 * The only problem is with pins that are in input mode at the attach
1244 * time. For them the output state is not known until it is set by the
1245 * driver for the first time.
1246 * 'out' and 'out_known' bits form a tri-state output cache:
1247 * |-----+-----------+---------|
1248 * | out | out_known | cache |
1249 * |-----+-----------+---------|
1250 * | X | 0 | invalid |
1251 * | 0 | 1 | 0 |
1252 * | 1 | 1 | 1 |
1253 * |-----+-----------+---------|
1254 */
1255 for (g = 0, gp = sc->nctdevp->groups; g < sc->nctdevp->ngroups; g++, gp++) {
1256 sc->cache.inv[gp->grpnum] = nct_read_reg(sc, REG_INV, gp->grpnum);
1257 sc->cache.ior[gp->grpnum] = nct_read_reg(sc, REG_IOR, gp->grpnum);
1258 sc->cache.out[gp->grpnum] = nct_read_reg(sc, REG_DAT, gp->grpnum);
1259 sc->cache.out_known[gp->grpnum] = ~sc->cache.ior[gp->grpnum];
1260 }
1261
1262 GPIO_UNLOCK(sc);
1263
1264 sc->busdev = gpiobus_attach_bus(dev);
1265 if (sc->busdev == NULL) {
1266 device_printf(dev, "failed to attach to gpiobus\n");
1267 GPIO_LOCK_DESTROY(sc);
1268 return (ENXIO);
1269 }

--- 251 unchanged lines hidden --- 		1261 GPIO_UNLOCK(sc);
1262
1263 sc->busdev = gpiobus_attach_bus(dev);
1264 if (sc->busdev == NULL) {
1265 device_printf(dev, "failed to attach to gpiobus\n");
1266 GPIO_LOCK_DESTROY(sc);
1267 return (ENXIO);
1268 }

--- 251 unchanged lines hidden ---