diagnostics.h (9b3ece1c2eb92a881cb2553271e123382bfe31c1) diagnostics.h (048ddb58bc5eeedba578dace633efbf1c6c2864a)
1/*-
2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.

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27
28#ifndef MLX5_CORE_DIAGNOSTICS_H
29#define MLX5_CORE_DIAGNOSTICS_H
30
31#define MLX5_CORE_DIAGNOSTICS_NUM(n, s, t) n
32#define MLX5_CORE_DIAGNOSTICS_STRUCT(n, s, t) s,
33#define MLX5_CORE_DIAGNOSTICS_ENTRY(n, s, t) { #s, (t) },
34
1/*-
2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.

--- 18 unchanged lines hidden (view full) ---

27
28#ifndef MLX5_CORE_DIAGNOSTICS_H
29#define MLX5_CORE_DIAGNOSTICS_H
30
31#define MLX5_CORE_DIAGNOSTICS_NUM(n, s, t) n
32#define MLX5_CORE_DIAGNOSTICS_STRUCT(n, s, t) s,
33#define MLX5_CORE_DIAGNOSTICS_ENTRY(n, s, t) { #s, (t) },
34
35static MALLOC_DEFINE(M_MLX5_EEPROM, "MLX5EEPROM", "MLX5 EEPROM information");
36
35struct mlx5_core_diagnostics_entry {
36 const char *desc;
37 u16 counter_id;
38};
39
40#define MLX5_CORE_PCI_DIAGNOSTICS(m) \
41m(+1, pxd_ready_bp, 0x0401) \
42m(+1, pci_write_bp, 0x0402) \

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122 u64 MLX5_CORE_GENERAL_DIAGNOSTICS(
123 MLX5_CORE_DIAGNOSTICS_STRUCT) dummy[0];
124 } counter;
125};
126
127extern const struct mlx5_core_diagnostics_entry
128 mlx5_core_general_diagnostics_table[MLX5_CORE_GENERAL_DIAGNOSTICS_NUM];
129
37struct mlx5_core_diagnostics_entry {
38 const char *desc;
39 u16 counter_id;
40};
41
42#define MLX5_CORE_PCI_DIAGNOSTICS(m) \
43m(+1, pxd_ready_bp, 0x0401) \
44m(+1, pci_write_bp, 0x0402) \

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124 u64 MLX5_CORE_GENERAL_DIAGNOSTICS(
125 MLX5_CORE_DIAGNOSTICS_STRUCT) dummy[0];
126 } counter;
127};
128
129extern const struct mlx5_core_diagnostics_entry
130 mlx5_core_general_diagnostics_table[MLX5_CORE_GENERAL_DIAGNOSTICS_NUM];
131
132struct mlx5_eeprom {
133 int lock_bit;
134 int i2c_addr;
135 int page_num;
136 int device_addr;
137 int module_num;
138 int len;
139 int type;
140 int page_valid;
141 u32 *data;
142};
143
130/* function prototypes */
131int mlx5_core_set_diagnostics_full(struct mlx5_core_dev *mdev,
132 u8 enable_pci, u8 enable_general);
133int mlx5_core_get_diagnostics_full(struct mlx5_core_dev *mdev,
134 union mlx5_core_pci_diagnostics *ppci,
135 union mlx5_core_general_diagnostics *pgen);
136int mlx5_core_supports_diagnostics(struct mlx5_core_dev *mdev, u16 counter_id);
144/* function prototypes */
145int mlx5_core_set_diagnostics_full(struct mlx5_core_dev *mdev,
146 u8 enable_pci, u8 enable_general);
147int mlx5_core_get_diagnostics_full(struct mlx5_core_dev *mdev,
148 union mlx5_core_pci_diagnostics *ppci,
149 union mlx5_core_general_diagnostics *pgen);
150int mlx5_core_supports_diagnostics(struct mlx5_core_dev *mdev, u16 counter_id);
151int mlx5_read_eeprom(struct mlx5_core_dev *dev, struct mlx5_eeprom *eeprom);
152int mlx5_get_eeprom_info(struct mlx5_core_dev *dev, struct mlx5_eeprom *eeprom);
153int mlx5_get_eeprom(struct mlx5_core_dev *dev, struct mlx5_eeprom *ee);
137
138#endif /* MLX5_CORE_DIAGNOSTICS_H */
154
155#endif /* MLX5_CORE_DIAGNOSTICS_H */