mlx_pci.c (5792b7fe0b0e753cfe770df4930e2c1d33671c65) mlx_pci.c (da8bb3a3bf71a0579594e2faa0dd92b821689e12)
1/*-
2 * Copyright (c) 1999 Michael Smith
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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45
46#include <pci/pcireg.h>
47#include <pci/pcivar.h>
48
49#include <dev/mlx/mlxio.h>
50#include <dev/mlx/mlxvar.h>
51#include <dev/mlx/mlxreg.h>
52
1/*-
2 * Copyright (c) 1999 Michael Smith
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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45
46#include <pci/pcireg.h>
47#include <pci/pcivar.h>
48
49#include <dev/mlx/mlxio.h>
50#include <dev/mlx/mlxvar.h>
51#include <dev/mlx/mlxreg.h>
52
53#if 0
54#define debug(fmt, args...) printf("%s: " fmt "\n", __FUNCTION__ , ##args)
55#else
56#define debug(fmt, args...)
57#endif
58
59static int mlx_pci_probe(device_t dev);
60static int mlx_pci_attach(device_t dev);
61
62static device_method_t mlx_methods[] = {
63 /* Device interface */
64 DEVMETHOD(device_probe, mlx_pci_probe),
65 DEVMETHOD(device_attach, mlx_pci_attach),
66 DEVMETHOD(device_detach, mlx_detach),

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85{
86 u_int16_t vendor;
87 u_int16_t device;
88 u_int16_t subvendor;
89 u_int16_t subdevice;
90 int iftype;
91 char *desc;
92} mlx_identifiers[] = {
53static int mlx_pci_probe(device_t dev);
54static int mlx_pci_attach(device_t dev);
55
56static device_method_t mlx_methods[] = {
57 /* Device interface */
58 DEVMETHOD(device_probe, mlx_pci_probe),
59 DEVMETHOD(device_attach, mlx_pci_attach),
60 DEVMETHOD(device_detach, mlx_detach),

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79{
80 u_int16_t vendor;
81 u_int16_t device;
82 u_int16_t subvendor;
83 u_int16_t subdevice;
84 int iftype;
85 char *desc;
86} mlx_identifiers[] = {
93/* {0x1069, 0x0001, 0x0000, 0x0000, MLX_IFTYPE_2, "Mylex version 2 RAID interface"}, */
87 {0x1069, 0x0001, 0x0000, 0x0000, MLX_IFTYPE_2, "Mylex version 2 RAID interface"},
94 {0x1069, 0x0002, 0x0000, 0x0000, MLX_IFTYPE_3, "Mylex version 3 RAID interface"},
95 {0x1069, 0x0010, 0x0000, 0x0000, MLX_IFTYPE_4, "Mylex version 4 RAID interface"},
96 {0x1011, 0x1065, 0x1069, 0x0020, MLX_IFTYPE_5, "Mylex version 5 RAID interface"},
97 {0, 0, 0, 0, 0, 0}
98};
99
100static int
101mlx_pci_probe(device_t dev)
102{
103 struct mlx_ident *m;
104
88 {0x1069, 0x0002, 0x0000, 0x0000, MLX_IFTYPE_3, "Mylex version 3 RAID interface"},
89 {0x1069, 0x0010, 0x0000, 0x0000, MLX_IFTYPE_4, "Mylex version 4 RAID interface"},
90 {0x1011, 0x1065, 0x1069, 0x0020, MLX_IFTYPE_5, "Mylex version 5 RAID interface"},
91 {0, 0, 0, 0, 0, 0}
92};
93
94static int
95mlx_pci_probe(device_t dev)
96{
97 struct mlx_ident *m;
98
105 debug("called");
99 debug_called(1);
106
107 for (m = mlx_identifiers; m->vendor != 0; m++) {
108 if ((m->vendor == pci_get_vendor(dev)) &&
109 (m->device == pci_get_device(dev)) &&
110 ((m->subvendor == 0) || ((m->subvendor == pci_get_subvendor(dev)) &&
111 (m->subdevice == pci_get_subdevice(dev))))) {
112
113 device_set_desc(dev, m->desc);

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119
120static int
121mlx_pci_attach(device_t dev)
122{
123 struct mlx_softc *sc;
124 int i, rid, error;
125 u_int32_t command;
126
100
101 for (m = mlx_identifiers; m->vendor != 0; m++) {
102 if ((m->vendor == pci_get_vendor(dev)) &&
103 (m->device == pci_get_device(dev)) &&
104 ((m->subvendor == 0) || ((m->subvendor == pci_get_subvendor(dev)) &&
105 (m->subdevice == pci_get_subdevice(dev))))) {
106
107 device_set_desc(dev, m->desc);

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113
114static int
115mlx_pci_attach(device_t dev)
116{
117 struct mlx_softc *sc;
118 int i, rid, error;
119 u_int32_t command;
120
127 debug("called");
121 debug_called(1);
128
129 /*
130 * Make sure we are going to be able to talk to this board.
131 */
122
123 /*
124 * Make sure we are going to be able to talk to this board.
125 */
132 command = pci_read_config(dev, PCIR_COMMAND, 1);
126 command = pci_read_config(dev, PCIR_COMMAND, 2);
133 if ((command & PCIM_CMD_MEMEN) == 0) {
134 device_printf(dev, "memory window not available\n");
135 return(ENXIO);
136 }
127 if ((command & PCIM_CMD_MEMEN) == 0) {
128 device_printf(dev, "memory window not available\n");
129 return(ENXIO);
130 }
131 /* force the busmaster enable bit on */
132 command |= PCIM_CMD_BUSMASTEREN;
133 pci_write_config(dev, PCIR_COMMAND, command, 2);
137
138 /*
139 * Initialise softc.
140 */
141 sc = device_get_softc(dev);
142 bzero(sc, sizeof(*sc));
143 sc->mlx_dev = dev;
144

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156 }
157 if (sc->mlx_iftype == 0) /* shouldn't happen */
158 return(ENXIO);
159
160 /*
161 * Allocate the PCI register window.
162 */
163
134
135 /*
136 * Initialise softc.
137 */
138 sc = device_get_softc(dev);
139 bzero(sc, sizeof(*sc));
140 sc->mlx_dev = dev;
141

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153 }
154 if (sc->mlx_iftype == 0) /* shouldn't happen */
155 return(ENXIO);
156
157 /*
158 * Allocate the PCI register window.
159 */
160
164 /* type 3 adapters have an I/O region we don't use at base 0 */
165 rid = (sc->mlx_iftype == MLX_IFTYPE_3) ? MLX_CFG_BASE1 : MLX_CFG_BASE0;
161 /* type 2/3 adapters have an I/O region we don't use at base 0 */
162 switch(sc->mlx_iftype) {
163 case MLX_IFTYPE_2:
164 case MLX_IFTYPE_3:
165 rid = MLX_CFG_BASE1;
166 break;
167 case MLX_IFTYPE_4:
168 case MLX_IFTYPE_5:
169 rid = MLX_CFG_BASE0;
170 break;
171 }
166 sc->mlx_mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1, RF_ACTIVE);
167 if (sc->mlx_mem == NULL) {
168 device_printf(sc->mlx_dev, "couldn't allocate mailbox window\n");
169 mlx_free(sc);
170 return(ENXIO);
171 }
172 sc->mlx_btag = rman_get_bustag(sc->mlx_mem);
173 sc->mlx_bhandle = rman_get_bushandle(sc->mlx_mem);
174
175 /*
176 * Allocate the parent bus DMA tag appropriate for PCI.
177 */
178 error = bus_dma_tag_create(NULL, /* parent */
179 1, 0, /* alignment, boundary */
180 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
181 BUS_SPACE_MAXADDR, /* highaddr */
182 NULL, NULL, /* filter, filterarg */
172 sc->mlx_mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1, RF_ACTIVE);
173 if (sc->mlx_mem == NULL) {
174 device_printf(sc->mlx_dev, "couldn't allocate mailbox window\n");
175 mlx_free(sc);
176 return(ENXIO);
177 }
178 sc->mlx_btag = rman_get_bustag(sc->mlx_mem);
179 sc->mlx_bhandle = rman_get_bushandle(sc->mlx_mem);
180
181 /*
182 * Allocate the parent bus DMA tag appropriate for PCI.
183 */
184 error = bus_dma_tag_create(NULL, /* parent */
185 1, 0, /* alignment, boundary */
186 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
187 BUS_SPACE_MAXADDR, /* highaddr */
188 NULL, NULL, /* filter, filterarg */
183 MAXBSIZE, MLX_NSEG, /* maxsize, nsegments */
189 MAXBSIZE, MLX_NSEG_NEW, /* maxsize, nsegments */
184 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
185 BUS_DMA_ALLOCNOW, /* flags */
186 &sc->mlx_parent_dmat);
187 if (error != 0) {
188 device_printf(dev, "can't allocate parent DMA tag\n");
189 mlx_free(sc);
190 return(ENOMEM);
191 }

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190 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
191 BUS_DMA_ALLOCNOW, /* flags */
192 &sc->mlx_parent_dmat);
193 if (error != 0) {
194 device_printf(dev, "can't allocate parent DMA tag\n");
195 mlx_free(sc);
196 return(ENOMEM);
197 }

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