| ixl.h (407912909a71b22d5e381ae9178bcacbcbc0ce45) | ixl.h (1d02c6b1b859e9f611bc8fe27ca3d2c16ec128c1) |
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| 1/****************************************************************************** 2 3 Copyright (c) 2013-2018, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 --- 150 unchanged lines hidden (view full) --- 159#define IXL_RSS_VSI_LUT_SIZE 64 /* X722 -> VSI, X710 -> VF */ 160#define IXL_RSS_VSI_LUT_ENTRY_MASK 0x3F 161#define IXL_RSS_VF_LUT_ENTRY_MASK 0xF 162 163#define IXL_VF_MAX_BUFFER 0x3F80 164#define IXL_VF_MAX_HDR_BUFFER 0x840 165#define IXL_VF_MAX_FRAME 0x3FFF 166 | 1/****************************************************************************** 2 3 Copyright (c) 2013-2018, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 --- 150 unchanged lines hidden (view full) --- 159#define IXL_RSS_VSI_LUT_SIZE 64 /* X722 -> VSI, X710 -> VF */ 160#define IXL_RSS_VSI_LUT_ENTRY_MASK 0x3F 161#define IXL_RSS_VF_LUT_ENTRY_MASK 0xF 162 163#define IXL_VF_MAX_BUFFER 0x3F80 164#define IXL_VF_MAX_HDR_BUFFER 0x840 165#define IXL_VF_MAX_FRAME 0x3FFF 166 |
| 167/* ERJ: hardware can support ~2k (SW5+) filters between all functions */ 168#define IXL_MAX_FILTERS 256 169 | |
| 170#define IXL_NVM_VERSION_LO_SHIFT 0 171#define IXL_NVM_VERSION_LO_MASK (0xff << IXL_NVM_VERSION_LO_SHIFT) 172#define IXL_NVM_VERSION_HI_SHIFT 12 173#define IXL_NVM_VERSION_HI_MASK (0xf << IXL_NVM_VERSION_HI_SHIFT) 174 175/* 176 * Interrupt Moderation parameters 177 * Multiply ITR values by 2 for real ITR value --- 12 unchanged lines hidden (view full) --- 190/* MacVlan Flags */ 191#define IXL_FILTER_VLAN (u16)(1 << 0) 192#define IXL_FILTER_MC (u16)(1 << 1) 193 194/* used in the vlan field of the filter when not a vlan */ 195#define IXL_VLAN_ANY -1 196 197/* Maximum number of MAC/VLAN filters supported by HW */ | 167#define IXL_NVM_VERSION_LO_SHIFT 0 168#define IXL_NVM_VERSION_LO_MASK (0xff << IXL_NVM_VERSION_LO_SHIFT) 169#define IXL_NVM_VERSION_HI_SHIFT 12 170#define IXL_NVM_VERSION_HI_MASK (0xf << IXL_NVM_VERSION_HI_SHIFT) 171 172/* 173 * Interrupt Moderation parameters 174 * Multiply ITR values by 2 for real ITR value --- 12 unchanged lines hidden (view full) --- 187/* MacVlan Flags */ 188#define IXL_FILTER_VLAN (u16)(1 << 0) 189#define IXL_FILTER_MC (u16)(1 << 1) 190 191/* used in the vlan field of the filter when not a vlan */ 192#define IXL_VLAN_ANY -1 193 194/* Maximum number of MAC/VLAN filters supported by HW */ |
| 198#define IXL_MAX_VLAN_FILTERS 256 | 195#define IXL_MAX_VLAN_FILTERS 255 |
| 199 200#define CSUM_OFFLOAD_IPV4 (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 201#define CSUM_OFFLOAD_IPV6 (CSUM_TCP_IPV6|CSUM_UDP_IPV6|CSUM_SCTP_IPV6) 202#define CSUM_OFFLOAD (CSUM_OFFLOAD_IPV4|CSUM_OFFLOAD_IPV6|CSUM_TSO) 203 204/* Misc flags for ixl_vsi.flags */ 205#define IXL_FLAGS_KEEP_TSO4 (1 << 0) 206#define IXL_FLAGS_KEEP_TSO6 (1 << 1) --- 329 unchanged lines hidden --- | 196 197#define CSUM_OFFLOAD_IPV4 (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 198#define CSUM_OFFLOAD_IPV6 (CSUM_TCP_IPV6|CSUM_UDP_IPV6|CSUM_SCTP_IPV6) 199#define CSUM_OFFLOAD (CSUM_OFFLOAD_IPV4|CSUM_OFFLOAD_IPV6|CSUM_TSO) 200 201/* Misc flags for ixl_vsi.flags */ 202#define IXL_FLAGS_KEEP_TSO4 (1 << 0) 203#define IXL_FLAGS_KEEP_TSO6 (1 << 1) --- 329 unchanged lines hidden --- |