i40e_osdep.c (c6879c6c14eedbd060ba588a3129a6c60ebbe783) i40e_osdep.c (b4a7ce0690aedd9763b3b47ee7fcdb421f0434c7)
1/******************************************************************************
2
3 Copyright (c) 2013-2018, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD$*/
34
35#include <sys/limits.h>
1/******************************************************************************
2
3 Copyright (c) 2013-2018, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD$*/
34
35#include <sys/limits.h>
36#include <sys/time.h>
36
37#include "ixl.h"
38
39/********************************************************************
40 * Manage DMA'able memory.
41 *******************************************************************/
42static void
43i40e_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nseg, int error)
44{
45 if (error)
46 return;
47 *(bus_addr_t *) arg = segs->ds_addr;
37
38#include "ixl.h"
39
40/********************************************************************
41 * Manage DMA'able memory.
42 *******************************************************************/
43static void
44i40e_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nseg, int error)
45{
46 if (error)
47 return;
48 *(bus_addr_t *) arg = segs->ds_addr;
48 return;
49}
50
51i40e_status
52i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem, u32 size)
53{
54 mem->va = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
49}
50
51i40e_status
52i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem, u32 size)
53{
54 mem->va = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
55 return(mem->va == NULL);
55 return (mem->va == NULL);
56}
57
58i40e_status
59i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
60{
61 free(mem->va, M_DEVBUF);
62 mem->va = NULL;
63
56}
57
58i40e_status
59i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
60{
61 free(mem->va, M_DEVBUF);
62 mem->va = NULL;
63
64 return(0);
64 return (I40E_SUCCESS);
65}
66
67i40e_status
68i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
69 enum i40e_memory_type type __unused, u64 size, u32 alignment)
70{
71 device_t dev = ((struct i40e_osdep *)hw->back)->dev;
72 int err;

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108 "i40e_allocate_dma: bus_dmamap_load failed, "
109 "error %u\n", err);
110 goto fail_2;
111 }
112 mem->nseg = 1;
113 mem->size = size;
114 bus_dmamap_sync(mem->tag, mem->map,
115 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
65}
66
67i40e_status
68i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
69 enum i40e_memory_type type __unused, u64 size, u32 alignment)
70{
71 device_t dev = ((struct i40e_osdep *)hw->back)->dev;
72 int err;

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108 "i40e_allocate_dma: bus_dmamap_load failed, "
109 "error %u\n", err);
110 goto fail_2;
111 }
112 mem->nseg = 1;
113 mem->size = size;
114 bus_dmamap_sync(mem->tag, mem->map,
115 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
116 return (0);
116 return (I40E_SUCCESS);
117fail_2:
118 bus_dmamem_free(mem->tag, mem->va, mem->map);
119fail_1:
120 bus_dma_tag_destroy(mem->tag);
121fail_0:
122 mem->map = NULL;
123 mem->tag = NULL;
124 return (err);

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156
157void
158i40e_destroy_spinlock(struct i40e_spinlock *lock)
159{
160 if (mtx_initialized(&lock->mutex))
161 mtx_destroy(&lock->mutex);
162}
163
117fail_2:
118 bus_dmamem_free(mem->tag, mem->va, mem->map);
119fail_1:
120 bus_dma_tag_destroy(mem->tag);
121fail_0:
122 mem->map = NULL;
123 mem->tag = NULL;
124 return (err);

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156
157void
158i40e_destroy_spinlock(struct i40e_spinlock *lock)
159{
160 if (mtx_initialized(&lock->mutex))
161 mtx_destroy(&lock->mutex);
162}
163
164static inline int
165ixl_ms_scale(int x)
166{
167 if (hz == 1000)
168 return (x);
169 else if (hz > 1000)
170 return (x*(hz/1000));
171 else
172 return (max(1, x/(1000/hz)));
173}
164#ifndef MSEC_2_TICKS
165#define MSEC_2_TICKS(m) max(1, (uint32_t)((hz == 1000) ? \
166 (m) : ((uint64_t)(m) * (uint64_t)hz)/(uint64_t)1000))
167#endif
174
175void
176i40e_msec_pause(int msecs)
177{
168
169void
170i40e_msec_pause(int msecs)
171{
178 if (cold || SCHEDULER_STOPPED())
179 i40e_msec_delay(msecs);
180 else
181 // ERJ: (msecs * hz) could overflow
182 pause("ixl", ixl_ms_scale(msecs));
172 pause("i40e_msec_pause", MSEC_2_TICKS(msecs));
183}
184
185/*
186 * Helper function for debug statement printing
187 */
188void
189i40e_debug_shared(struct i40e_hw *hw, enum i40e_debug_mask mask, char *fmt, ...)
190{

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174
175/*
176 * Helper function for debug statement printing
177 */
178void
179i40e_debug_shared(struct i40e_hw *hw, enum i40e_debug_mask mask, char *fmt, ...)
180{

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