i40e_adminq.h (9268022b74279434ed6300244e3f977e56a8ceb5) i40e_adminq.h (f247dc252337766d1a423ce46d43879a62a742fa)
1/******************************************************************************
2
3 Copyright (c) 2013-2014, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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31
32******************************************************************************/
33/*$FreeBSD$*/
34
35#ifndef _I40E_ADMINQ_H_
36#define _I40E_ADMINQ_H_
37
38#include "i40e_osdep.h"
1/******************************************************************************
2
3 Copyright (c) 2013-2014, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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31
32******************************************************************************/
33/*$FreeBSD$*/
34
35#ifndef _I40E_ADMINQ_H_
36#define _I40E_ADMINQ_H_
37
38#include "i40e_osdep.h"
39#include "i40e_status.h"
39#include "i40e_adminq_cmd.h"
40
41#define I40E_ADMINQ_DESC(R, i) \
42 (&(((struct i40e_aq_desc *)((R).desc_buf.va))[i]))
43
44#define I40E_ADMINQ_DESC_ALIGNMENT 4096
45
46struct i40e_adminq_ring {

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95 struct i40e_adminq_ring asq; /* send queue */
96 u32 asq_cmd_timeout; /* send queue cmd write back timeout*/
97 u16 num_arq_entries; /* receive queue depth */
98 u16 num_asq_entries; /* send queue depth */
99 u16 arq_buf_size; /* receive queue buffer size */
100 u16 asq_buf_size; /* send queue buffer size */
101 u16 fw_maj_ver; /* firmware major version */
102 u16 fw_min_ver; /* firmware minor version */
40#include "i40e_adminq_cmd.h"
41
42#define I40E_ADMINQ_DESC(R, i) \
43 (&(((struct i40e_aq_desc *)((R).desc_buf.va))[i]))
44
45#define I40E_ADMINQ_DESC_ALIGNMENT 4096
46
47struct i40e_adminq_ring {

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96 struct i40e_adminq_ring asq; /* send queue */
97 u32 asq_cmd_timeout; /* send queue cmd write back timeout*/
98 u16 num_arq_entries; /* receive queue depth */
99 u16 num_asq_entries; /* send queue depth */
100 u16 arq_buf_size; /* receive queue buffer size */
101 u16 asq_buf_size; /* send queue buffer size */
102 u16 fw_maj_ver; /* firmware major version */
103 u16 fw_min_ver; /* firmware minor version */
104 u32 fw_build; /* firmware build number */
103 u16 api_maj_ver; /* api major version */
104 u16 api_min_ver; /* api minor version */
105 u16 api_maj_ver; /* api major version */
106 u16 api_min_ver; /* api minor version */
105 bool nvm_busy;
106 bool nvm_release_on_done;
107
108 struct i40e_spinlock asq_spinlock; /* Send queue spinlock */
109 struct i40e_spinlock arq_spinlock; /* Receive queue spinlock */
110
111 /* last status values on send and receive queues */
112 enum i40e_admin_queue_err asq_last_status;
113 enum i40e_admin_queue_err arq_last_status;
114};
115
116/* general information */
117#define I40E_AQ_LARGE_BUF 512
107 bool nvm_release_on_done;
108
109 struct i40e_spinlock asq_spinlock; /* Send queue spinlock */
110 struct i40e_spinlock arq_spinlock; /* Receive queue spinlock */
111
112 /* last status values on send and receive queues */
113 enum i40e_admin_queue_err asq_last_status;
114 enum i40e_admin_queue_err arq_last_status;
115};
116
117/* general information */
118#define I40E_AQ_LARGE_BUF 512
118#define I40E_ASQ_CMD_TIMEOUT 100 /* msecs */
119#define I40E_ASQ_CMD_TIMEOUT 250 /* msecs */
119
120void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc,
121 u16 opcode);
122
123#endif /* _I40E_ADMINQ_H_ */
120
121void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc,
122 u16 opcode);
123
124#endif /* _I40E_ADMINQ_H_ */