if_iwnvar.h (874108aed99d76099ff9eb6c8d830479a504c1ad) if_iwnvar.h (0f454b93f8502e85e8d2b26a383e40b5dc50cd27)
1/* $FreeBSD$ */
1/* $FreeBSD$ */
2/* $OpenBSD: if_iwnvar.h,v 1.12 2009/05/29 08:25:45 damien Exp $ */
2/* $OpenBSD: if_iwnvar.h,v 1.16 2009/11/04 17:46:52 damien Exp $ */
3
4/*-
5 * Copyright (c) 2007, 2008
6 * Damien Bergamini <damien.bergamini@free.fr>
7 * Copyright (c) 2008 Sam Leffler, Errno Consulting
8 *
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above

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69};
70
71struct iwn_tx_ring {
72 struct iwn_dma_info desc_dma;
73 struct iwn_dma_info cmd_dma;
74 struct iwn_tx_desc *desc;
75 struct iwn_tx_cmd *cmd;
76 struct iwn_tx_data data[IWN_TX_RING_COUNT];
3
4/*-
5 * Copyright (c) 2007, 2008
6 * Damien Bergamini <damien.bergamini@free.fr>
7 * Copyright (c) 2008 Sam Leffler, Errno Consulting
8 *
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above

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69};
70
71struct iwn_tx_ring {
72 struct iwn_dma_info desc_dma;
73 struct iwn_dma_info cmd_dma;
74 struct iwn_tx_desc *desc;
75 struct iwn_tx_cmd *cmd;
76 struct iwn_tx_data data[IWN_TX_RING_COUNT];
77 bus_dma_tag_t data_dmat;
77 int qid;
78 int queued;
79 int cur;
80};
81
82struct iwn_softc;
83
84struct iwn_rx_data {
85 struct mbuf *m;
86 bus_dmamap_t map;
87};
88
89struct iwn_rx_ring {
90 struct iwn_dma_info desc_dma;
91 struct iwn_dma_info stat_dma;
92 uint32_t *desc;
93 struct iwn_rx_status *stat;
94 struct iwn_rx_data data[IWN_RX_RING_COUNT];
78 int qid;
79 int queued;
80 int cur;
81};
82
83struct iwn_softc;
84
85struct iwn_rx_data {
86 struct mbuf *m;
87 bus_dmamap_t map;
88};
89
90struct iwn_rx_ring {
91 struct iwn_dma_info desc_dma;
92 struct iwn_dma_info stat_dma;
93 uint32_t *desc;
94 struct iwn_rx_status *stat;
95 struct iwn_rx_data data[IWN_RX_RING_COUNT];
96 bus_dma_tag_t data_dmat;
95 int cur;
96};
97
98struct iwn_node {
99 struct ieee80211_node ni; /* must be the first */
97 int cur;
98};
99
100struct iwn_node {
101 struct ieee80211_node ni; /* must be the first */
100#define IWN_NODE(_ni) ((struct iwn_node *)(_ni))
101
102 struct ieee80211_amrr_node amn;
103 uint16_t disable_tid;
104 uint8_t id;
105 uint8_t ridx[IEEE80211_RATE_MAXSIZE];
106};
107
108struct iwn_calib_state {
109 uint8_t state;

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156 struct iwn_fw_part main;
157 struct iwn_fw_part boot;
158};
159
160struct iwn_hal {
161 int (*load_firmware)(struct iwn_softc *);
162 void (*read_eeprom)(struct iwn_softc *);
163 int (*post_alive)(struct iwn_softc *);
102 struct ieee80211_amrr_node amn;
103 uint16_t disable_tid;
104 uint8_t id;
105 uint8_t ridx[IEEE80211_RATE_MAXSIZE];
106};
107
108struct iwn_calib_state {
109 uint8_t state;

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156 struct iwn_fw_part main;
157 struct iwn_fw_part boot;
158};
159
160struct iwn_hal {
161 int (*load_firmware)(struct iwn_softc *);
162 void (*read_eeprom)(struct iwn_softc *);
163 int (*post_alive)(struct iwn_softc *);
164 int (*apm_init)(struct iwn_softc *);
165 int (*nic_config)(struct iwn_softc *);
166 void (*update_sched)(struct iwn_softc *, int, int, uint8_t,
167 uint16_t);
168 int (*get_temperature)(struct iwn_softc *);
169 int (*get_rssi)(struct iwn_softc *, struct iwn_rx_stat *);
164 int (*nic_config)(struct iwn_softc *);
165 void (*update_sched)(struct iwn_softc *, int, int, uint8_t,
166 uint16_t);
167 int (*get_temperature)(struct iwn_softc *);
168 int (*get_rssi)(struct iwn_softc *, struct iwn_rx_stat *);
170 int (*set_txpower)(struct iwn_softc *,
171 struct ieee80211_channel *, int);
169 int (*set_txpower)(struct iwn_softc *, int);
172 int (*init_gains)(struct iwn_softc *);
173 int (*set_gains)(struct iwn_softc *);
174 int (*add_node)(struct iwn_softc *, struct iwn_node_info *,
175 int);
176 void (*tx_done)(struct iwn_softc *, struct iwn_rx_desc *,
177 struct iwn_rx_data *);
170 int (*init_gains)(struct iwn_softc *);
171 int (*set_gains)(struct iwn_softc *);
172 int (*add_node)(struct iwn_softc *, struct iwn_node_info *,
173 int);
174 void (*tx_done)(struct iwn_softc *, struct iwn_rx_desc *,
175 struct iwn_rx_data *);
178 const struct iwn_sensitivity_limits *limits;
176#if 0 /* HT */
177 void (*ampdu_tx_start)(struct iwn_softc *,
178 struct ieee80211_node *, uint8_t, uint16_t);
179 void (*ampdu_tx_stop)(struct iwn_softc *, uint8_t,
180 uint16_t);
181#endif
179 int ntxqs;
180 int ndmachnls;
181 uint8_t broadcast_id;
182 int rxonsz;
183 int schedsz;
184 uint32_t fw_text_maxsz;
185 uint32_t fw_data_maxsz;
186 uint32_t fwsz;

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197 enum ieee80211_state, int);
198};
199#define IWN_VAP(_vap) ((struct iwn_vap *)(_vap))
200
201struct iwn_softc {
202 struct ifnet *sc_ifp;
203 int sc_debug;
204
182 int ntxqs;
183 int ndmachnls;
184 uint8_t broadcast_id;
185 int rxonsz;
186 int schedsz;
187 uint32_t fw_text_maxsz;
188 uint32_t fw_data_maxsz;
189 uint32_t fwsz;

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200 enum ieee80211_state, int);
201};
202#define IWN_VAP(_vap) ((struct iwn_vap *)(_vap))
203
204struct iwn_softc {
205 struct ifnet *sc_ifp;
206 int sc_debug;
207
205 /* locks */
208 /* Locks */
206 struct mtx sc_mtx;
207
208 /* Bus */
209 device_t sc_dev;
210 int mem_rid;
211 int irq_rid;
212 struct resource *mem;
213 struct resource *irq;
214
215 u_int sc_flags;
216#define IWN_FLAG_HAS_5GHZ (1 << 0)
217#define IWN_FLAG_HAS_OTPROM (1 << 1)
209 struct mtx sc_mtx;
210
211 /* Bus */
212 device_t sc_dev;
213 int mem_rid;
214 int irq_rid;
215 struct resource *mem;
216 struct resource *irq;
217
218 u_int sc_flags;
219#define IWN_FLAG_HAS_5GHZ (1 << 0)
220#define IWN_FLAG_HAS_OTPROM (1 << 1)
218#define IWN_FLAG_FIRST_BOOT (1 << 2)
221#define IWN_FLAG_CALIB_DONE (1 << 2)
222#define IWN_FLAG_USE_ICT (1 << 3)
223#define IWN_FLAG_INTERNAL_PA (1 << 4)
219
220 uint8_t hw_type;
221 const struct iwn_hal *sc_hal;
222 const char *fwname;
224
225 uint8_t hw_type;
226 const struct iwn_hal *sc_hal;
227 const char *fwname;
228 const struct iwn_sensitivity_limits
229 *limits;
223
224 /* TX scheduler rings. */
225 struct iwn_dma_info sched_dma;
226 uint16_t *sched;
227 uint32_t sched_base;
228
229 /* "Keep Warm" page. */
230 struct iwn_dma_info kw_dma;
231
232 /* Firmware image. */
233 const struct firmware *fw_fp;
234
235 /* Firmware DMA transfer. */
236 struct iwn_dma_info fw_dma;
237
230
231 /* TX scheduler rings. */
232 struct iwn_dma_info sched_dma;
233 uint16_t *sched;
234 uint32_t sched_base;
235
236 /* "Keep Warm" page. */
237 struct iwn_dma_info kw_dma;
238
239 /* Firmware image. */
240 const struct firmware *fw_fp;
241
242 /* Firmware DMA transfer. */
243 struct iwn_dma_info fw_dma;
244
245 /* ICT table. */
246 struct iwn_dma_info ict_dma;
247 uint32_t *ict;
248 int ict_cur;
249
238 /* TX/RX rings. */
239 struct iwn_tx_ring txq[IWN5000_NTXQUEUES];
240 struct iwn_rx_ring rxq;
241
242 bus_space_tag_t sc_st;
243 bus_space_handle_t sc_sh;
244 void *sc_ih;
245 bus_size_t sc_sz;
246 int sc_cap_off; /* PCIe Capabilities. */
247
248 /* Tasks used by the driver */
249 struct task sc_reinit_task;
250 struct task sc_radioon_task;
251 struct task sc_radiooff_task;
250 /* TX/RX rings. */
251 struct iwn_tx_ring txq[IWN5000_NTXQUEUES];
252 struct iwn_rx_ring rxq;
253
254 bus_space_tag_t sc_st;
255 bus_space_handle_t sc_sh;
256 void *sc_ih;
257 bus_size_t sc_sz;
258 int sc_cap_off; /* PCIe Capabilities. */
259
260 /* Tasks used by the driver */
261 struct task sc_reinit_task;
262 struct task sc_radioon_task;
263 struct task sc_radiooff_task;
252
264
253 int calib_cnt;
254 struct iwn_calib_state calib;
255
256 struct iwn_fw_info fw;
257 struct iwn_calib_info calibcmd[5];
258 uint32_t errptr;
259
260 struct iwn_rx_stat last_rx_stat;
261 int last_rx_valid;
262 struct iwn_ucode_info ucode_info;
263 struct iwn_rxon rxon;
264 uint32_t rawtemp;
265 int temp;
266 int noise;
267 uint32_t qfullmsk;
268
265 int calib_cnt;
266 struct iwn_calib_state calib;
267
268 struct iwn_fw_info fw;
269 struct iwn_calib_info calibcmd[5];
270 uint32_t errptr;
271
272 struct iwn_rx_stat last_rx_stat;
273 int last_rx_valid;
274 struct iwn_ucode_info ucode_info;
275 struct iwn_rxon rxon;
276 uint32_t rawtemp;
277 int temp;
278 int noise;
279 uint32_t qfullmsk;
280
281 uint32_t prom_base;
269 struct iwn4965_eeprom_band
270 bands[IWN_NBANDS];
282 struct iwn4965_eeprom_band
283 bands[IWN_NBANDS];
284 struct iwn_eeprom_chan eeprom_channels[IWN_NBANDS][IWN_MAX_CHAN_PER_BAND];
271 uint16_t rfcfg;
272 char eeprom_domain[4];
273 uint32_t eeprom_crystal;
274 int16_t eeprom_voltage;
275 int8_t maxpwr2GHz;
276 int8_t maxpwr5GHz;
277 int8_t maxpwr[IEEE80211_CHAN_MAX];
285 uint16_t rfcfg;
286 char eeprom_domain[4];
287 uint32_t eeprom_crystal;
288 int16_t eeprom_voltage;
289 int8_t maxpwr2GHz;
290 int8_t maxpwr5GHz;
291 int8_t maxpwr[IEEE80211_CHAN_MAX];
292 int8_t enh_maxpwr[35];
278
293
279 uint32_t critical_temp;
294 int32_t temp_off;
295 uint32_t int_mask;
280 uint8_t ntxchains;
281 uint8_t nrxchains;
296 uint8_t ntxchains;
297 uint8_t nrxchains;
282 uint8_t txantmsk;
283 uint8_t rxantmsk;
284 uint8_t antmsk;
298 uint8_t txchainmask;
299 uint8_t rxchainmask;
300 uint8_t chainmask;
285
286 struct callout sc_timer_to;
287 int sc_tx_timer;
288
289 struct iwn_rx_radiotap_header sc_rxtap;
290 struct iwn_tx_radiotap_header sc_txtap;
301
302 struct callout sc_timer_to;
303 int sc_tx_timer;
304
305 struct iwn_rx_radiotap_header sc_rxtap;
306 struct iwn_tx_radiotap_header sc_txtap;
291 const struct ieee80211_channel *sc_curchan;
292};
293
294#define IWN_LOCK_INIT(_sc) \
295 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
296 MTX_NETWORK_LOCK, MTX_DEF)
297#define IWN_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
298#define IWN_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
299#define IWN_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
300#define IWN_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
307};
308
309#define IWN_LOCK_INIT(_sc) \
310 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
311 MTX_NETWORK_LOCK, MTX_DEF)
312#define IWN_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
313#define IWN_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
314#define IWN_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
315#define IWN_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)