ioat.h (5ca9fc2a8d46637aaa188f3b5a42f208cee8f575) ioat.h (31bf2875ea646576423eb2ba9995606464840f95)
1/*-
2 * Copyright (C) 2012 Intel Corporation
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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43#define DMA_INT_EN 0x1
44/*
45 * Like M_NOWAIT. Operations will return NULL if they cannot allocate a
46 * descriptor without blocking.
47 */
48#define DMA_NO_WAIT 0x2
49#define DMA_ALL_FLAGS (DMA_INT_EN | DMA_NO_WAIT)
50
1/*-
2 * Copyright (C) 2012 Intel Corporation
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 34 unchanged lines hidden (view full) ---

43#define DMA_INT_EN 0x1
44/*
45 * Like M_NOWAIT. Operations will return NULL if they cannot allocate a
46 * descriptor without blocking.
47 */
48#define DMA_NO_WAIT 0x2
49#define DMA_ALL_FLAGS (DMA_INT_EN | DMA_NO_WAIT)
50
51/*
52 * Hardware revision number. Different hardware revisions support different
53 * features. For example, 3.2 cannot read from MMIO space, while 3.3 can.
54 */
55#define IOAT_VER_3_0 0x30
56#define IOAT_VER_3_2 0x32
57#define IOAT_VER_3_3 0x33
58
51typedef void *bus_dmaengine_t;
52struct bus_dmadesc;
53typedef void (*bus_dmaengine_callback_t)(void *arg, int error);
54
55/*
56 * Called first to acquire a reference to the DMA channel
57 */
58bus_dmaengine_t ioat_get_dmaengine(uint32_t channel_index);
59
60/* Release the DMA channel */
61void ioat_put_dmaengine(bus_dmaengine_t dmaengine);
62
59typedef void *bus_dmaengine_t;
60struct bus_dmadesc;
61typedef void (*bus_dmaengine_callback_t)(void *arg, int error);
62
63/*
64 * Called first to acquire a reference to the DMA channel
65 */
66bus_dmaengine_t ioat_get_dmaengine(uint32_t channel_index);
67
68/* Release the DMA channel */
69void ioat_put_dmaengine(bus_dmaengine_t dmaengine);
70
71/* Check the DMA engine's HW version */
72int ioat_get_hwversion(bus_dmaengine_t dmaengine);
73
63/*
64 * Set interrupt coalescing on a DMA channel.
65 *
66 * The argument is in microseconds. A zero value disables coalescing. Any
67 * other value delays interrupt generation for N microseconds to provide
68 * opportunity to coalesce multiple operations into a single interrupt.
69 *
70 * Returns an error status, or zero on success.

--- 60 unchanged lines hidden --- 		74/*
75 * Set interrupt coalescing on a DMA channel.
76 *
77 * The argument is in microseconds. A zero value disables coalescing. Any
78 * other value delays interrupt generation for N microseconds to provide
79 * opportunity to coalesce multiple operations into a single interrupt.
80 *
81 * Returns an error status, or zero on success.

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