| ioat.c (e60680024afe8ec84ded577e77965e9a44595f2b) | ioat.c (6ca07079afcad5a0129c4bcf2662131fde11d823) |
|---|---|
| 1/*- 2 * Copyright (C) 2012 Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 838 unchanged lines hidden (view full) --- 847 hw_desc = desc->u.generic; 848 849 hw_desc->u.control_raw = 0; 850 hw_desc->u.control_generic.op = op; 851 hw_desc->u.control_generic.completion_update = 1; 852 853 if ((flags & DMA_INT_EN) != 0) 854 hw_desc->u.control_generic.int_enable = 1; | 1/*- 2 * Copyright (C) 2012 Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 838 unchanged lines hidden (view full) --- 847 hw_desc = desc->u.generic; 848 849 hw_desc->u.control_raw = 0; 850 hw_desc->u.control_generic.op = op; 851 hw_desc->u.control_generic.completion_update = 1; 852 853 if ((flags & DMA_INT_EN) != 0) 854 hw_desc->u.control_generic.int_enable = 1; |
| 855 if ((flags & DMA_FENCE) != 0) 856 hw_desc->u.control_generic.fence = 1; |
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| 855 856 hw_desc->size = size; 857 hw_desc->src_addr = src; 858 hw_desc->dest_addr = dst; 859 860 desc->bus_dmadesc.callback_fn = callback_fn; 861 desc->bus_dmadesc.callback_arg = callback_arg; 862 return (desc); --- 1009 unchanged lines hidden --- | 857 858 hw_desc->size = size; 859 hw_desc->src_addr = src; 860 hw_desc->dest_addr = dst; 861 862 desc->bus_dmadesc.callback_fn = callback_fn; 863 desc->bus_dmadesc.callback_arg = callback_arg; 864 return (desc); --- 1009 unchanged lines hidden --- |