if_igc.c (35d05a14ed7e9935be1ed0fe965b91aaaa4c92ef) if_igc.c (ab540d44ba3201ff8313b90ba0096004603b2e34)
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2001-2024, Intel Corporation
5 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org>
6 * Copyright (c) 2021-2024 Rubicon Communications, LLC (Netgate)
7 *
8 * Redistribution and use in source and binary forms, with or without

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122static int igc_sysctl_nvm_info(SYSCTL_HANDLER_ARGS);
123static void igc_print_nvm_info(struct igc_softc *);
124static int igc_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
125static int igc_get_rs(SYSCTL_HANDLER_ARGS);
126static void igc_print_debug_info(struct igc_softc *);
127static int igc_is_valid_ether_addr(u8 *);
128static void igc_neweitr(struct igc_softc *, struct igc_rx_queue *,
129 struct tx_ring *, struct rx_ring *);
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2001-2024, Intel Corporation
5 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org>
6 * Copyright (c) 2021-2024 Rubicon Communications, LLC (Netgate)
7 *
8 * Redistribution and use in source and binary forms, with or without

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122static int igc_sysctl_nvm_info(SYSCTL_HANDLER_ARGS);
123static void igc_print_nvm_info(struct igc_softc *);
124static int igc_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
125static int igc_get_rs(SYSCTL_HANDLER_ARGS);
126static void igc_print_debug_info(struct igc_softc *);
127static int igc_is_valid_ether_addr(u8 *);
128static void igc_neweitr(struct igc_softc *, struct igc_rx_queue *,
129 struct tx_ring *, struct rx_ring *);
130static int igc_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS);
130/* Management and WOL Support */
131static void igc_get_hw_control(struct igc_softc *);
132static void igc_release_hw_control(struct igc_softc *);
133static void igc_get_wakeup(if_ctx_t);
134static void igc_enable_wakeup(if_ctx_t);
135
136int igc_intr(void *);
137

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492 igc_get_rs, "I", "Dump RS indexes");
493
494 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
495 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
496 OID_AUTO, "dmac",
497 CTLTYPE_INT | CTLFLAG_RW, sc, 0,
498 igc_sysctl_dmac, "I", "DMA Coalesce");
499
131/* Management and WOL Support */
132static void igc_get_hw_control(struct igc_softc *);
133static void igc_release_hw_control(struct igc_softc *);
134static void igc_get_wakeup(if_ctx_t);
135static void igc_enable_wakeup(if_ctx_t);
136
137int igc_intr(void *);
138

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493 igc_get_rs, "I", "Dump RS indexes");
494
495 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
496 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
497 OID_AUTO, "dmac",
498 CTLTYPE_INT | CTLFLAG_RW, sc, 0,
499 igc_sysctl_dmac, "I", "DMA Coalesce");
500
501 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
502 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
503 OID_AUTO, "tso_tcp_flags_mask_first_segment",
504 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
505 sc, 0, igc_sysctl_tso_tcp_flags_mask, "IU",
506 "TSO TCP flags mask for first segment");
507
508 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
509 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
510 OID_AUTO, "tso_tcp_flags_mask_middle_segment",
511 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
512 sc, 1, igc_sysctl_tso_tcp_flags_mask, "IU",
513 "TSO TCP flags mask for middle segment");
514
515 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
516 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
517 OID_AUTO, "tso_tcp_flags_mask_last_segment",
518 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
519 sc, 2, igc_sysctl_tso_tcp_flags_mask, "IU",
520 "TSO TCP flags mask for last segment");
521
500 /* Determine hardware and mac info */
501 igc_identify_hardware(ctx);
502
503 scctx->isc_tx_nsegments = IGC_MAX_SCATTER;
504 scctx->isc_nrxqsets_max = scctx->isc_ntxqsets_max = igc_set_num_queues(ctx);
505 if (bootverbose)
506 device_printf(dev, "attach_pre capping queues at %d\n",
507 scctx->isc_ntxqsets_max);

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3008 printf("\n0x00%x0 ",row);
3009 }
3010 igc_read_nvm(&sc->hw, i, 1, &eeprom_data);
3011 printf("%04x ", eeprom_data);
3012 }
3013 printf("\n");
3014}
3015
522 /* Determine hardware and mac info */
523 igc_identify_hardware(ctx);
524
525 scctx->isc_tx_nsegments = IGC_MAX_SCATTER;
526 scctx->isc_nrxqsets_max = scctx->isc_ntxqsets_max = igc_set_num_queues(ctx);
527 if (bootverbose)
528 device_printf(dev, "attach_pre capping queues at %d\n",
529 scctx->isc_ntxqsets_max);

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3030 printf("\n0x00%x0 ",row);
3031 }
3032 igc_read_nvm(&sc->hw, i, 1, &eeprom_data);
3033 printf("%04x ", eeprom_data);
3034 }
3035 printf("\n");
3036}
3037
3038static int
3039igc_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS)
3040{
3041 struct igc_softc *sc;
3042 u32 reg, val, shift;
3043 int error, mask;
3044
3045 sc = oidp->oid_arg1;
3046 switch (oidp->oid_arg2) {
3047 case 0:
3048 reg = IGC_DTXTCPFLGL;
3049 shift = 0;
3050 break;
3051 case 1:
3052 reg = IGC_DTXTCPFLGL;
3053 shift = 16;
3054 break;
3055 case 2:
3056 reg = IGC_DTXTCPFLGH;
3057 shift = 0;
3058 break;
3059 default:
3060 return (EINVAL);
3061 break;
3062 }
3063 val = IGC_READ_REG(&sc->hw, reg);
3064 mask = (val >> shift) & 0xfff;
3065 error = sysctl_handle_int(oidp, &mask, 0, req);
3066 if (error != 0 || req->newptr == NULL)
3067 return (error);
3068 if (mask < 0 || mask > 0xfff)
3069 return (EINVAL);
3070 val = (val & ~(0xfff << shift)) | (mask << shift);
3071 IGC_WRITE_REG(&sc->hw, reg, val);
3072 return (0);
3073}
3074
3016/*
3017 * Set flow control using sysctl:
3018 * Flow control values:
3019 * 0 - off
3020 * 1 - rx pause
3021 * 2 - tx pause
3022 * 3 - full
3023 */

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3075/*
3076 * Set flow control using sysctl:
3077 * Flow control values:
3078 * 0 - off
3079 * 1 - rx pause
3080 * 2 - tx pause
3081 * 3 - full
3082 */

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