z8530.h (718cf2ccb9956613756ab15d7a0e28f2c8e91cab) z8530.h (a4ec123c569adc860c69827bc54c306b333c924b)
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2003 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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27 *
28 * $FreeBSD$
29 */
30
31#ifndef _DEV_IC_Z8530_H_
32#define _DEV_IC_Z8530_H_
33
34/*
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2003 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 18 unchanged lines hidden (view full) ---

27 *
28 * $FreeBSD$
29 */
30
31#ifndef _DEV_IC_Z8530_H_
32#define _DEV_IC_Z8530_H_
33
34/*
35 * Channel B control: 0
36 * Channel B data: 1
37 * Channel A control: 2
38 * Channel A data: 3
35 * legacy: SUN compatible
36 * escc: Macintosh
37 * legacy escc
38 * Channel B control: 0 0
39 * Channel B data: 1 1
40 * Channel A control: 2 16
41 * Channel A data: 3 17
39 */
40
42 */
43
41/* The following apply when using a device-scoped bus handle */
42#define CHAN_A 2
43#define CHAN_B 0
44
45#define REG_CTRL 0
46#define REG_DATA 1
47
48/* Write registers. */
49#define WR_CR 0 /* Command Register. */
50#define WR_IDT 1 /* Interrupt and Data Transfer Mode. */
51#define WR_IV 2 /* Interrupt Vector (shared). */
52#define WR_RPC 3 /* Receive Parameters and Control. */

--- 205 unchanged lines hidden --- 		44#define REG_CTRL 0
45#define REG_DATA 1
46
47/* Write registers. */
48#define WR_CR 0 /* Command Register. */
49#define WR_IDT 1 /* Interrupt and Data Transfer Mode. */
50#define WR_IV 2 /* Interrupt Vector (shared). */
51#define WR_RPC 3 /* Receive Parameters and Control. */

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