osbsd.h (9c79794016d679440487dea61b3b986397c9ecbb) osbsd.h (1713e81b9cdf06d2a9a365a7ded13a54fad84798)
1/*
1/*
2 * Copyright (c) 2004-2005 HighPoint Technologies, Inc.
2 * Copyright (c) 2003-2004 HighPoint Technologies, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright

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26 * $FreeBSD$
27 */
28#ifndef _OSBSD_H_
29#define _OSBSD_H_
30
31#include <sys/bus.h>
32#include <sys/resource.h>
33#include <sys/eventhandler.h>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright

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26 * $FreeBSD$
27 */
28#ifndef _OSBSD_H_
29#define _OSBSD_H_
30
31#include <sys/bus.h>
32#include <sys/resource.h>
33#include <sys/eventhandler.h>
34#include <sys/devicestat.h>
35
34
36#if (__FreeBSD_version < 500043)
37#include <stddef.h>
38#include <sys/buf.h>
39#endif
40
41#include <vm/vm.h>
42#include <vm/pmap.h>
43#include <vm/vm_extern.h>
44
45#if (__FreeBSD_version < 600000)
46#include <machine/bus_memio.h>
35#include <machine/bus_memio.h>
47#endif
48#include <machine/bus.h>
49#include <machine/resource.h>
50#include <machine/bus.h>
36#include <machine/bus.h>
37#include <machine/resource.h>
38#include <machine/bus.h>
51
52#include <sys/rman.h>
53
54#include <cam/cam.h>
55#include <cam/cam_ccb.h>
56#include <cam/cam_debug.h>
57#include <cam/cam_sim.h>
58#include <cam/cam_xpt_sim.h>
59#include <cam/cam_periph.h>
39#include <sys/rman.h>
40
41#include <cam/cam.h>
42#include <cam/cam_ccb.h>
43#include <cam/cam_debug.h>
44#include <cam/cam_sim.h>
45#include <cam/cam_xpt_sim.h>
46#include <cam/cam_periph.h>
60
61#include <cam/scsi/scsi_all.h>
62#include <cam/scsi/scsi_message.h>
63
47#include <cam/scsi/scsi_all.h>
48#include <cam/scsi/scsi_message.h>
49
64
65
66extern intrmask_t lock_driver(void);
67extern void unlock_driver(intrmask_t spl);
68
69typedef struct
70{
50extern intrmask_t lock_driver(void);
51extern void unlock_driver(intrmask_t spl);
52
53typedef struct
54{
71 UCHAR status; /* 0 nonbootable; 80h bootable */
55 UCHAR status; /* 0 nonbootable; 80h bootable */
72 UCHAR start_head;
73 USHORT start_sector;
74 UCHAR type;
75 UCHAR end_head;
76 USHORT end_sector;
77 ULONG start_abs_sector;
78 ULONG num_of_sector;
79} partition;

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97 UCHAR RelativeAddressing : 1;
98 UCHAR VendorId[8];
99 UCHAR ProductId[16];
100 UCHAR ProductRevisionLevel[4];
101 UCHAR VendorSpecific[20];
102 UCHAR Reserved3[40];
103} INQUIRYDATA, *PINQUIRYDATA;
104
56 UCHAR start_head;
57 USHORT start_sector;
58 UCHAR type;
59 UCHAR end_head;
60 USHORT end_sector;
61 ULONG start_abs_sector;
62 ULONG num_of_sector;
63} partition;

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81 UCHAR RelativeAddressing : 1;
82 UCHAR VendorId[8];
83 UCHAR ProductId[16];
84 UCHAR ProductRevisionLevel[4];
85 UCHAR VendorSpecific[20];
86 UCHAR Reserved3[40];
87} INQUIRYDATA, *PINQUIRYDATA;
88
89typedef struct _READ_CAPACITY_DATA {
90 ULONG LogicalBlockAddress;
91 ULONG BytesPerBlock;
92} READ_CAPACITY_DATA, *PREAD_CAPACITY_DATA;
93
105#define MV_IAL_HT_SACOALT_DEFAULT 1
106#define MV_IAL_HT_SAITMTH_DEFAULT 1
107
108/****************************************/
109/* GENERAL Definitions */
110/****************************************/
111
112/* Bits for HD_ERROR */
94#define MV_IAL_HT_SACOALT_DEFAULT 1
95#define MV_IAL_HT_SAITMTH_DEFAULT 1
96
97/****************************************/
98/* GENERAL Definitions */
99/****************************************/
100
101/* Bits for HD_ERROR */
113#define NM_ERR 0x02 /* media present */
114#define ABRT_ERR 0x04 /* Command aborted */
102#define NM_ERR 0x02 /* media present */
103#define ABRT_ERR 0x04 /* Command aborted */
115#define MCR_ERR 0x08 /* media change request */
116#define IDNF_ERR 0x10 /* ID field not found */
117#define MC_ERR 0x20 /* media changed */
118#define UNC_ERR 0x40 /* Uncorrect data */
119#define WP_ERR 0x40 /* write protect */
120#define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
121
104#define MCR_ERR 0x08 /* media change request */
105#define IDNF_ERR 0x10 /* ID field not found */
106#define MC_ERR 0x20 /* media changed */
107#define UNC_ERR 0x40 /* Uncorrect data */
108#define WP_ERR 0x40 /* write protect */
109#define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
110
122#define REQUESTS_ARRAY_SIZE (9 * MV_EDMA_REQUEST_QUEUE_SIZE) /* 9 K bytes */
123#define RESPONSES_ARRAY_SIZE (12 * MV_EDMA_RESPONSE_QUEUE_SIZE) /* 3 K bytes */
111#define REQUESTS_ARRAY_SIZE (9 * MV_EDMA_REQUEST_QUEUE_SIZE) /* 9 K bytes */
112#define RESPONSES_ARRAY_SIZE (12*MV_EDMA_RESPONSE_QUEUE_SIZE) /* 3 K bytes */
124
113
125#define PRD_ENTRIES_PER_CMD (MAX_SG_DESCRIPTORS+1)
126#define PRD_ENTRIES_SIZE (MV_EDMA_PRD_ENTRY_SIZE*PRD_ENTRIES_PER_CMD)
127#define PRD_TABLES_FOR_VBUS (MV_SATA_CHANNELS_NUM*MV_EDMA_QUEUE_LENGTH)
114#define PRD_ENTRIES_PER_CMD (MAX_SG_DESCRIPTORS+1)
115#define PRD_ENTRIES_SIZE (MV_EDMA_PRD_ENTRY_SIZE*PRD_ENTRIES_PER_CMD)
116#define PRD_TABLES_FOR_VBUS (MV_SATA_CHANNELS_NUM*MV_EDMA_QUEUE_LENGTH)
128
117
129typedef enum _SataEvent
130{
118typedef enum _SataEvent {
131 SATA_EVENT_NO_CHANGE = 0,
132 SATA_EVENT_CHANNEL_CONNECTED,
133 SATA_EVENT_CHANNEL_DISCONNECTED
134} SATA_EVENT;
135
136typedef ULONG_PTR dma_addr_t;
137
119 SATA_EVENT_NO_CHANGE = 0,
120 SATA_EVENT_CHANNEL_CONNECTED,
121 SATA_EVENT_CHANNEL_DISCONNECTED
122} SATA_EVENT;
123
124typedef ULONG_PTR dma_addr_t;
125
138typedef struct _MV_CHANNEL
139{
126typedef struct _MV_CHANNEL {
140 unsigned int maxUltraDmaModeSupported;
141 unsigned int maxDmaModeSupported;
142 unsigned int maxPioModeSupported;
143 MV_BOOLEAN online;
127 unsigned int maxUltraDmaModeSupported;
128 unsigned int maxDmaModeSupported;
129 unsigned int maxPioModeSupported;
130 MV_BOOLEAN online;
144 MV_BOOLEAN writeCacheSupported;
145 MV_BOOLEAN writeCacheEnabled;
146 MV_BOOLEAN readAheadSupported;
147 MV_BOOLEAN readAheadEnabled;
148 MV_U8 queueDepth;
149
150} MV_CHANNEL;
151
131} MV_CHANNEL;
132
152typedef struct _BUS_DMAMAP
153{ struct _BUS_DMAMAP *next;
154 struct IALAdapter *pAdapter;
155 bus_dmamap_t dma_map;
156 SCAT_GATH psg[MAX_SG_DESCRIPTORS];
157} BUS_DMAMAP, *PBUS_DMAMAP;
133struct _privCommand;
158
134
159typedef struct IALAdapter
160{
135typedef struct IALAdapter {
161 struct cam_path *path;
136 struct cam_path *path;
162
163 bus_dma_tag_t io_dma_parent; /* I/O buffer DMA tag */
164 PBUS_DMAMAP pbus_dmamap_list;
165 PBUS_DMAMAP pbus_dmamap;
166
167 device_t hpt_dev; /* bus device */
168 struct resource *hpt_irq; /* interrupt */
137 device_t hpt_dev; /* bus device */
138 struct resource *hpt_irq; /* interrupt */
139 void *hpt_intr; /* interrupt handle */
169 struct resource *mem_res;
140 struct resource *mem_res;
170 void *hpt_intr; /* interrupt handle */
171 struct IALAdapter *next;
141 bus_space_handle_t mem_bsh;
142 bus_space_tag_t mem_btag;
143 bus_dma_tag_t parent_dmat;
144 bus_dma_tag_t req_dmat;
145 bus_dmamap_t req_map;
146 bus_dma_tag_t resp_dmat;
147 bus_dmamap_t resp_map;
148 bus_dma_tag_t prd_dmat;
149 bus_dmamap_t prd_map;
150 bus_dma_tag_t buf_dmat;
151
152 struct IALAdapter *next;
172
153
173 MV_SATA_ADAPTER mvSataAdapter;
174 MV_CHANNEL mvChannel[MV_SATA_CHANNELS_NUM];
175 MV_U8 *requestsArrayBaseAddr;
176 MV_U8 *requestsArrayBaseAlignedAddr;
177 dma_addr_t requestsArrayBaseDmaAddr;
178 dma_addr_t requestsArrayBaseDmaAlignedAddr;
179 MV_U8 *responsesArrayBaseAddr;
180 MV_U8 *responsesArrayBaseAlignedAddr;
181 dma_addr_t responsesArrayBaseDmaAddr;
182 dma_addr_t responsesArrayBaseDmaAlignedAddr;
183 SATA_EVENT sataEvents[MV_SATA_CHANNELS_NUM];
154 MV_SATA_ADAPTER mvSataAdapter;
155 MV_CHANNEL mvChannel[MV_SATA_CHANNELS_NUM];
156 MV_U8 *requestsArrayBaseAddr;
157 MV_U8 *requestsArrayBaseAlignedAddr;
158 dma_addr_t requestsArrayBaseDmaAddr;
159 dma_addr_t requestsArrayBaseDmaAlignedAddr;
160 MV_U8 *responsesArrayBaseAddr;
161 MV_U8 *responsesArrayBaseAlignedAddr;
162 dma_addr_t responsesArrayBaseDmaAddr;
163 dma_addr_t responsesArrayBaseDmaAlignedAddr;
164 SATA_EVENT sataEvents[MV_SATA_CHANNELS_NUM];
184
185 struct callout_handle event_timer_connect;
186 struct callout_handle event_timer_disconnect;
187
165
166 struct callout_handle event_timer_connect;
167 struct callout_handle event_timer_disconnect;
168
188 struct _VBus VBus;
189 struct _VDevice VDevices[MV_SATA_CHANNELS_NUM];
190 PCommand pCommandBlocks;
191 PUCHAR prdTableAddr;
192 PUCHAR prdTableAlignedAddr;
193 void* pFreePRDLink;
169 struct _VBus VBus;
170 struct _VDevice VDevices[MV_SATA_CHANNELS_NUM];
171 PCommand pCommandBlocks;
172 struct _privCommand *pPrivateBlocks;
173 TAILQ_HEAD(, _privCommand) PrivCmdTQH;
174 PUCHAR prdTableAddr;
175 ULONG prdTableDmaAddr;
176 void* pFreePRDLink;
194
177
195 union ccb *pending_Q;
178 union ccb *pending_Q;
196
179
197 MV_U8 outstandingCommands;
180 MV_U8 outstandingCommands;
198
181
199 UCHAR status;
200 UCHAR ver_601;
201 UCHAR beeping;
182 UCHAR status;
183 UCHAR ver_601;
184 UCHAR beeping;
202
203 eventhandler_tag eh;
185
186 eventhandler_tag eh;
204}
205IAL_ADAPTER_T;
187} IAL_ADAPTER_T;
206
188
189typedef struct _privCommand {
190 TAILQ_ENTRY(_privCommand) PrivEntry;
191 IAL_ADAPTER_T *pAdapter;
192 union ccb *ccb;
193 bus_dmamap_t buf_map;
194} *pPrivCommand;
195
207extern IAL_ADAPTER_T *gIal_Adapter;
208
209/*entry.c*/
210typedef void (*HPT_DPC)(IAL_ADAPTER_T *,void*,UCHAR);
196extern IAL_ADAPTER_T *gIal_Adapter;
197
198/*entry.c*/
199typedef void (*HPT_DPC)(IAL_ADAPTER_T *,void*,UCHAR);
211
212int hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T *pAdapter, void *arg, UCHAR flags);
200int hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T *pAdapter, void *arg, UCHAR flags);
213void hpt_rebuild_data_block(IAL_ADAPTER_T *pAdapter, PVDevice pArray, UCHAR flags);
201void hpt_rebuild_data_block(IAL_ADAPTER_T *pAdapter, PVDevice pArray,
202 UCHAR flags);
214void Check_Idle_Call(IAL_ADAPTER_T *pAdapter);
203void Check_Idle_Call(IAL_ADAPTER_T *pAdapter);
204int Kernel_DeviceIoControl(_VBUS_ARG DWORD dwIoControlCode, PVOID lpInBuffer,
205 DWORD nInBufferSize, PVOID lpOutBuffer, DWORD nOutBufferSize,
206 PDWORD lpBytesReturned);
215void fRescanAllDevice(_VBUS_ARG0);
216int hpt_add_disk_to_array(_VBUS_ARG DEVICEID idArray, DEVICEID idDisk);
217
207void fRescanAllDevice(_VBUS_ARG0);
208int hpt_add_disk_to_array(_VBUS_ARG DEVICEID idArray, DEVICEID idDisk);
209
218int Kernel_DeviceIoControl(_VBUS_ARG
219 DWORD dwIoControlCode, /* operation control code */
220 PVOID lpInBuffer, /* input data buffer */
221 DWORD nInBufferSize, /* size of input data buffer */
222 PVOID lpOutBuffer, /* output data buffer */
223 DWORD nOutBufferSize, /* size of output data buffer */
224 PDWORD lpBytesReturned /* byte count */
225 );
226
210
227
228#define __str_direct(x) #x
229#define __str(x) __str_direct(x)
230#define KMSG_LEADING __str(PROC_DIR_NAME) ": "
211#define __str_direct(x) #x
212#define __str(x) __str_direct(x)
213#define KMSG_LEADING __str(PROC_DIR_NAME) ": "
231#define hpt_printk(_x_) do { printf(KMSG_LEADING); printf _x_ ; } while (0)
214#define hpt_printk(_x_) do { \
215 printf(KMSG_LEADING); \
216 printf _x_ ; \
217} while (0)
232
233#define DUPLICATE 0
234#define INITIALIZE 1
235#define REBUILD_PARITY 2
236#define VERIFY 3
237
218
219#define DUPLICATE 0
220#define INITIALIZE 1
221#define REBUILD_PARITY 2
222#define VERIFY 3
223
238/***********************************************************/
239
224extern char DRIVER_VERSION[];
225/**********************************************************/
240static __inline struct cam_periph *
241hpt_get_periph(int path_id,int target_id)
242{
226static __inline struct cam_periph *
227hpt_get_periph(int path_id,int target_id)
228{
243 struct cam_periph *periph = NULL;
244 struct cam_path *path;
245 int status;
229 struct cam_periph *periph = NULL;
230 struct cam_path *path;
231 int status;
246
232
247 status = xpt_create_path(&path, NULL, path_id, target_id, 0);
248 if (status == CAM_REQ_CMP) {
249 periph = cam_periph_find(path, "da");
233 status = xpt_create_path(&path, NULL, path_id, target_id, 0);
234 if (status == CAM_REQ_CMP) {
235 periph = cam_periph_find(path, NULL);
250 xpt_free_path(path);
236 xpt_free_path(path);
251
252 }
237 if (periph != NULL) {
238 if (strncmp(periph->periph_name, "da", 2))
239 periph = NULL;
240 }
241 }
253 return periph;
254}
255
242 return periph;
243}
244
256#if (__FreeBSD_version < 500000)
257#define YIELD_THREAD yield(curproc, 0)
258#endif
245static __inline void
246FreePrivCommand(IAL_ADAPTER_T *pAdapter, pPrivCommand prvCmd)
247{
248 TAILQ_INSERT_TAIL(&pAdapter->PrivCmdTQH, prvCmd, PrivEntry);
249}
259
250
260#ifdef __i386__
261#define BITS_PER_LONG 32
262#define VDEV_TO_ID(pVDev) (DEVICEID)(pVDev)
263#define ID_TO_VDEV(id) (PVDevice)(id)
264#else /*Only support x86_64(AMD64 and EM64T)*/
265#define BITS_PER_LONG 64
266#define VDEV_TO_ID(pVDev) (DEVICEID)(ULONG_PTR)(pVDev)
267#define ID_TO_VDEV(id) (PVDevice)(((ULONG_PTR)gIal_Adapter & 0xffffffff00000000) | (id))
268#endif
251static __inline pPrivCommand
252AllocPrivCommand(IAL_ADAPTER_T *pAdapter)
253{
254 pPrivCommand prvCmd;
269
255
270#define INVALID_DEVICEID (-1)
271#define INVALID_STRIPSIZE (-1)
256 prvCmd = TAILQ_FIRST(&pAdapter->PrivCmdTQH);
257 if (prvCmd == NULL)
258 return NULL;
272
259
273#define shortswap(w) ((WORD)((w)>>8 | ((w) & 0xFF)<<8))
260 TAILQ_REMOVE(&pAdapter->PrivCmdTQH, prvCmd, PrivEntry);
261 return (prvCmd);
262}
274
263
275#ifndef MinBlockSizeShift
276#define MinBlockSizeShift 5
277#define MaxBlockSizeShift 12
278#endif
279
280#pragma pack(1)
281typedef struct _HPT_IOCTL_TRANSFER_PARAM
264static __inline void
265mv_reg_write_byte(MV_BUS_ADDR_T base, MV_U32 offset, MV_U8 val)
282{
266{
283 ULONG nInBufferSize;
284 ULONG nOutBufferSize;
285 UCHAR buffer[0];
286}HPT_IOCTL_TRANSFER_PARAM, *PHPT_IOCTL_TRANSFER_PARAM;
267 IAL_ADAPTER_T *pAdapter;
268
269 pAdapter = base;
270 bus_space_write_1(pAdapter->mem_btag, pAdapter->mem_bsh, offset, val);
271}
287
272
288typedef struct _HPT_SET_STATE_PARAM
273static __inline void
274mv_reg_write_word(MV_BUS_ADDR_T base, MV_U32 offset, MV_U16 val)
289{
275{
290 DEVICEID idArray;
291 DWORD state;
292} HPT_SET_STATE_PARAM, *PHPT_SET_STATE_PARAM;
276 IAL_ADAPTER_T *pAdapter;
277
278 pAdapter = base;
279 bus_space_write_2(pAdapter->mem_btag, pAdapter->mem_bsh, offset, val);
280}
293
281
294typedef struct _HPT_SET_ARRAY_INFO
282static __inline void
283mv_reg_write_dword(MV_BUS_ADDR_T base, MV_U32 offset, MV_U32 val)
295{
284{
296 DEVICEID idArray;
297 ALTERABLE_ARRAY_INFO Info;
298} HPT_SET_ARRAY_INFO, *PHPT_SET_ARRAY_INFO;
285 IAL_ADAPTER_T *pAdapter;
299
286
300typedef struct _HPT_SET_DEVICE_INFO
301{
302 DEVICEID idDisk;
303 ALTERABLE_DEVICE_INFO Info;
304} HPT_SET_DEVICE_INFO, *PHPT_SET_DEVICE_INFO;
287 pAdapter = base;
288 bus_space_write_4(pAdapter->mem_btag, pAdapter->mem_bsh, offset, val);
289}
305
290
306typedef struct _HPT_SET_DEVICE_INFO_V2
291static __inline MV_U8
292mv_reg_read_byte(MV_BUS_ADDR_T base, MV_U32 offset)
307{
293{
308 DEVICEID idDisk;
309 ALTERABLE_DEVICE_INFO_V2 Info;
310} HPT_SET_DEVICE_INFO_V2, *PHPT_SET_DEVICE_INFO_V2;
294 IAL_ADAPTER_T *pAdapter;
295
296 pAdapter = base;
297 return (bus_space_read_1(pAdapter->mem_btag, pAdapter->mem_bsh,
298 offset));
299}
311
300
312typedef struct _HPT_ADD_DISK_TO_ARRAY
301static __inline MV_U16
302mv_reg_read_word(MV_BUS_ADDR_T base, MV_U32 offset)
313{
303{
314 DEVICEID idArray;
315 DEVICEID idDisk;
316} HPT_ADD_DISK_TO_ARRAY, *PHPT_ADD_DISK_TO_ARRAY;
304 IAL_ADAPTER_T *pAdapter;
305
306 pAdapter = base;
307 return (bus_space_read_2(pAdapter->mem_btag, pAdapter->mem_bsh,
308 offset));
309}
317
310
318typedef struct _HPT_DEVICE_IO
311static __inline MV_U32
312mv_reg_read_dword(MV_BUS_ADDR_T base, MV_U32 offset)
319{
313{
320 DEVICEID id;
321 int cmd;
322 ULONG lba;
323 DWORD nSector;
324 UCHAR buffer[0];
325} HPT_DEVICE_IO, *PHPT_DEVICE_IO;
314 IAL_ADAPTER_T *pAdapter;
315
316 pAdapter = base;
317 return (bus_space_read_4(pAdapter->mem_btag, pAdapter->mem_bsh,
318 offset));
319}
326
320
327int check_VDevice_valid(PVDevice);
328int hpt_default_ioctl(_VBUS_ARG DWORD, PVOID, DWORD, PVOID, DWORD, PDWORD);
329
330#define HPT_NULL_ID 0
331
332#pragma pack()
333
334#endif
321#endif