mvSata.h (9c79794016d679440487dea61b3b986397c9ecbb) mvSata.h (1713e81b9cdf06d2a9a365a7ded13a54fad84798)
1/*
1/*
2 * Copyright (c) 2004-2005 MARVELL SEMICONDUCTOR ISRAEL, LTD.
2 * Copyright (c) 2003-2004 MARVELL SEMICONDUCTOR ISRAEL, LTD.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright

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17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright

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17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28#ifndef __INCmvSatah
29#define __INCmvSatah
30
31#ifndef SUPPORT_MV_SATA_GEN_1
32#define SUPPORT_MV_SATA_GEN_1 1
33#endif
34
35#ifndef SUPPORT_MV_SATA_GEN_2
36#define SUPPORT_MV_SATA_GEN_2 0
37#endif
38
25 */
26#ifndef __INCmvSatah
27#define __INCmvSatah
28
29#ifndef SUPPORT_MV_SATA_GEN_1
30#define SUPPORT_MV_SATA_GEN_1 1
31#endif
32
33#ifndef SUPPORT_MV_SATA_GEN_2
34#define SUPPORT_MV_SATA_GEN_2 0
35#endif
36
39#ifndef SUPPORT_MV_SATA_GEN_2E
40#define SUPPORT_MV_SATA_GEN_2E 0
41#endif
42
43#if (SUPPORT_MV_SATA_GEN_1 + SUPPORT_MV_SATA_GEN_2 + SUPPORT_MV_SATA_GEN_2E) > 1
44
37#if SUPPORT_MV_SATA_GEN_1==1 && SUPPORT_MV_SATA_GEN_2==1
45#define MV_SATA_GEN_1(x) ((x)->sataAdapterGeneration==1)
38#define MV_SATA_GEN_1(x) ((x)->sataAdapterGeneration==1)
46#define MV_SATA_GEN_2(x) ((x)->sataAdapterGeneration>=2)
47#define MV_SATA_GEN_2E(x) ((x)->sataAdapterGeneration==3)
48
39#define MV_SATA_GEN_2(x) ((x)->sataAdapterGeneration==2)
49#elif SUPPORT_MV_SATA_GEN_1==1
40#elif SUPPORT_MV_SATA_GEN_1==1
50
51#define MV_SATA_GEN_1(x) 1
52#define MV_SATA_GEN_2(x) 0
41#define MV_SATA_GEN_1(x) 1
42#define MV_SATA_GEN_2(x) 0
53#define MV_SATA_GEN_2E(x) 0
54
55#elif SUPPORT_MV_SATA_GEN_2==1
43#elif SUPPORT_MV_SATA_GEN_2==1
56
57#define MV_SATA_GEN_1(x) 0
58#define MV_SATA_GEN_2(x) 1
44#define MV_SATA_GEN_1(x) 0
45#define MV_SATA_GEN_2(x) 1
59#define MV_SATA_GEN_2E(x) 0
60
61#elif SUPPORT_MV_SATA_GEN_2E==1
62
63#define MV_SATA_GEN_1(x) 0
64#define MV_SATA_GEN_2(x) 1 /* gen2E impiles gen2 */
65#define MV_SATA_GEN_2E(x) 1
66
67#else
68#error "Which IC do you support?"
69#endif
70
71/* Definitions */
72/* MV88SX50XX specific defines */
73#define MV_SATA_VENDOR_ID 0x11AB
74#define MV_SATA_DEVICE_ID_5080 0x5080
75#define MV_SATA_DEVICE_ID_5081 0x5081
76#define MV_SATA_DEVICE_ID_6080 0x6080
77#define MV_SATA_DEVICE_ID_6081 0x6081
46#else
47#error "Which IC do you support?"
48#endif
49
50/* Definitions */
51/* MV88SX50XX specific defines */
52#define MV_SATA_VENDOR_ID 0x11AB
53#define MV_SATA_DEVICE_ID_5080 0x5080
54#define MV_SATA_DEVICE_ID_5081 0x5081
55#define MV_SATA_DEVICE_ID_6080 0x6080
56#define MV_SATA_DEVICE_ID_6081 0x6081
78
79#if defined(RR2310) || defined(RR1740) || defined(RR2210) || defined (RR2522)
80#define MV_SATA_CHANNELS_NUM 4
81#define MV_SATA_UNITS_NUM 1
82#else
83#define MV_SATA_CHANNELS_NUM 8
84#define MV_SATA_UNITS_NUM 2
57#define MV_SATA_CHANNELS_NUM 8
58#define MV_SATA_UNITS_NUM 2
85#endif
86
87#define MV_SATA_PCI_BAR0_SPACE_SIZE (1<<18) /* 256 Kb*/
88
89#define CHANNEL_QUEUE_LENGTH 32
90#define CHANNEL_QUEUE_MASK 0x1F
91
92#define MV_EDMA_QUEUE_LENGTH 32 /* Up to 32 outstanding */
93 /* commands per SATA channel*/
94#define MV_EDMA_QUEUE_MASK 0x1F

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177struct mvSataAdapter;
178struct mvStorageDevRegisters;
179
180typedef MV_BOOLEAN (* HPTLIBAPI mvSataCommandCompletionCallBack_t)(struct mvSataAdapter *,
181 MV_U8,
182 MV_COMPLETION_TYPE,
183 MV_VOID_PTR, MV_U16,
184 MV_U32,
59#define MV_SATA_PCI_BAR0_SPACE_SIZE (1<<18) /* 256 Kb*/
60
61#define CHANNEL_QUEUE_LENGTH 32
62#define CHANNEL_QUEUE_MASK 0x1F
63
64#define MV_EDMA_QUEUE_LENGTH 32 /* Up to 32 outstanding */
65 /* commands per SATA channel*/
66#define MV_EDMA_QUEUE_MASK 0x1F

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149struct mvSataAdapter;
150struct mvStorageDevRegisters;
151
152typedef MV_BOOLEAN (* HPTLIBAPI mvSataCommandCompletionCallBack_t)(struct mvSataAdapter *,
153 MV_U8,
154 MV_COMPLETION_TYPE,
155 MV_VOID_PTR, MV_U16,
156 MV_U32,
185 struct mvStorageDevRegisters SS_SEG*);
157 struct mvStorageDevRegisters FAR*);
186
187typedef enum mvQueuedCommandType
188{
189 MV_QUEUED_COMMAND_TYPE_UDMA,
190 MV_QUEUED_COMMAND_TYPE_NONE_UDMA
191} MV_QUEUED_COMMAND_TYPE;
192
193typedef struct mvUdmaCommandParams

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243/* The following structures are part of the Core Driver API */
244typedef struct mvSataChannel
245{
246 /* Fields set by Intermediate Application Layer */
247 MV_U8 channelNumber;
248 MV_BOOLEAN waitingForInterrupt;
249 MV_BOOLEAN lba48Address;
250 MV_BOOLEAN maxReadTransfer;
158
159typedef enum mvQueuedCommandType
160{
161 MV_QUEUED_COMMAND_TYPE_UDMA,
162 MV_QUEUED_COMMAND_TYPE_NONE_UDMA
163} MV_QUEUED_COMMAND_TYPE;
164
165typedef struct mvUdmaCommandParams

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215/* The following structures are part of the Core Driver API */
216typedef struct mvSataChannel
217{
218 /* Fields set by Intermediate Application Layer */
219 MV_U8 channelNumber;
220 MV_BOOLEAN waitingForInterrupt;
221 MV_BOOLEAN lba48Address;
222 MV_BOOLEAN maxReadTransfer;
251 struct mvDmaRequestQueueEntry SS_SEG *requestQueue;
252 struct mvDmaResponseQueueEntry SS_SEG *responseQueue;
223 struct mvDmaRequestQueueEntry FAR *requestQueue;
224 struct mvDmaResponseQueueEntry FAR *responseQueue;
253 MV_U32 requestQueuePciHiAddress;
254 MV_U32 requestQueuePciLowAddress;
255 MV_U32 responseQueuePciHiAddress;
256 MV_U32 responseQueuePciLowAddress;
257 /* Fields set by CORE driver */
258 struct mvSataAdapter *mvSataAdapter;
259 MV_OS_SEMAPHORE semaphore;
260 MV_U32 eDmaRegsOffset;
261 MV_U16 identifyDevice[MV_ATA_IDENTIFY_DEV_DATA_LENGTH];
262 MV_BOOLEAN EdmaActive;
263 MV_EDMA_MODE queuedDMA;
264 MV_U8 outstandingCommands;
265 MV_BOOLEAN workAroundDone;
266 struct mvQueuedCommandEntry commandsQueue[CHANNEL_QUEUE_LENGTH];
267 struct mvQueuedCommandEntry *commandsQueueHead;
268 struct mvQueuedCommandEntry *commandsQueueTail;
269 MV_BOOLEAN queueCommandsEnabled;
270 MV_U8 noneUdmaOutstandingCommands;
271 MV_U8 EdmaQueuedCommands;
225 MV_U32 requestQueuePciHiAddress;
226 MV_U32 requestQueuePciLowAddress;
227 MV_U32 responseQueuePciHiAddress;
228 MV_U32 responseQueuePciLowAddress;
229 /* Fields set by CORE driver */
230 struct mvSataAdapter *mvSataAdapter;
231 MV_OS_SEMAPHORE semaphore;
232 MV_U32 eDmaRegsOffset;
233 MV_U16 identifyDevice[MV_ATA_IDENTIFY_DEV_DATA_LENGTH];
234 MV_BOOLEAN EdmaActive;
235 MV_EDMA_MODE queuedDMA;
236 MV_U8 outstandingCommands;
237 MV_BOOLEAN workAroundDone;
238 struct mvQueuedCommandEntry commandsQueue[CHANNEL_QUEUE_LENGTH];
239 struct mvQueuedCommandEntry *commandsQueueHead;
240 struct mvQueuedCommandEntry *commandsQueueTail;
241 MV_BOOLEAN queueCommandsEnabled;
242 MV_U8 noneUdmaOutstandingCommands;
243 MV_U8 EdmaQueuedCommands;
272 MV_U32 freeIDsStack[CHANNEL_QUEUE_LENGTH];
244 MV_U32 freeIDsStack[MV_EDMA_QUEUE_LENGTH];
273 MV_U32 freeIDsNum;
274 MV_U32 reqInPtr;
275 MV_U32 rspOutPtr;
276} MV_SATA_CHANNEL;
277
278typedef struct mvSataAdapter
279{
280 /* Fields set by Intermediate Application Layer */

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300 MV_OS_SEMAPHORE interruptsMaskSem;
301 MV_BOOLEAN implementA0Workarounds;
302 MV_BOOLEAN implement50XXB0Workarounds;
303 MV_BOOLEAN implement50XXB1Workarounds;
304 MV_BOOLEAN implement50XXB2Workarounds;
305 MV_BOOLEAN implement60X1A0Workarounds;
306 MV_BOOLEAN implement60X1A1Workarounds;
307 MV_BOOLEAN implement60X1B0Workarounds;
245 MV_U32 freeIDsNum;
246 MV_U32 reqInPtr;
247 MV_U32 rspOutPtr;
248} MV_SATA_CHANNEL;
249
250typedef struct mvSataAdapter
251{
252 /* Fields set by Intermediate Application Layer */

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272 MV_OS_SEMAPHORE interruptsMaskSem;
273 MV_BOOLEAN implementA0Workarounds;
274 MV_BOOLEAN implement50XXB0Workarounds;
275 MV_BOOLEAN implement50XXB1Workarounds;
276 MV_BOOLEAN implement50XXB2Workarounds;
277 MV_BOOLEAN implement60X1A0Workarounds;
278 MV_BOOLEAN implement60X1A1Workarounds;
279 MV_BOOLEAN implement60X1B0Workarounds;
308 MV_BOOLEAN implement7042A0Workarounds;
309 MV_BOOLEAN implement7042A1Workarounds;
310 MV_U8 sataAdapterGeneration;
280 MV_U8 sataAdapterGeneration;
311 MV_BOOLEAN isPEX;
312 MV_U8 failLEDMask;
313 MV_U8 signalAmps[MV_SATA_CHANNELS_NUM];
314 MV_U8 pre[MV_SATA_CHANNELS_NUM];
315 MV_BOOLEAN staggaredSpinup[MV_SATA_CHANNELS_NUM]; /* For 60x1 only */
316} MV_SATA_ADAPTER;
317
318typedef struct mvSataAdapterStatus
319{

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418
419MV_BOOLEAN HPTLIBAPI mvSataChannelSetEdmaLoopBackMode(MV_SATA_ADAPTER *pAdapter,
420 MV_U8 channelIndex,
421 MV_BOOLEAN loopBackOn);
422
423MV_BOOLEAN HPTLIBAPI mvSataGetChannelStatus(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
424 MV_SATA_CHANNEL_STATUS *pChannelStatus);
425
281 MV_U8 failLEDMask;
282 MV_U8 signalAmps[MV_SATA_CHANNELS_NUM];
283 MV_U8 pre[MV_SATA_CHANNELS_NUM];
284 MV_BOOLEAN staggaredSpinup[MV_SATA_CHANNELS_NUM]; /* For 60x1 only */
285} MV_SATA_ADAPTER;
286
287typedef struct mvSataAdapterStatus
288{

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387
388MV_BOOLEAN HPTLIBAPI mvSataChannelSetEdmaLoopBackMode(MV_SATA_ADAPTER *pAdapter,
389 MV_U8 channelIndex,
390 MV_BOOLEAN loopBackOn);
391
392MV_BOOLEAN HPTLIBAPI mvSataGetChannelStatus(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
393 MV_SATA_CHANNEL_STATUS *pChannelStatus);
394
395/* Execute UDMA ATA commands */
396MV_EDMA_QUEUE_RESULT HPTLIBAPI mvSataQueueUDmaCommand(MV_SATA_ADAPTER *pAdapter,
397 MV_U8 channelIndex,
398 MV_UDMA_TYPE readWrite,
399 MV_U32 lowLBAAddr,
400 MV_U16 highLBAAddr,
401 MV_U16 sectorCount,
402 MV_U32 prdLowAddr,
403 MV_U32 prdHighAddr,
404 mvSataCommandCompletionCallBack_t callBack,
405 MV_VOID_PTR commandId);
406
426MV_QUEUE_COMMAND_RESULT HPTLIBAPI mvSataQueueCommand(MV_SATA_ADAPTER *pAdapter,
427 MV_U8 channelIndex,
407MV_QUEUE_COMMAND_RESULT HPTLIBAPI mvSataQueueCommand(MV_SATA_ADAPTER *pAdapter,
408 MV_U8 channelIndex,
428 MV_QUEUE_COMMAND_INFO SS_SEG *pCommandParams);
409 MV_QUEUE_COMMAND_INFO FAR *pCommandParams);
429
430/* Interrupt Service Routine */
431MV_BOOLEAN HPTLIBAPI mvSataInterruptServiceRoutine(MV_SATA_ADAPTER *pAdapter);
432
433MV_BOOLEAN HPTLIBAPI mvSataMaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
434
435MV_BOOLEAN HPTLIBAPI mvSataUnmaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
436

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411/* Interrupt Service Routine */
412MV_BOOLEAN HPTLIBAPI mvSataInterruptServiceRoutine(MV_SATA_ADAPTER *pAdapter);
413
414MV_BOOLEAN HPTLIBAPI mvSataMaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
415
416MV_BOOLEAN HPTLIBAPI mvSataUnmaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
417

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