ena_datapath.c (4af71159db3cd4a37055b2b3d982ec53703c5c3d) ena_datapath.c (a33ec635d1f6d574d54e6f6d74766d070183be4c)
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 63 unchanged lines hidden (view full) ---

72 if_t ifp = adapter->ifp;
73 struct ena_ring *tx_ring;
74 struct ena_ring *rx_ring;
75 struct ena_com_io_cq *io_cq;
76 struct ena_eth_io_intr_reg intr_reg;
77 int qid, ena_qid;
78 int txc, rxc, i;
79
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 63 unchanged lines hidden (view full) ---

72 if_t ifp = adapter->ifp;
73 struct ena_ring *tx_ring;
74 struct ena_ring *rx_ring;
75 struct ena_com_io_cq *io_cq;
76 struct ena_eth_io_intr_reg intr_reg;
77 int qid, ena_qid;
78 int txc, rxc, i;
79
80 if (unlikely((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0))
81 return;
82
83 ena_log_io(adapter->pdev, DBG, "MSI-X TX/RX routine\n");
84
85 tx_ring = que->tx_ring;
86 rx_ring = que->rx_ring;
87 qid = que->id;
88 ena_qid = ENA_IO_TXQ_IDX(qid);
89 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
90
80 tx_ring = que->tx_ring;
81 rx_ring = que->rx_ring;
82 qid = que->id;
83 ena_qid = ENA_IO_TXQ_IDX(qid);
84 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
85
86 atomic_store_8(&tx_ring->cleanup_running, 1);
87 /* Need to make sure that ENA_FLAG_TRIGGER_RESET is visible to ena_cleanup() and
88 * that cleanup_running is visible to check_missing_comp_in_tx_queue() to
89 * prevent the case of accessing CQ concurrently with check_cdesc_in_tx_cq()
90 */
91 mb();
92 if (unlikely(((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) ||
93 (ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter))))
94 return;
95
96 ena_log_io(adapter->pdev, DBG, "MSI-X TX/RX routine\n");
97
91 atomic_store_8(&tx_ring->first_interrupt, 1);
92 atomic_store_8(&rx_ring->first_interrupt, 1);
93
94 for (i = 0; i < ENA_CLEAN_BUDGET; ++i) {
95 rxc = ena_rx_cleanup(rx_ring);
96 txc = ena_tx_cleanup(tx_ring);
97
98 atomic_store_8(&tx_ring->first_interrupt, 1);
99 atomic_store_8(&rx_ring->first_interrupt, 1);
100
101 for (i = 0; i < ENA_CLEAN_BUDGET; ++i) {
102 rxc = ena_rx_cleanup(rx_ring);
103 txc = ena_tx_cleanup(tx_ring);
104
98 if (unlikely((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0))
105 if (unlikely(((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) ||
106 (ENA_FLAG_ISSET(ENA_FLAG_TRIGGER_RESET, adapter))))
99 return;
100
101 if ((txc != ENA_TX_BUDGET) && (rxc != ENA_RX_BUDGET))
102 break;
103 }
104
105 /* Signal that work is done and unmask interrupt */
106 ena_com_update_intr_reg(&intr_reg, ENA_RX_IRQ_INTERVAL,
107 ENA_TX_IRQ_INTERVAL, true, false);
108 counter_u64_add(tx_ring->tx_stats.unmask_interrupt_num, 1);
109 ena_com_unmask_intr(io_cq, &intr_reg);
107 return;
108
109 if ((txc != ENA_TX_BUDGET) && (rxc != ENA_RX_BUDGET))
110 break;
111 }
112
113 /* Signal that work is done and unmask interrupt */
114 ena_com_update_intr_reg(&intr_reg, ENA_RX_IRQ_INTERVAL,
115 ENA_TX_IRQ_INTERVAL, true, false);
116 counter_u64_add(tx_ring->tx_stats.unmask_interrupt_num, 1);
117 ena_com_unmask_intr(io_cq, &intr_reg);
118 atomic_store_8(&tx_ring->cleanup_running, 0);
110}
111
112void
113ena_deferred_mq_start(void *arg, int pending)
114{
115 struct ena_ring *tx_ring = (struct ena_ring *)arg;
116 if_t ifp = tx_ring->adapter->ifp;
117

--- 1027 unchanged lines hidden --- 		119}
120
121void
122ena_deferred_mq_start(void *arg, int pending)
123{
124 struct ena_ring *tx_ring = (struct ena_ring *)arg;
125 if_t ifp = tx_ring->adapter->ifp;
126

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