ena.h (5a9902126ef49e29cec67e9020802063c8579b55) ena.h (3cfadb28c3f6f21cb937f7331bfa066c0edda29c)
1/*-
2 * BSD LICENSE
3 *
4 * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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98 * How many times we can repeat cleanup in the io irq handling routine if the
99 * RX or TX budget was depleted.
100 */
101#define CLEAN_BUDGET 8
102
103#define RX_IRQ_INTERVAL 20
104#define TX_IRQ_INTERVAL 50
105
1/*-
2 * BSD LICENSE
3 *
4 * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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98 * How many times we can repeat cleanup in the io irq handling routine if the
99 * RX or TX budget was depleted.
100 */
101#define CLEAN_BUDGET 8
102
103#define RX_IRQ_INTERVAL 20
104#define TX_IRQ_INTERVAL 50
105
106#define ENA_MIN_MTU 128
107
106#define ENA_TSO_MAXSIZE 65536
107
108#define ENA_MMIO_DISABLE_REG_READ BIT(0)
109
110#define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
111
112#define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
113

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321 struct msix_entry *msix_entries;
322 int msix_vecs;
323
324 /* DMA tags used throughout the driver adapter for Tx and Rx */
325 bus_dma_tag_t tx_buf_tag;
326 bus_dma_tag_t rx_buf_tag;
327 int dma_width;
328
108#define ENA_TSO_MAXSIZE 65536
109
110#define ENA_MMIO_DISABLE_REG_READ BIT(0)
111
112#define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
113
114#define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
115

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323 struct msix_entry *msix_entries;
324 int msix_vecs;
325
326 /* DMA tags used throughout the driver adapter for Tx and Rx */
327 bus_dma_tag_t tx_buf_tag;
328 bus_dma_tag_t rx_buf_tag;
329 int dma_width;
330
331 uint32_t max_mtu;
332
329 uint16_t max_tx_sgl_size;
330 uint16_t max_rx_sgl_size;
331
332 uint32_t tx_offload_cap;
333
334 /* Tx fast path data */
335 int num_queues;
336

--- 63 unchanged lines hidden --- 		333 uint16_t max_tx_sgl_size;
334 uint16_t max_rx_sgl_size;
335
336 uint32_t tx_offload_cap;
337
338 /* Tx fast path data */
339 int num_queues;
340

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