ata-acard.c (09c817ba36db7c3a4ff5e25ac55816ca181a403d) ata-acard.c (066f913a94b134b6d5e32b6af88f297c7da9c031)
1/*-
2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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56 int locked_ch;
57 int restart_ch;
58};
59
60/* local prototypes */
61static int ata_acard_chipinit(device_t dev);
62static int ata_acard_ch_attach(device_t dev);
63static int ata_acard_status(device_t dev);
1/*-
2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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56 int locked_ch;
57 int restart_ch;
58};
59
60/* local prototypes */
61static int ata_acard_chipinit(device_t dev);
62static int ata_acard_ch_attach(device_t dev);
63static int ata_acard_status(device_t dev);
64static void ata_acard_850_setmode(device_t dev, int mode);
65static void ata_acard_86X_setmode(device_t dev, int mode);
64static int ata_acard_850_setmode(device_t dev, int target, int mode);
65static int ata_acard_86X_setmode(device_t dev, int target, int mode);
66static int ata_serialize(device_t dev, int flags);
67static void ata_serialize_init(struct ata_serialize *serial);
68
69/* misc defines */
70#define ATP_OLD 1
71
72
73/*

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125{
126 struct ata_channel *ch = device_get_softc(dev);
127
128 /* setup the usual register normal pci style */
129 if (ata_pci_ch_attach(dev))
130 return ENXIO;
131
132 ch->hw.status = ata_acard_status;
66static int ata_serialize(device_t dev, int flags);
67static void ata_serialize_init(struct ata_serialize *serial);
68
69/* misc defines */
70#define ATP_OLD 1
71
72
73/*

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125{
126 struct ata_channel *ch = device_get_softc(dev);
127
128 /* setup the usual register normal pci style */
129 if (ata_pci_ch_attach(dev))
130 return ENXIO;
131
132 ch->hw.status = ata_acard_status;
133 ch->flags |= ATA_NO_ATAPI_DMA;
133 return 0;
134}
135
136static int
137ata_acard_status(device_t dev)
138{
139 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
140 struct ata_channel *ch = device_get_softc(dev);

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157 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
158 DELAY(100);
159 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
160 return 0;
161 }
162 return 1;
163}
164
134 return 0;
135}
136
137static int
138ata_acard_status(device_t dev)
139{
140 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
141 struct ata_channel *ch = device_get_softc(dev);

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158 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
159 DELAY(100);
160 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
161 return 0;
162 }
163 return 1;
164}
165
165static void
166ata_acard_850_setmode(device_t dev, int mode)
166static int
167ata_acard_850_setmode(device_t dev, int target, int mode)
167{
168{
168 device_t gparent = GRANDPARENT(dev);
169 struct ata_pci_controller *ctlr = device_get_softc(gparent);
170 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
171 struct ata_device *atadev = device_get_softc(dev);
172 int devno = (ch->unit << 1) + atadev->unit;
173 int error;
169 device_t parent = device_get_parent(dev);
170 struct ata_pci_controller *ctlr = device_get_softc(parent);
171 struct ata_channel *ch = device_get_softc(dev);
172 int devno = (ch->unit << 1) + target;
174
173
175 mode = ata_limit_mode(dev, mode,
176 ata_atapi(dev) ? ATA_PIO_MAX : ctlr->chip->max_dma);
177
174 mode = min(mode, ctlr->chip->max_dma);
178 /* XXX SOS missing WDMA0+1 + PIO modes */
179 if (mode >= ATA_WDMA2) {
175 /* XXX SOS missing WDMA0+1 + PIO modes */
176 if (mode >= ATA_WDMA2) {
180 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
181 if (bootverbose)
182 device_printf(dev, "%ssetting %s on %s chip\n",
183 (error) ? "FAILURE " : "",
184 ata_mode2str(mode), ctlr->chip->text);
185 if (!error) {
186 u_int8_t reg54 = pci_read_config(gparent, 0x54, 1);
177 u_int8_t reg54 = pci_read_config(parent, 0x54, 1);
187
188 reg54 &= ~(0x03 << (devno << 1));
189 if (mode >= ATA_UDMA0)
190 reg54 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 1));
178
179 reg54 &= ~(0x03 << (devno << 1));
180 if (mode >= ATA_UDMA0)
181 reg54 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 1));
191 pci_write_config(gparent, 0x54, reg54, 1);
192 pci_write_config(gparent, 0x4a, 0xa6, 1);
193 pci_write_config(gparent, 0x40 + (devno << 1), 0x0301, 2);
194 atadev->mode = mode;
195 return;
196 }
182 pci_write_config(parent, 0x54, reg54, 1);
183 pci_write_config(parent, 0x4a, 0xa6, 1);
184 pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2);
197 }
198 /* we could set PIO mode timings, but we assume the BIOS did that */
185 }
186 /* we could set PIO mode timings, but we assume the BIOS did that */
187 return (mode);
199}
200
188}
189
201static void
202ata_acard_86X_setmode(device_t dev, int mode)
190static int
191ata_acard_86X_setmode(device_t dev, int target, int mode)
203{
192{
204 device_t gparent = GRANDPARENT(dev);
205 struct ata_pci_controller *ctlr = device_get_softc(gparent);
206 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
207 struct ata_device *atadev = device_get_softc(dev);
208 int devno = (ch->unit << 1) + atadev->unit;
209 int error;
193 device_t parent = device_get_parent(dev);
194 struct ata_pci_controller *ctlr = device_get_softc(parent);
195 struct ata_channel *ch = device_get_softc(dev);
196 int devno = (ch->unit << 1) + target;
210
197
211
212 mode = ata_limit_mode(dev, mode,
213 ata_atapi(dev) ? ATA_PIO_MAX : ctlr->chip->max_dma);
214
215 mode = ata_check_80pin(dev, mode);
216
217 /* XXX SOS missing WDMA0+1 + PIO modes */
218 if (mode >= ATA_WDMA2) {
219 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
220 if (bootverbose)
221 device_printf(dev, "%ssetting %s on %s chip\n",
222 (error) ? "FAILURE " : "",
223 ata_mode2str(mode), ctlr->chip->text);
224 if (!error) {
225 u_int16_t reg44 = pci_read_config(gparent, 0x44, 2);
198 mode = min(mode, ctlr->chip->max_dma);
199 /* XXX SOS missing WDMA0+1 + PIO modes */
200 if (mode >= ATA_WDMA2) {
201 u_int16_t reg44 = pci_read_config(parent, 0x44, 2);
226
202
227 reg44 &= ~(0x000f << (devno << 2));
228 if (mode >= ATA_UDMA0)
229 reg44 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 2));
230 pci_write_config(gparent, 0x44, reg44, 2);
231 pci_write_config(gparent, 0x4a, 0xa6, 1);
232 pci_write_config(gparent, 0x40 + devno, 0x31, 1);
233 atadev->mode = mode;
234 return;
203 reg44 &= ~(0x000f << (devno << 2));
204 if (mode >= ATA_UDMA0)
205 reg44 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 2));
206 pci_write_config(parent, 0x44, reg44, 2);
207 pci_write_config(parent, 0x4a, 0xa6, 1);
208 pci_write_config(parent, 0x40 + devno, 0x31, 1);
235 }
209 }
236 }
237 /* we could set PIO mode timings, but we assume the BIOS did that */
210 /* we could set PIO mode timings, but we assume the BIOS did that */
211 return (mode);
238}
239
240static void
241ata_serialize_init(struct ata_serialize *serial)
242{
243
244 mtx_init(&serial->locked_mtx, "ATA serialize lock", NULL, MTX_DEF);
245 serial->locked_ch = -1;

--- 45 unchanged lines hidden --- 		212}
213
214static void
215ata_serialize_init(struct ata_serialize *serial)
216{
217
218 mtx_init(&serial->locked_mtx, "ATA serialize lock", NULL, MTX_DEF);
219 serial->locked_ch = -1;

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