arcmsr.c (6ae9acde636a6411b14ec781205654c718866745) | arcmsr.c (a1103e048b0e0b6ddfd6d8b4f7d57b357efb0ad2) |
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1/* 2******************************************************************************** 3** OS : FreeBSD 4** FILE NAME : arcmsr.c 5** BY : Erich Chen, Ching Huang 6** Description: SCSI RAID Device Driver for 7** ARECA (ARC11XX/ARC12XX/ARC13XX/ARC16XX/ARC188x) 8** SATA/SAS RAID HOST Adapter --- 63 unchanged lines hidden (view full) --- 72** 1.20.00.23 01/30/2012 Ching Huang Fixed Request requeued and Retrying command 73** 1.20.00.24 06/11/2012 Ching Huang Fixed return sense data condition 74** 1.20.00.25 08/17/2012 Ching Huang Fixed hotplug device no function on type A adapter 75** 1.20.00.26 12/14/2012 Ching Huang Added support ARC1214,1224,1264,1284 76** 1.20.00.27 05/06/2013 Ching Huang Fixed out standing cmd full on ARC-12x4 77** 1.20.00.28 09/13/2013 Ching Huang Removed recursive mutex in arcmsr_abort_dr_ccbs 78** 1.20.00.29 12/18/2013 Ching Huang Change simq allocation number, support ARC1883 79** 1.30.00.00 11/30/2015 Ching Huang Added support ARC1203 | 1/* 2******************************************************************************** 3** OS : FreeBSD 4** FILE NAME : arcmsr.c 5** BY : Erich Chen, Ching Huang 6** Description: SCSI RAID Device Driver for 7** ARECA (ARC11XX/ARC12XX/ARC13XX/ARC16XX/ARC188x) 8** SATA/SAS RAID HOST Adapter --- 63 unchanged lines hidden (view full) --- 72** 1.20.00.23 01/30/2012 Ching Huang Fixed Request requeued and Retrying command 73** 1.20.00.24 06/11/2012 Ching Huang Fixed return sense data condition 74** 1.20.00.25 08/17/2012 Ching Huang Fixed hotplug device no function on type A adapter 75** 1.20.00.26 12/14/2012 Ching Huang Added support ARC1214,1224,1264,1284 76** 1.20.00.27 05/06/2013 Ching Huang Fixed out standing cmd full on ARC-12x4 77** 1.20.00.28 09/13/2013 Ching Huang Removed recursive mutex in arcmsr_abort_dr_ccbs 78** 1.20.00.29 12/18/2013 Ching Huang Change simq allocation number, support ARC1883 79** 1.30.00.00 11/30/2015 Ching Huang Added support ARC1203 |
80** 1.40.00.00 07/11/2017 Ching Huang Added support ARC1884 |
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80****************************************************************************************** 81*/ 82 83#include <sys/cdefs.h> 84__FBSDID("$FreeBSD$"); 85 86#if 0 87#define ARCMSR_DEBUG1 1 --- 55 unchanged lines hidden (view full) --- 143#endif 144 145#if __FreeBSD_version > 500000 146#define arcmsr_callout_init(a) callout_init(a, /*mpsafe*/1); 147#else 148#define arcmsr_callout_init(a) callout_init(a); 149#endif 150 | 81****************************************************************************************** 82*/ 83 84#include <sys/cdefs.h> 85__FBSDID("$FreeBSD$"); 86 87#if 0 88#define ARCMSR_DEBUG1 1 --- 55 unchanged lines hidden (view full) --- 144#endif 145 146#if __FreeBSD_version > 500000 147#define arcmsr_callout_init(a) callout_init(a, /*mpsafe*/1); 148#else 149#define arcmsr_callout_init(a) callout_init(a); 150#endif 151 |
151#define ARCMSR_DRIVER_VERSION "arcmsr version 1.30.00.00 2015-11-30" | 152#define ARCMSR_DRIVER_VERSION "arcmsr version 1.40.00.00 2017-07-11" |
152#include <dev/arcmsr/arcmsr.h> 153/* 154************************************************************************** 155************************************************************************** 156*/ 157static void arcmsr_free_srb(struct CommandControlBlock *srb); 158static struct CommandControlBlock *arcmsr_get_freesrb(struct AdapterControlBlock *acb); 159static u_int8_t arcmsr_seek_cmd2abort(union ccb *abortccb); --- 20 unchanged lines hidden (view full) --- 180static void arcmsr_build_srb(struct CommandControlBlock *srb, bus_dma_segment_t *dm_segs, u_int32_t nseg); 181static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *pccb); 182static int arcmsr_resume(device_t dev); 183static int arcmsr_suspend(device_t dev); 184static void arcmsr_rescanLun_cb(struct cam_periph *periph, union ccb *ccb); 185static void arcmsr_polling_devmap(void *arg); 186static void arcmsr_srb_timeout(void *arg); 187static void arcmsr_hbd_postqueue_isr(struct AdapterControlBlock *acb); | 153#include <dev/arcmsr/arcmsr.h> 154/* 155************************************************************************** 156************************************************************************** 157*/ 158static void arcmsr_free_srb(struct CommandControlBlock *srb); 159static struct CommandControlBlock *arcmsr_get_freesrb(struct AdapterControlBlock *acb); 160static u_int8_t arcmsr_seek_cmd2abort(union ccb *abortccb); --- 20 unchanged lines hidden (view full) --- 181static void arcmsr_build_srb(struct CommandControlBlock *srb, bus_dma_segment_t *dm_segs, u_int32_t nseg); 182static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *pccb); 183static int arcmsr_resume(device_t dev); 184static int arcmsr_suspend(device_t dev); 185static void arcmsr_rescanLun_cb(struct cam_periph *periph, union ccb *ccb); 186static void arcmsr_polling_devmap(void *arg); 187static void arcmsr_srb_timeout(void *arg); 188static void arcmsr_hbd_postqueue_isr(struct AdapterControlBlock *acb); |
189static void arcmsr_hbe_postqueue_isr(struct AdapterControlBlock *acb); 190void arcmsr_teardown_intr(device_t dev, struct AdapterControlBlock *acb); |
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188#ifdef ARCMSR_DEBUG1 189static void arcmsr_dump_data(struct AdapterControlBlock *acb); 190#endif 191/* 192************************************************************************** 193************************************************************************** 194*/ 195static void UDELAY(u_int32_t us) { DELAY(us); } --- 175 unchanged lines hidden (view full) --- 371 } 372 break; 373 case ACB_ADAPTER_TYPE_D: { 374 /* disable all outbound interrupt */ 375 intmask_org = CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable) ; /* disable outbound message0 int */ 376 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, ARCMSR_HBDMU_ALL_INT_DISABLE); 377 } 378 break; | 191#ifdef ARCMSR_DEBUG1 192static void arcmsr_dump_data(struct AdapterControlBlock *acb); 193#endif 194/* 195************************************************************************** 196************************************************************************** 197*/ 198static void UDELAY(u_int32_t us) { DELAY(us); } --- 175 unchanged lines hidden (view full) --- 374 } 375 break; 376 case ACB_ADAPTER_TYPE_D: { 377 /* disable all outbound interrupt */ 378 intmask_org = CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable) ; /* disable outbound message0 int */ 379 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, ARCMSR_HBDMU_ALL_INT_DISABLE); 380 } 381 break; |
382 case ACB_ADAPTER_TYPE_E: { 383 /* disable all outbound interrupt */ 384 intmask_org = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_mask) ; /* disable outbound message0 int */ 385 CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_mask, intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE); 386 } 387 break; |
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379 } 380 return (intmask_org); 381} 382/* 383********************************************************************** 384********************************************************************** 385*/ 386static void arcmsr_enable_allintr( struct AdapterControlBlock *acb, u_int32_t intmask_org) --- 26 unchanged lines hidden (view full) --- 413 case ACB_ADAPTER_TYPE_D: { 414 /* enable outbound Post Queue, outbound doorbell Interrupt */ 415 mask = ARCMSR_HBDMU_ALL_INT_ENABLE; 416 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, intmask_org | mask); 417 CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable); 418 acb->outbound_int_enable = mask; 419 } 420 break; | 388 } 389 return (intmask_org); 390} 391/* 392********************************************************************** 393********************************************************************** 394*/ 395static void arcmsr_enable_allintr( struct AdapterControlBlock *acb, u_int32_t intmask_org) --- 26 unchanged lines hidden (view full) --- 422 case ACB_ADAPTER_TYPE_D: { 423 /* enable outbound Post Queue, outbound doorbell Interrupt */ 424 mask = ARCMSR_HBDMU_ALL_INT_ENABLE; 425 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, intmask_org | mask); 426 CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable); 427 acb->outbound_int_enable = mask; 428 } 429 break; |
430 case ACB_ADAPTER_TYPE_E: { 431 /* enable outbound Post Queue, outbound doorbell Interrupt */ 432 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR); 433 CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_mask, intmask_org & mask); 434 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 435 } 436 break; |
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421 } 422} 423/* 424********************************************************************** 425********************************************************************** 426*/ 427static u_int8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) 428{ --- 69 unchanged lines hidden (view full) --- 498 return TRUE; 499 } 500 UDELAY(10000); 501 }/*max 1 seconds*/ 502 }while(Retries++ < 20);/*max 20 sec*/ 503 return (FALSE); 504} 505/* | 437 } 438} 439/* 440********************************************************************** 441********************************************************************** 442*/ 443static u_int8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) 444{ --- 69 unchanged lines hidden (view full) --- 514 return TRUE; 515 } 516 UDELAY(10000); 517 }/*max 1 seconds*/ 518 }while(Retries++ < 20);/*max 20 sec*/ 519 return (FALSE); 520} 521/* |
522********************************************************************** 523********************************************************************** 524*/ 525static u_int8_t arcmsr_hbe_wait_msgint_ready(struct AdapterControlBlock *acb) 526{ 527 u_int32_t Index, read_doorbell; 528 u_int8_t Retries = 0x00; 529 530 do { 531 for(Index=0; Index < 100; Index++) { 532 read_doorbell = CHIP_REG_READ32(HBE_MessageUnit, 0, iobound_doorbell); 533 if((read_doorbell ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) { 534 CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_status, 0);/*clear interrupt*/ 535 acb->in_doorbell = read_doorbell; 536 return TRUE; 537 } 538 UDELAY(10000); 539 }/*max 1 seconds*/ 540 }while(Retries++ < 20);/*max 20 sec*/ 541 return (FALSE); 542} 543/* |
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506************************************************************************ 507************************************************************************ 508*/ 509static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) 510{ 511 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 512 513 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE); --- 57 unchanged lines hidden (view full) --- 571 retry_count--; 572 } 573 }while(retry_count != 0); 574} 575/* 576************************************************************************ 577************************************************************************ 578*/ | 544************************************************************************ 545************************************************************************ 546*/ 547static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) 548{ 549 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 550 551 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE); --- 57 unchanged lines hidden (view full) --- 609 retry_count--; 610 } 611 }while(retry_count != 0); 612} 613/* 614************************************************************************ 615************************************************************************ 616*/ |
617static void arcmsr_flush_hbe_cache(struct AdapterControlBlock *acb) 618{ 619 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 620 621 CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE); 622 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE; 623 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 624 do { 625 if(arcmsr_hbe_wait_msgint_ready(acb)) { 626 break; 627 } else { 628 retry_count--; 629 } 630 }while(retry_count != 0); 631} 632/* 633************************************************************************ 634************************************************************************ 635*/ |
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579static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 580{ 581 switch (acb->adapter_type) { 582 case ACB_ADAPTER_TYPE_A: { 583 arcmsr_flush_hba_cache(acb); 584 } 585 break; 586 case ACB_ADAPTER_TYPE_B: { 587 arcmsr_flush_hbb_cache(acb); 588 } 589 break; 590 case ACB_ADAPTER_TYPE_C: { 591 arcmsr_flush_hbc_cache(acb); 592 } 593 break; 594 case ACB_ADAPTER_TYPE_D: { 595 arcmsr_flush_hbd_cache(acb); 596 } 597 break; | 636static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 637{ 638 switch (acb->adapter_type) { 639 case ACB_ADAPTER_TYPE_A: { 640 arcmsr_flush_hba_cache(acb); 641 } 642 break; 643 case ACB_ADAPTER_TYPE_B: { 644 arcmsr_flush_hbb_cache(acb); 645 } 646 break; 647 case ACB_ADAPTER_TYPE_C: { 648 arcmsr_flush_hbc_cache(acb); 649 } 650 break; 651 case ACB_ADAPTER_TYPE_D: { 652 arcmsr_flush_hbd_cache(acb); 653 } 654 break; |
655 case ACB_ADAPTER_TYPE_E: { 656 arcmsr_flush_hbe_cache(acb); 657 } 658 break; |
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598 } 599} 600/* 601******************************************************************************* 602******************************************************************************* 603*/ 604static int arcmsr_suspend(device_t dev) 605{ --- 104 unchanged lines hidden (view full) --- 710 if(!arcmsr_hbd_wait_msgint_ready(acb)) { 711 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit); 712 } 713} 714/* 715********************************************************************* 716********************************************************************* 717*/ | 659 } 660} 661/* 662******************************************************************************* 663******************************************************************************* 664*/ 665static int arcmsr_suspend(device_t dev) 666{ --- 104 unchanged lines hidden (view full) --- 771 if(!arcmsr_hbd_wait_msgint_ready(acb)) { 772 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit); 773 } 774} 775/* 776********************************************************************* 777********************************************************************* 778*/ |
779static void arcmsr_abort_hbe_allcmd(struct AdapterControlBlock *acb) 780{ 781 CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD); 782 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE; 783 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 784 if(!arcmsr_hbe_wait_msgint_ready(acb)) { 785 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit); 786 } 787} 788/* 789********************************************************************* 790********************************************************************* 791*/ |
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718static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 719{ 720 switch (acb->adapter_type) { 721 case ACB_ADAPTER_TYPE_A: { 722 arcmsr_abort_hba_allcmd(acb); 723 } 724 break; 725 case ACB_ADAPTER_TYPE_B: { 726 arcmsr_abort_hbb_allcmd(acb); 727 } 728 break; 729 case ACB_ADAPTER_TYPE_C: { 730 arcmsr_abort_hbc_allcmd(acb); 731 } 732 break; 733 case ACB_ADAPTER_TYPE_D: { 734 arcmsr_abort_hbd_allcmd(acb); 735 } 736 break; | 792static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 793{ 794 switch (acb->adapter_type) { 795 case ACB_ADAPTER_TYPE_A: { 796 arcmsr_abort_hba_allcmd(acb); 797 } 798 break; 799 case ACB_ADAPTER_TYPE_B: { 800 arcmsr_abort_hbb_allcmd(acb); 801 } 802 break; 803 case ACB_ADAPTER_TYPE_C: { 804 arcmsr_abort_hbc_allcmd(acb); 805 } 806 break; 807 case ACB_ADAPTER_TYPE_D: { 808 arcmsr_abort_hbd_allcmd(acb); 809 } 810 break; |
811 case ACB_ADAPTER_TYPE_E: { 812 arcmsr_abort_hbe_allcmd(acb); 813 } 814 break; |
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737 } 738} 739/* 740********************************************************************** 741********************************************************************** 742*/ 743static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag) 744{ --- 86 unchanged lines hidden (view full) --- 831 struct CommandControlBlock *srb; 832 833 /* check if command done with no error*/ 834 switch (acb->adapter_type) { 835 case ACB_ADAPTER_TYPE_C: 836 case ACB_ADAPTER_TYPE_D: 837 srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb & 0xFFFFFFE0)); /*frame must be 32 bytes aligned*/ 838 break; | 815 } 816} 817/* 818********************************************************************** 819********************************************************************** 820*/ 821static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag) 822{ --- 86 unchanged lines hidden (view full) --- 909 struct CommandControlBlock *srb; 910 911 /* check if command done with no error*/ 912 switch (acb->adapter_type) { 913 case ACB_ADAPTER_TYPE_C: 914 case ACB_ADAPTER_TYPE_D: 915 srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb & 0xFFFFFFE0)); /*frame must be 32 bytes aligned*/ 916 break; |
917 case ACB_ADAPTER_TYPE_E: 918 srb = acb->psrb_pool[flag_srb]; 919 break; |
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839 case ACB_ADAPTER_TYPE_A: 840 case ACB_ADAPTER_TYPE_B: 841 default: 842 srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb << 5));/*frame must be 32 bytes aligned*/ 843 break; 844 } 845 if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) { 846 if(srb->srb_state == ARCMSR_SRB_TIMEOUT) { --- 86 unchanged lines hidden (view full) --- 933 arcmsr_drain_donequeue(acb, flag_srb, error); 934 } 935 } 936 break; 937 case ACB_ADAPTER_TYPE_D: { 938 arcmsr_hbd_postqueue_isr(acb); 939 } 940 break; | 920 case ACB_ADAPTER_TYPE_A: 921 case ACB_ADAPTER_TYPE_B: 922 default: 923 srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb << 5));/*frame must be 32 bytes aligned*/ 924 break; 925 } 926 if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) { 927 if(srb->srb_state == ARCMSR_SRB_TIMEOUT) { --- 86 unchanged lines hidden (view full) --- 1014 arcmsr_drain_donequeue(acb, flag_srb, error); 1015 } 1016 } 1017 break; 1018 case ACB_ADAPTER_TYPE_D: { 1019 arcmsr_hbd_postqueue_isr(acb); 1020 } 1021 break; |
1022 case ACB_ADAPTER_TYPE_E: { 1023 arcmsr_hbe_postqueue_isr(acb); 1024 } 1025 break; |
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941 } 942} 943/* 944**************************************************************************** 945**************************************************************************** 946*/ 947static void arcmsr_iop_reset(struct AdapterControlBlock *acb) 948{ --- 195 unchanged lines hidden (view full) --- 1144 index_stripped += 1; 1145 index_stripped %= ARCMSR_MAX_HBD_POSTQUEUE; 1146 phbdmu->postq_index = index_stripped ? index_stripped : (index_stripped | 0x4000); 1147 } 1148 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inboundlist_write_pointer, postq_index); 1149 ARCMSR_LOCK_RELEASE(&acb->postDone_lock); 1150 } 1151 break; | 1026 } 1027} 1028/* 1029**************************************************************************** 1030**************************************************************************** 1031*/ 1032static void arcmsr_iop_reset(struct AdapterControlBlock *acb) 1033{ --- 195 unchanged lines hidden (view full) --- 1229 index_stripped += 1; 1230 index_stripped %= ARCMSR_MAX_HBD_POSTQUEUE; 1231 phbdmu->postq_index = index_stripped ? index_stripped : (index_stripped | 0x4000); 1232 } 1233 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inboundlist_write_pointer, postq_index); 1234 ARCMSR_LOCK_RELEASE(&acb->postDone_lock); 1235 } 1236 break; |
1237 case ACB_ADAPTER_TYPE_E: { 1238 u_int32_t ccb_post_stamp, arc_cdb_size; 1239 1240 arc_cdb_size = (srb->arc_cdb_size > 0x300) ? 0x300 : srb->arc_cdb_size; 1241 ccb_post_stamp = (srb->smid | ((arc_cdb_size-1) >> 6)); 1242 CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_queueport_high, 0); 1243 CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_queueport_low, ccb_post_stamp); 1244 } 1245 break; |
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1152 } 1153} 1154/* 1155************************************************************************ 1156************************************************************************ 1157*/ 1158static struct QBUFFER *arcmsr_get_iop_rqbuffer( struct AdapterControlBlock *acb) 1159{ --- 19 unchanged lines hidden (view full) --- 1179 } 1180 break; 1181 case ACB_ADAPTER_TYPE_D: { 1182 struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; 1183 1184 qbuffer = (struct QBUFFER *)&phbdmu->phbdmu->message_rbuffer; 1185 } 1186 break; | 1246 } 1247} 1248/* 1249************************************************************************ 1250************************************************************************ 1251*/ 1252static struct QBUFFER *arcmsr_get_iop_rqbuffer( struct AdapterControlBlock *acb) 1253{ --- 19 unchanged lines hidden (view full) --- 1273 } 1274 break; 1275 case ACB_ADAPTER_TYPE_D: { 1276 struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; 1277 1278 qbuffer = (struct QBUFFER *)&phbdmu->phbdmu->message_rbuffer; 1279 } 1280 break; |
1281 case ACB_ADAPTER_TYPE_E: { 1282 struct HBE_MessageUnit *phbcmu = (struct HBE_MessageUnit *)acb->pmu; 1283 1284 qbuffer = (struct QBUFFER *)&phbcmu->message_rbuffer; 1285 } 1286 break; |
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1187 } 1188 return(qbuffer); 1189} 1190/* 1191************************************************************************ 1192************************************************************************ 1193*/ 1194static struct QBUFFER *arcmsr_get_iop_wqbuffer( struct AdapterControlBlock *acb) --- 20 unchanged lines hidden (view full) --- 1215 } 1216 break; 1217 case ACB_ADAPTER_TYPE_D: { 1218 struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; 1219 1220 qbuffer = (struct QBUFFER *)&phbdmu->phbdmu->message_wbuffer; 1221 } 1222 break; | 1287 } 1288 return(qbuffer); 1289} 1290/* 1291************************************************************************ 1292************************************************************************ 1293*/ 1294static struct QBUFFER *arcmsr_get_iop_wqbuffer( struct AdapterControlBlock *acb) --- 20 unchanged lines hidden (view full) --- 1315 } 1316 break; 1317 case ACB_ADAPTER_TYPE_D: { 1318 struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; 1319 1320 qbuffer = (struct QBUFFER *)&phbdmu->phbdmu->message_wbuffer; 1321 } 1322 break; |
1323 case ACB_ADAPTER_TYPE_E: { 1324 struct HBE_MessageUnit *phbcmu = (struct HBE_MessageUnit *)acb->pmu; 1325 1326 qbuffer = (struct QBUFFER *)&phbcmu->message_wbuffer; 1327 } 1328 break; |
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1223 } 1224 return(qbuffer); 1225} 1226/* 1227************************************************************************** 1228************************************************************************** 1229*/ 1230static void arcmsr_iop_message_read(struct AdapterControlBlock *acb) --- 15 unchanged lines hidden (view full) --- 1246 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK); 1247 } 1248 break; 1249 case ACB_ADAPTER_TYPE_D: { 1250 /* let IOP know data has been read */ 1251 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_doorbell, ARCMSR_HBDMU_DRV2IOP_DATA_OUT_READ); 1252 } 1253 break; | 1329 } 1330 return(qbuffer); 1331} 1332/* 1333************************************************************************** 1334************************************************************************** 1335*/ 1336static void arcmsr_iop_message_read(struct AdapterControlBlock *acb) --- 15 unchanged lines hidden (view full) --- 1352 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK); 1353 } 1354 break; 1355 case ACB_ADAPTER_TYPE_D: { 1356 /* let IOP know data has been read */ 1357 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_doorbell, ARCMSR_HBDMU_DRV2IOP_DATA_OUT_READ); 1358 } 1359 break; |
1360 case ACB_ADAPTER_TYPE_E: { 1361 /* let IOP know data has been read */ 1362 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK; 1363 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 1364 } 1365 break; |
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1254 } 1255} 1256/* 1257************************************************************************** 1258************************************************************************** 1259*/ 1260static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1261{ --- 26 unchanged lines hidden (view full) --- 1288 case ACB_ADAPTER_TYPE_D: { 1289 /* 1290 ** push inbound doorbell tell iop, driver data write ok 1291 ** and wait reply on next hwinterrupt for next Qbuffer post 1292 */ 1293 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_doorbell, ARCMSR_HBDMU_DRV2IOP_DATA_IN_READY); 1294 } 1295 break; | 1366 } 1367} 1368/* 1369************************************************************************** 1370************************************************************************** 1371*/ 1372static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1373{ --- 26 unchanged lines hidden (view full) --- 1400 case ACB_ADAPTER_TYPE_D: { 1401 /* 1402 ** push inbound doorbell tell iop, driver data write ok 1403 ** and wait reply on next hwinterrupt for next Qbuffer post 1404 */ 1405 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_doorbell, ARCMSR_HBDMU_DRV2IOP_DATA_IN_READY); 1406 } 1407 break; |
1408 case ACB_ADAPTER_TYPE_E: { 1409 /* 1410 ** push inbound doorbell tell iop, driver data write ok 1411 ** and wait reply on next hwinterrupt for next Qbuffer post 1412 */ 1413 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK; 1414 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 1415 } 1416 break; |
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1296 } 1297} 1298/* 1299************************************************************************ 1300************************************************************************ 1301*/ 1302static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) 1303{ --- 43 unchanged lines hidden (view full) --- 1347 if(!arcmsr_hbd_wait_msgint_ready(acb)) { 1348 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n", acb->pci_unit); 1349 } 1350} 1351/* 1352************************************************************************ 1353************************************************************************ 1354*/ | 1417 } 1418} 1419/* 1420************************************************************************ 1421************************************************************************ 1422*/ 1423static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) 1424{ --- 43 unchanged lines hidden (view full) --- 1468 if(!arcmsr_hbd_wait_msgint_ready(acb)) { 1469 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n", acb->pci_unit); 1470 } 1471} 1472/* 1473************************************************************************ 1474************************************************************************ 1475*/ |
1476static void arcmsr_stop_hbe_bgrb(struct AdapterControlBlock *acb) 1477{ 1478 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1479 CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB); 1480 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE; 1481 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 1482 if(!arcmsr_hbe_wait_msgint_ready(acb)) { 1483 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n", acb->pci_unit); 1484 } 1485} 1486/* 1487************************************************************************ 1488************************************************************************ 1489*/ |
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1355static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1356{ 1357 switch (acb->adapter_type) { 1358 case ACB_ADAPTER_TYPE_A: { 1359 arcmsr_stop_hba_bgrb(acb); 1360 } 1361 break; 1362 case ACB_ADAPTER_TYPE_B: { 1363 arcmsr_stop_hbb_bgrb(acb); 1364 } 1365 break; 1366 case ACB_ADAPTER_TYPE_C: { 1367 arcmsr_stop_hbc_bgrb(acb); 1368 } 1369 break; 1370 case ACB_ADAPTER_TYPE_D: { 1371 arcmsr_stop_hbd_bgrb(acb); 1372 } 1373 break; | 1490static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1491{ 1492 switch (acb->adapter_type) { 1493 case ACB_ADAPTER_TYPE_A: { 1494 arcmsr_stop_hba_bgrb(acb); 1495 } 1496 break; 1497 case ACB_ADAPTER_TYPE_B: { 1498 arcmsr_stop_hbb_bgrb(acb); 1499 } 1500 break; 1501 case ACB_ADAPTER_TYPE_C: { 1502 arcmsr_stop_hbc_bgrb(acb); 1503 } 1504 break; 1505 case ACB_ADAPTER_TYPE_D: { 1506 arcmsr_stop_hbd_bgrb(acb); 1507 } 1508 break; |
1509 case ACB_ADAPTER_TYPE_E: { 1510 arcmsr_stop_hbe_bgrb(acb); 1511 } 1512 break; |
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1374 } 1375} 1376/* 1377************************************************************************ 1378************************************************************************ 1379*/ 1380static void arcmsr_poll(struct cam_sim *psim) 1381{ --- 59 unchanged lines hidden (view full) --- 1441*/ 1442static u_int32_t arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb, 1443 struct QBUFFER *prbuffer) { 1444 1445 u_int8_t *pQbuffer; 1446 u_int8_t *iop_data; 1447 u_int32_t iop_len; 1448 | 1513 } 1514} 1515/* 1516************************************************************************ 1517************************************************************************ 1518*/ 1519static void arcmsr_poll(struct cam_sim *psim) 1520{ --- 59 unchanged lines hidden (view full) --- 1580*/ 1581static u_int32_t arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb, 1582 struct QBUFFER *prbuffer) { 1583 1584 u_int8_t *pQbuffer; 1585 u_int8_t *iop_data; 1586 u_int32_t iop_len; 1587 |
1449 if(acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) { | 1588 if((acb->adapter_type == ACB_ADAPTER_TYPE_C) || (acb->adapter_type == ACB_ADAPTER_TYPE_D) || 1589 (acb->adapter_type == ACB_ADAPTER_TYPE_E)) { |
1450 return(arcmsr_Read_iop_rqbuffer_data_D(acb, prbuffer)); 1451 } 1452 iop_data = (u_int8_t *)prbuffer->data; 1453 iop_len = (u_int32_t)prbuffer->data_len; 1454 while (iop_len > 0) { 1455 pQbuffer = &acb->rqbuffer[acb->rqbuf_lastindex]; 1456 *pQbuffer = *iop_data; 1457 acb->rqbuf_lastindex++; --- 78 unchanged lines hidden (view full) --- 1536*/ 1537static void arcmsr_Write_data_2iop_wqbuffer(struct AdapterControlBlock *acb) 1538{ 1539 u_int8_t *pQbuffer; 1540 struct QBUFFER *pwbuffer; 1541 u_int8_t *iop_data; 1542 int32_t allxfer_len=0; 1543 | 1590 return(arcmsr_Read_iop_rqbuffer_data_D(acb, prbuffer)); 1591 } 1592 iop_data = (u_int8_t *)prbuffer->data; 1593 iop_len = (u_int32_t)prbuffer->data_len; 1594 while (iop_len > 0) { 1595 pQbuffer = &acb->rqbuffer[acb->rqbuf_lastindex]; 1596 *pQbuffer = *iop_data; 1597 acb->rqbuf_lastindex++; --- 78 unchanged lines hidden (view full) --- 1676*/ 1677static void arcmsr_Write_data_2iop_wqbuffer(struct AdapterControlBlock *acb) 1678{ 1679 u_int8_t *pQbuffer; 1680 struct QBUFFER *pwbuffer; 1681 u_int8_t *iop_data; 1682 int32_t allxfer_len=0; 1683 |
1544 if(acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) { | 1684 if((acb->adapter_type == ACB_ADAPTER_TYPE_C) || (acb->adapter_type == ACB_ADAPTER_TYPE_D) || 1685 (acb->adapter_type == ACB_ADAPTER_TYPE_E)) { |
1545 arcmsr_Write_data_2iop_wqbuffer_D(acb); 1546 return; 1547 } 1548 if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READ) { 1549 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READ); 1550 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1551 iop_data = (u_int8_t *)pwbuffer->data; 1552 while((acb->wqbuf_firstindex != acb->wqbuf_lastindex) --- 136 unchanged lines hidden (view full) --- 1689 case ACB_ADAPTER_TYPE_D: 1690 devicemap = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); 1691 for (target = 0; target < 4; target++) 1692 { 1693 deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap); 1694 devicemap += 4; 1695 } 1696 break; | 1686 arcmsr_Write_data_2iop_wqbuffer_D(acb); 1687 return; 1688 } 1689 if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READ) { 1690 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READ); 1691 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1692 iop_data = (u_int8_t *)pwbuffer->data; 1693 while((acb->wqbuf_firstindex != acb->wqbuf_lastindex) --- 136 unchanged lines hidden (view full) --- 1830 case ACB_ADAPTER_TYPE_D: 1831 devicemap = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); 1832 for (target = 0; target < 4; target++) 1833 { 1834 deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap); 1835 devicemap += 4; 1836 } 1837 break; |
1838 case ACB_ADAPTER_TYPE_E: 1839 devicemap = offsetof(struct HBE_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); 1840 for (target = 0; target < 4; target++) 1841 { 1842 deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap); 1843 devicemap += 4; 1844 } 1845 break; |
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1697 } 1698 1699 if(acb->acb_flags & ACB_F_BUS_HANG_ON) 1700 { 1701 acb->acb_flags &= ~ACB_F_BUS_HANG_ON; 1702 } 1703 /* 1704 ** adapter posted CONFIG message --- 82 unchanged lines hidden (view full) --- 1787 outbound_message = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[0]); 1788 if (outbound_message == ARCMSR_SIGNATURE_GET_CONFIG) 1789 arcmsr_dr_handle( acb ); 1790} 1791/* 1792************************************************************************** 1793************************************************************************** 1794*/ | 1846 } 1847 1848 if(acb->acb_flags & ACB_F_BUS_HANG_ON) 1849 { 1850 acb->acb_flags &= ~ACB_F_BUS_HANG_ON; 1851 } 1852 /* 1853 ** adapter posted CONFIG message --- 82 unchanged lines hidden (view full) --- 1936 outbound_message = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[0]); 1937 if (outbound_message == ARCMSR_SIGNATURE_GET_CONFIG) 1938 arcmsr_dr_handle( acb ); 1939} 1940/* 1941************************************************************************** 1942************************************************************************** 1943*/ |
1944static void arcmsr_hbe_message_isr(struct AdapterControlBlock *acb) { 1945 u_int32_t outbound_message; 1946 1947 CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_status, 0); 1948 outbound_message = CHIP_REG_READ32(HBE_MessageUnit, 0, msgcode_rwbuffer[0]); 1949 if (outbound_message == ARCMSR_SIGNATURE_GET_CONFIG) 1950 arcmsr_dr_handle( acb ); 1951} 1952/* 1953************************************************************************** 1954************************************************************************** 1955*/ |
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1795static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) 1796{ 1797 u_int32_t doorbell_status; 1798 1799 /* 1800 ******************************************************************* 1801 ** Maybe here we need to check wrqbuffer_lock is lock or not 1802 ** DOORBELL: din! don! --- 68 unchanged lines hidden (view full) --- 1871 if(doorbell_status) 1872 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, doorbell_status); /* clear doorbell interrupt */ 1873 } 1874} 1875/* 1876************************************************************************** 1877************************************************************************** 1878*/ | 1956static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) 1957{ 1958 u_int32_t doorbell_status; 1959 1960 /* 1961 ******************************************************************* 1962 ** Maybe here we need to check wrqbuffer_lock is lock or not 1963 ** DOORBELL: din! don! --- 68 unchanged lines hidden (view full) --- 2032 if(doorbell_status) 2033 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, doorbell_status); /* clear doorbell interrupt */ 2034 } 2035} 2036/* 2037************************************************************************** 2038************************************************************************** 2039*/ |
2040static void arcmsr_hbe_doorbell_isr(struct AdapterControlBlock *acb) 2041{ 2042 u_int32_t doorbell_status, in_doorbell; 2043 2044 /* 2045 ******************************************************************* 2046 ** Maybe here we need to check wrqbuffer_lock is lock or not 2047 ** DOORBELL: din! don! 2048 ** check if there are any mail need to pack from firmware 2049 ******************************************************************* 2050 */ 2051 in_doorbell = CHIP_REG_READ32(HBE_MessageUnit, 0, iobound_doorbell); 2052 CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_status, 0); /* clear doorbell interrupt */ 2053 doorbell_status = in_doorbell ^ acb->in_doorbell; 2054 if(doorbell_status & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) { 2055 arcmsr_iop2drv_data_wrote_handle(acb); 2056 } 2057 if(doorbell_status & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) { 2058 arcmsr_iop2drv_data_read_handle(acb); 2059 } 2060 if(doorbell_status & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) { 2061 arcmsr_hbe_message_isr(acb); /* messenger of "driver to iop commands" */ 2062 } 2063 acb->in_doorbell = in_doorbell; 2064} 2065/* 2066************************************************************************** 2067************************************************************************** 2068*/ |
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1879static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) 1880{ 1881 u_int32_t flag_srb; 1882 u_int16_t error; 1883 1884 /* 1885 ***************************************************************************** 1886 ** areca cdb command done --- 121 unchanged lines hidden (view full) --- 2008 arcmsr_drain_donequeue(acb, addressLow, error); /*Check if command done with no error */ 2009 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outboundlist_read_pointer, doneq_index); 2010 outbound_write_pointer = phbdmu->done_qbuffer[0].addressLow; 2011 } 2012 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outboundlist_interrupt_cause, ARCMSR_HBDMU_OUTBOUND_LIST_INTERRUPT_CLEAR); 2013 CHIP_REG_READ32(HBD_MessageUnit, 0, outboundlist_interrupt_cause); /*Dummy ioread32 to force pci flush */ 2014} 2015/* | 2069static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) 2070{ 2071 u_int32_t flag_srb; 2072 u_int16_t error; 2073 2074 /* 2075 ***************************************************************************** 2076 ** areca cdb command done --- 121 unchanged lines hidden (view full) --- 2198 arcmsr_drain_donequeue(acb, addressLow, error); /*Check if command done with no error */ 2199 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outboundlist_read_pointer, doneq_index); 2200 outbound_write_pointer = phbdmu->done_qbuffer[0].addressLow; 2201 } 2202 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outboundlist_interrupt_cause, ARCMSR_HBDMU_OUTBOUND_LIST_INTERRUPT_CLEAR); 2203 CHIP_REG_READ32(HBD_MessageUnit, 0, outboundlist_interrupt_cause); /*Dummy ioread32 to force pci flush */ 2204} 2205/* |
2206************************************************************************** 2207************************************************************************** 2208*/ 2209static void arcmsr_hbe_postqueue_isr(struct AdapterControlBlock *acb) 2210{ 2211 u_int16_t error; 2212 uint32_t doneq_index; 2213 uint16_t cmdSMID; 2214 2215 /* 2216 ***************************************************************************** 2217 ** areca cdb command done 2218 ***************************************************************************** 2219 */ 2220 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2221 doneq_index = acb->doneq_index; 2222 while ((CHIP_REG_READ32(HBE_MessageUnit, 0, reply_post_producer_index) & 0xFFFF) != doneq_index) { 2223 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID; 2224 error = (acb->pCompletionQ[doneq_index].cmdFlag & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE; 2225 arcmsr_drain_donequeue(acb, (u_int32_t)cmdSMID, error); 2226 doneq_index++; 2227 if (doneq_index >= acb->completionQ_entry) 2228 doneq_index = 0; 2229 } 2230 acb->doneq_index = doneq_index; 2231 CHIP_REG_WRITE32(HBE_MessageUnit, 0, reply_post_consumer_index, doneq_index); 2232} 2233/* |
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2016********************************************************************** 2017********************************************************************** 2018*/ 2019static void arcmsr_handle_hba_isr( struct AdapterControlBlock *acb) 2020{ 2021 u_int32_t outbound_intStatus; 2022 /* 2023 ********************************************* --- 114 unchanged lines hidden (view full) --- 2138 if(host_interrupt_status & ARCMSR_HBDMU_OUTBOUND_POSTQUEUE_INT) { 2139 arcmsr_hbd_postqueue_isr(acb); 2140 } 2141 /* enable all outbound interrupt */ 2142 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, intmask_org | ARCMSR_HBDMU_ALL_INT_ENABLE); 2143// CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable); 2144} 2145/* | 2234********************************************************************** 2235********************************************************************** 2236*/ 2237static void arcmsr_handle_hba_isr( struct AdapterControlBlock *acb) 2238{ 2239 u_int32_t outbound_intStatus; 2240 /* 2241 ********************************************* --- 114 unchanged lines hidden (view full) --- 2356 if(host_interrupt_status & ARCMSR_HBDMU_OUTBOUND_POSTQUEUE_INT) { 2357 arcmsr_hbd_postqueue_isr(acb); 2358 } 2359 /* enable all outbound interrupt */ 2360 CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, intmask_org | ARCMSR_HBDMU_ALL_INT_ENABLE); 2361// CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable); 2362} 2363/* |
2364********************************************************************** 2365********************************************************************** 2366*/ 2367static void arcmsr_handle_hbe_isr( struct AdapterControlBlock *acb) 2368{ 2369 u_int32_t host_interrupt_status; 2370 /* 2371 ********************************************* 2372 ** check outbound intstatus 2373 ********************************************* 2374 */ 2375 host_interrupt_status = CHIP_REG_READ32(HBE_MessageUnit, 0, host_int_status) & 2376 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR | 2377 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR); 2378 if(!host_interrupt_status) { 2379 /*it must be share irq*/ 2380 return; 2381 } 2382 do { 2383 /* MU doorbell interrupts*/ 2384 if(host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) { 2385 arcmsr_hbe_doorbell_isr(acb); 2386 } 2387 /* MU post queue interrupts*/ 2388 if(host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) { 2389 arcmsr_hbe_postqueue_isr(acb); 2390 } 2391 host_interrupt_status = CHIP_REG_READ32(HBE_MessageUnit, 0, host_int_status); 2392 } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR)); 2393} 2394/* |
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2146****************************************************************************** 2147****************************************************************************** 2148*/ 2149static void arcmsr_interrupt(struct AdapterControlBlock *acb) 2150{ 2151 switch (acb->adapter_type) { 2152 case ACB_ADAPTER_TYPE_A: 2153 arcmsr_handle_hba_isr(acb); 2154 break; 2155 case ACB_ADAPTER_TYPE_B: 2156 arcmsr_handle_hbb_isr(acb); 2157 break; 2158 case ACB_ADAPTER_TYPE_C: 2159 arcmsr_handle_hbc_isr(acb); 2160 break; 2161 case ACB_ADAPTER_TYPE_D: 2162 arcmsr_handle_hbd_isr(acb); 2163 break; | 2395****************************************************************************** 2396****************************************************************************** 2397*/ 2398static void arcmsr_interrupt(struct AdapterControlBlock *acb) 2399{ 2400 switch (acb->adapter_type) { 2401 case ACB_ADAPTER_TYPE_A: 2402 arcmsr_handle_hba_isr(acb); 2403 break; 2404 case ACB_ADAPTER_TYPE_B: 2405 arcmsr_handle_hbb_isr(acb); 2406 break; 2407 case ACB_ADAPTER_TYPE_C: 2408 arcmsr_handle_hbc_isr(acb); 2409 break; 2410 case ACB_ADAPTER_TYPE_D: 2411 arcmsr_handle_hbd_isr(acb); 2412 break; |
2413 case ACB_ADAPTER_TYPE_E: 2414 arcmsr_handle_hbe_isr(acb); 2415 break; |
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2164 default: 2165 printf("arcmsr%d: interrupt service," 2166 " unknown adapter type =%d\n", acb->pci_unit, acb->adapter_type); 2167 break; 2168 } 2169} 2170/* 2171********************************************************************** --- 28 unchanged lines hidden (view full) --- 2200 case ACB_ADAPTER_TYPE_C: 2201 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); 2202 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); 2203 break; 2204 2205 case ACB_ADAPTER_TYPE_D: 2206 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); 2207 break; | 2416 default: 2417 printf("arcmsr%d: interrupt service," 2418 " unknown adapter type =%d\n", acb->pci_unit, acb->adapter_type); 2419 break; 2420 } 2421} 2422/* 2423********************************************************************** --- 28 unchanged lines hidden (view full) --- 2452 case ACB_ADAPTER_TYPE_C: 2453 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); 2454 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); 2455 break; 2456 2457 case ACB_ADAPTER_TYPE_D: 2458 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); 2459 break; |
2460 2461 case ACB_ADAPTER_TYPE_E: 2462 CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); 2463 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE; 2464 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 2465 break; |
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2208 } 2209 2210 if((acb->acb_flags & ACB_F_SCSISTOPADAPTER) == 0) 2211 { 2212 callout_reset(&acb->devmap_callout, 5 * hz, arcmsr_polling_devmap, acb); /* polling per 5 seconds */ 2213 } 2214} 2215 --- 686 unchanged lines hidden (view full) --- 2902 #ifdef CAM_NEW_TRAN_CODE 2903 if(acb->adapter_bus_speed == ACB_BUS_SPEED_12G) 2904 cpi->base_transfer_speed = 1200000; 2905 else if(acb->adapter_bus_speed == ACB_BUS_SPEED_6G) 2906 cpi->base_transfer_speed = 600000; 2907 else 2908 cpi->base_transfer_speed = 300000; 2909 if((acb->vendor_device_id == PCIDevVenIDARC1880) || | 2466 } 2467 2468 if((acb->acb_flags & ACB_F_SCSISTOPADAPTER) == 0) 2469 { 2470 callout_reset(&acb->devmap_callout, 5 * hz, arcmsr_polling_devmap, acb); /* polling per 5 seconds */ 2471 } 2472} 2473 --- 686 unchanged lines hidden (view full) --- 3160 #ifdef CAM_NEW_TRAN_CODE 3161 if(acb->adapter_bus_speed == ACB_BUS_SPEED_12G) 3162 cpi->base_transfer_speed = 1200000; 3163 else if(acb->adapter_bus_speed == ACB_BUS_SPEED_6G) 3164 cpi->base_transfer_speed = 600000; 3165 else 3166 cpi->base_transfer_speed = 300000; 3167 if((acb->vendor_device_id == PCIDevVenIDARC1880) || |
3168 (acb->vendor_device_id == PCIDevVenIDARC1884) || |
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2910 (acb->vendor_device_id == PCIDevVenIDARC1680) || 2911 (acb->vendor_device_id == PCIDevVenIDARC1214)) 2912 { 2913 cpi->transport = XPORT_SAS; 2914 cpi->transport_version = 0; 2915 cpi->protocol_version = SCSI_REV_SPC2; 2916 } 2917 else --- 68 unchanged lines hidden (view full) --- 2986 struct ccb_trans_settings_sas *sas; 2987 2988 scsi = &cts->proto_specific.scsi; 2989 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; 2990 scsi->valid = CTS_SCSI_VALID_TQ; 2991 cts->protocol = PROTO_SCSI; 2992 2993 if((acb->vendor_device_id == PCIDevVenIDARC1880) || | 3169 (acb->vendor_device_id == PCIDevVenIDARC1680) || 3170 (acb->vendor_device_id == PCIDevVenIDARC1214)) 3171 { 3172 cpi->transport = XPORT_SAS; 3173 cpi->transport_version = 0; 3174 cpi->protocol_version = SCSI_REV_SPC2; 3175 } 3176 else --- 68 unchanged lines hidden (view full) --- 3245 struct ccb_trans_settings_sas *sas; 3246 3247 scsi = &cts->proto_specific.scsi; 3248 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; 3249 scsi->valid = CTS_SCSI_VALID_TQ; 3250 cts->protocol = PROTO_SCSI; 3251 3252 if((acb->vendor_device_id == PCIDevVenIDARC1880) || |
3253 (acb->vendor_device_id == PCIDevVenIDARC1884) || |
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2994 (acb->vendor_device_id == PCIDevVenIDARC1680) || 2995 (acb->vendor_device_id == PCIDevVenIDARC1214)) 2996 { 2997 cts->protocol_version = SCSI_REV_SPC2; 2998 cts->transport_version = 0; 2999 cts->transport = XPORT_SAS; 3000 sas = &cts->xport_specific.sas; 3001 sas->valid = CTS_SAS_VALID_SPEED; --- 143 unchanged lines hidden (view full) --- 3145 if(!arcmsr_hbd_wait_msgint_ready(acb)) { 3146 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit); 3147 } 3148} 3149/* 3150********************************************************************** 3151********************************************************************** 3152*/ | 3254 (acb->vendor_device_id == PCIDevVenIDARC1680) || 3255 (acb->vendor_device_id == PCIDevVenIDARC1214)) 3256 { 3257 cts->protocol_version = SCSI_REV_SPC2; 3258 cts->transport_version = 0; 3259 cts->transport = XPORT_SAS; 3260 sas = &cts->xport_specific.sas; 3261 sas->valid = CTS_SAS_VALID_SPEED; --- 143 unchanged lines hidden (view full) --- 3405 if(!arcmsr_hbd_wait_msgint_ready(acb)) { 3406 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit); 3407 } 3408} 3409/* 3410********************************************************************** 3411********************************************************************** 3412*/ |
3413static void arcmsr_start_hbe_bgrb(struct AdapterControlBlock *acb) 3414{ 3415 acb->acb_flags |= ACB_F_MSG_START_BGRB; 3416 CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB); 3417 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE; 3418 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 3419 if(!arcmsr_hbe_wait_msgint_ready(acb)) { 3420 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit); 3421 } 3422} 3423/* 3424********************************************************************** 3425********************************************************************** 3426*/ |
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3153static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 3154{ 3155 switch (acb->adapter_type) { 3156 case ACB_ADAPTER_TYPE_A: 3157 arcmsr_start_hba_bgrb(acb); 3158 break; 3159 case ACB_ADAPTER_TYPE_B: 3160 arcmsr_start_hbb_bgrb(acb); 3161 break; 3162 case ACB_ADAPTER_TYPE_C: 3163 arcmsr_start_hbc_bgrb(acb); 3164 break; 3165 case ACB_ADAPTER_TYPE_D: 3166 arcmsr_start_hbd_bgrb(acb); 3167 break; | 3427static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 3428{ 3429 switch (acb->adapter_type) { 3430 case ACB_ADAPTER_TYPE_A: 3431 arcmsr_start_hba_bgrb(acb); 3432 break; 3433 case ACB_ADAPTER_TYPE_B: 3434 arcmsr_start_hbb_bgrb(acb); 3435 break; 3436 case ACB_ADAPTER_TYPE_C: 3437 arcmsr_start_hbc_bgrb(acb); 3438 break; 3439 case ACB_ADAPTER_TYPE_D: 3440 arcmsr_start_hbd_bgrb(acb); 3441 break; |
3442 case ACB_ADAPTER_TYPE_E: 3443 arcmsr_start_hbe_bgrb(acb); 3444 break; |
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3168 } 3169} 3170/* 3171********************************************************************** 3172** 3173********************************************************************** 3174*/ 3175static void arcmsr_polling_hba_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb) --- 207 unchanged lines hidden (view full) --- 3383 , acb->pci_unit, srb, acb->srboutstandingcount); 3384 continue; 3385 } 3386 arcmsr_report_srb_state(acb, srb, error); 3387 } /*drain reply FIFO*/ 3388} 3389/* 3390********************************************************************** | 3445 } 3446} 3447/* 3448********************************************************************** 3449** 3450********************************************************************** 3451*/ 3452static void arcmsr_polling_hba_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb) --- 207 unchanged lines hidden (view full) --- 3660 , acb->pci_unit, srb, acb->srboutstandingcount); 3661 continue; 3662 } 3663 arcmsr_report_srb_state(acb, srb, error); 3664 } /*drain reply FIFO*/ 3665} 3666/* 3667********************************************************************** |
3668** |
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3391********************************************************************** 3392*/ | 3669********************************************************************** 3670*/ |
3671static void arcmsr_polling_hbe_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb) 3672{ 3673 struct CommandControlBlock *srb; 3674 u_int32_t poll_srb_done=0, poll_count=0, doneq_index; 3675 u_int16_t error, cmdSMID; 3676 3677polling_ccb_retry: 3678 poll_count++; 3679 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 3680 while(1) { 3681 doneq_index = acb->doneq_index; 3682 if((CHIP_REG_READ32(HBE_MessageUnit, 0, reply_post_producer_index) & 0xFFFF) == doneq_index) { 3683 if(poll_srb_done) { 3684 break;/*chip FIFO no ccb for completion already*/ 3685 } else { 3686 UDELAY(25000); 3687 if ((poll_count > 100) && (poll_srb != NULL)) { 3688 break; 3689 } 3690 if (acb->srboutstandingcount == 0) { 3691 break; 3692 } 3693 goto polling_ccb_retry; 3694 } 3695 } 3696 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID; 3697 doneq_index++; 3698 if (doneq_index >= acb->completionQ_entry) 3699 doneq_index = 0; 3700 acb->doneq_index = doneq_index; 3701 srb = acb->psrb_pool[cmdSMID]; 3702 error = (acb->pCompletionQ[doneq_index].cmdFlag & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE; 3703 if (poll_srb != NULL) 3704 poll_srb_done = (srb == poll_srb) ? 1:0; 3705 if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) { 3706 if(srb->srb_state == ARCMSR_SRB_ABORTED) { 3707 printf("arcmsr%d: scsi id=%d lun=%jx srb='%p'poll command abort successfully \n" 3708 , acb->pci_unit, srb->pccb->ccb_h.target_id, (uintmax_t)srb->pccb->ccb_h.target_lun, srb); 3709 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; 3710 arcmsr_srb_complete(srb, 1); 3711 continue; 3712 } 3713 printf("arcmsr%d: polling get an illegal srb command done srb='%p'srboutstandingcount=%d \n" 3714 , acb->pci_unit, srb, acb->srboutstandingcount); 3715 continue; 3716 } 3717 arcmsr_report_srb_state(acb, srb, error); 3718 } /*drain reply FIFO*/ 3719 CHIP_REG_WRITE32(HBE_MessageUnit, 0, reply_post_producer_index, doneq_index); 3720} 3721/* 3722********************************************************************** 3723********************************************************************** 3724*/ |
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3393static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb) 3394{ 3395 switch (acb->adapter_type) { 3396 case ACB_ADAPTER_TYPE_A: { 3397 arcmsr_polling_hba_srbdone(acb, poll_srb); 3398 } 3399 break; 3400 case ACB_ADAPTER_TYPE_B: { 3401 arcmsr_polling_hbb_srbdone(acb, poll_srb); 3402 } 3403 break; 3404 case ACB_ADAPTER_TYPE_C: { 3405 arcmsr_polling_hbc_srbdone(acb, poll_srb); 3406 } 3407 break; 3408 case ACB_ADAPTER_TYPE_D: { 3409 arcmsr_polling_hbd_srbdone(acb, poll_srb); 3410 } 3411 break; | 3725static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb) 3726{ 3727 switch (acb->adapter_type) { 3728 case ACB_ADAPTER_TYPE_A: { 3729 arcmsr_polling_hba_srbdone(acb, poll_srb); 3730 } 3731 break; 3732 case ACB_ADAPTER_TYPE_B: { 3733 arcmsr_polling_hbb_srbdone(acb, poll_srb); 3734 } 3735 break; 3736 case ACB_ADAPTER_TYPE_C: { 3737 arcmsr_polling_hbc_srbdone(acb, poll_srb); 3738 } 3739 break; 3740 case ACB_ADAPTER_TYPE_D: { 3741 arcmsr_polling_hbd_srbdone(acb, poll_srb); 3742 } 3743 break; |
3744 case ACB_ADAPTER_TYPE_E: { 3745 arcmsr_polling_hbe_srbdone(acb, poll_srb); 3746 } 3747 break; |
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3412 } 3413} 3414/* 3415********************************************************************** 3416********************************************************************** 3417*/ 3418static void arcmsr_get_hba_config(struct AdapterControlBlock *acb) 3419{ --- 190 unchanged lines hidden (view full) --- 3610 acb->maxOutstanding = ARCMSR_MAX_HBD_POSTQUEUE - 1; 3611 else 3612 acb->maxOutstanding = acb->firm_numbers_queue - 1; 3613} 3614/* 3615********************************************************************** 3616********************************************************************** 3617*/ | 3748 } 3749} 3750/* 3751********************************************************************** 3752********************************************************************** 3753*/ 3754static void arcmsr_get_hba_config(struct AdapterControlBlock *acb) 3755{ --- 190 unchanged lines hidden (view full) --- 3946 acb->maxOutstanding = ARCMSR_MAX_HBD_POSTQUEUE - 1; 3947 else 3948 acb->maxOutstanding = acb->firm_numbers_queue - 1; 3949} 3950/* 3951********************************************************************** 3952********************************************************************** 3953*/ |
3954static void arcmsr_get_hbe_config(struct AdapterControlBlock *acb) 3955{ 3956 char *acb_firm_model = acb->firm_model; 3957 char *acb_firm_version = acb->firm_version; 3958 char *acb_device_map = acb->device_map; 3959 size_t iop_firm_model = offsetof(struct HBE_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_MODEL_OFFSET]); /*firm_model,15,60-67*/ 3960 size_t iop_firm_version = offsetof(struct HBE_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/ 3961 size_t iop_device_map = offsetof(struct HBE_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); 3962 int i; 3963 3964 CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); 3965 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE; 3966 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 3967 if(!arcmsr_hbe_wait_msgint_ready(acb)) { 3968 printf("arcmsr%d: wait 'get adapter firmware miscellaneous data' timeout \n", acb->pci_unit); 3969 } 3970 3971 i = 0; 3972 while(i < 8) { 3973 *acb_firm_model = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_firm_model+i); 3974 /* 8 bytes firm_model, 15, 60-67*/ 3975 acb_firm_model++; 3976 i++; 3977 } 3978 i = 0; 3979 while(i < 16) { 3980 *acb_firm_version = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_firm_version+i); 3981 /* 16 bytes firm_version, 17, 68-83*/ 3982 acb_firm_version++; 3983 i++; 3984 } 3985 i = 0; 3986 while(i < 16) { 3987 *acb_device_map = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_device_map+i); 3988 acb_device_map++; 3989 i++; 3990 } 3991 printf("Areca RAID adapter%d: %s F/W version %s \n", acb->pci_unit, acb->firm_model, acb->firm_version); 3992 acb->firm_request_len = CHIP_REG_READ32(HBE_MessageUnit, 0, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/ 3993 acb->firm_numbers_queue = CHIP_REG_READ32(HBE_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/ 3994 acb->firm_sdram_size = CHIP_REG_READ32(HBE_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/ 3995 acb->firm_ide_channels = CHIP_REG_READ32(HBE_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/ 3996 acb->firm_cfg_version = CHIP_REG_READ32(HBE_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */ 3997 if(acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD) 3998 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD - 1; 3999 else 4000 acb->maxOutstanding = acb->firm_numbers_queue - 1; 4001} 4002/* 4003********************************************************************** 4004********************************************************************** 4005*/ |
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3618static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 3619{ 3620 switch (acb->adapter_type) { 3621 case ACB_ADAPTER_TYPE_A: { 3622 arcmsr_get_hba_config(acb); 3623 } 3624 break; 3625 case ACB_ADAPTER_TYPE_B: { 3626 arcmsr_get_hbb_config(acb); 3627 } 3628 break; 3629 case ACB_ADAPTER_TYPE_C: { 3630 arcmsr_get_hbc_config(acb); 3631 } 3632 break; 3633 case ACB_ADAPTER_TYPE_D: { 3634 arcmsr_get_hbd_config(acb); 3635 } 3636 break; | 4006static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 4007{ 4008 switch (acb->adapter_type) { 4009 case ACB_ADAPTER_TYPE_A: { 4010 arcmsr_get_hba_config(acb); 4011 } 4012 break; 4013 case ACB_ADAPTER_TYPE_B: { 4014 arcmsr_get_hbb_config(acb); 4015 } 4016 break; 4017 case ACB_ADAPTER_TYPE_C: { 4018 arcmsr_get_hbc_config(acb); 4019 } 4020 break; 4021 case ACB_ADAPTER_TYPE_D: { 4022 arcmsr_get_hbd_config(acb); 4023 } 4024 break; |
4025 case ACB_ADAPTER_TYPE_E: { 4026 arcmsr_get_hbe_config(acb); 4027 } 4028 break; |
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3637 } 3638} 3639/* 3640********************************************************************** 3641********************************************************************** 3642*/ 3643static void arcmsr_wait_firmware_ready( struct AdapterControlBlock *acb) 3644{ --- 45 unchanged lines hidden (view full) --- 3690 { 3691 printf( "arcmsr%d:timed out waiting for firmware ready\n", acb->pci_unit); 3692 return; 3693 } 3694 UDELAY(15000); /* wait 15 milli-seconds */ 3695 } 3696 } 3697 break; | 4029 } 4030} 4031/* 4032********************************************************************** 4033********************************************************************** 4034*/ 4035static void arcmsr_wait_firmware_ready( struct AdapterControlBlock *acb) 4036{ --- 45 unchanged lines hidden (view full) --- 4082 { 4083 printf( "arcmsr%d:timed out waiting for firmware ready\n", acb->pci_unit); 4084 return; 4085 } 4086 UDELAY(15000); /* wait 15 milli-seconds */ 4087 } 4088 } 4089 break; |
4090 case ACB_ADAPTER_TYPE_E: { 4091 while ((CHIP_REG_READ32(HBE_MessageUnit, 0, outbound_msgaddr1) & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0) 4092 { 4093 if (timeout++ > 4000) /* (4000*15)/1000 = 60 sec */ 4094 { 4095 printf( "arcmsr%d:timed out waiting for firmware ready\n", acb->pci_unit); 4096 return; 4097 } 4098 UDELAY(15000); /* wait 15 milli-seconds */ 4099 } 4100 } 4101 break; |
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3698 } 3699} 3700/* 3701********************************************************************** 3702********************************************************************** 3703*/ 3704static void arcmsr_clear_doorbell_queue_buffer( struct AdapterControlBlock *acb) 3705{ --- 27 unchanged lines hidden (view full) --- 3733 case ACB_ADAPTER_TYPE_D: { 3734 /* empty doorbell Qbuffer if door bell ringed */ 3735 outbound_doorbell = CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell); 3736 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, outbound_doorbell); /*clear doorbell interrupt */ 3737 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_doorbell, ARCMSR_HBDMU_DRV2IOP_DATA_OUT_READ); 3738 3739 } 3740 break; | 4102 } 4103} 4104/* 4105********************************************************************** 4106********************************************************************** 4107*/ 4108static void arcmsr_clear_doorbell_queue_buffer( struct AdapterControlBlock *acb) 4109{ --- 27 unchanged lines hidden (view full) --- 4137 case ACB_ADAPTER_TYPE_D: { 4138 /* empty doorbell Qbuffer if door bell ringed */ 4139 outbound_doorbell = CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell); 4140 CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, outbound_doorbell); /*clear doorbell interrupt */ 4141 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_doorbell, ARCMSR_HBDMU_DRV2IOP_DATA_OUT_READ); 4142 4143 } 4144 break; |
4145 case ACB_ADAPTER_TYPE_E: { 4146 /* empty doorbell Qbuffer if door bell ringed */ 4147 acb->in_doorbell = CHIP_REG_READ32(HBE_MessageUnit, 0, iobound_doorbell); 4148 CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_status, 0); /*clear doorbell interrupt */ 4149 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK; 4150 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 4151 } 4152 break; |
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3741 } 3742} 3743/* 3744************************************************************************ 3745************************************************************************ 3746*/ 3747static u_int32_t arcmsr_iop_confirm(struct AdapterControlBlock *acb) 3748{ --- 90 unchanged lines hidden (view full) --- 3839 CHIP_REG_WRITE32(HBD_MessageUnit, 0, msgcode_rwbuffer[4], 0x100); 3840 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG); 3841 if(!arcmsr_hbd_wait_msgint_ready(acb)) { 3842 printf( "arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit); 3843 return FALSE; 3844 } 3845 } 3846 break; | 4153 } 4154} 4155/* 4156************************************************************************ 4157************************************************************************ 4158*/ 4159static u_int32_t arcmsr_iop_confirm(struct AdapterControlBlock *acb) 4160{ --- 90 unchanged lines hidden (view full) --- 4251 CHIP_REG_WRITE32(HBD_MessageUnit, 0, msgcode_rwbuffer[4], 0x100); 4252 CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG); 4253 if(!arcmsr_hbd_wait_msgint_ready(acb)) { 4254 printf( "arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit); 4255 return FALSE; 4256 } 4257 } 4258 break; |
4259 case ACB_ADAPTER_TYPE_E: { 4260 u_int32_t cdb_phyaddr_lo32; 4261 cdb_phyaddr_lo32 = srb_phyaddr_lo32 + offsetof(struct CommandControlBlock, arcmsr_cdb); 4262 CHIP_REG_WRITE32(HBE_MessageUnit, 0, msgcode_rwbuffer[0], ARCMSR_SIGNATURE_SET_CONFIG); 4263 CHIP_REG_WRITE32(HBE_MessageUnit, 0, msgcode_rwbuffer[1], ARCMSR_SIGNATURE_1884); 4264 CHIP_REG_WRITE32(HBE_MessageUnit, 0, msgcode_rwbuffer[2], cdb_phyaddr_lo32); 4265 CHIP_REG_WRITE32(HBE_MessageUnit, 0, msgcode_rwbuffer[3], srb_phyaddr_hi32); 4266 CHIP_REG_WRITE32(HBE_MessageUnit, 0, msgcode_rwbuffer[4], SRB_SIZE); 4267 cdb_phyaddr_lo32 = srb_phyaddr_lo32 + ARCMSR_SRBS_POOL_SIZE; 4268 CHIP_REG_WRITE32(HBE_MessageUnit, 0, msgcode_rwbuffer[5], cdb_phyaddr_lo32); 4269 CHIP_REG_WRITE32(HBE_MessageUnit, 0, msgcode_rwbuffer[6], srb_phyaddr_hi32); 4270 CHIP_REG_WRITE32(HBE_MessageUnit, 0, msgcode_rwbuffer[7], COMPLETION_Q_POOL_SIZE); 4271 CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG); 4272 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE; 4273 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell); 4274 if(!arcmsr_hbe_wait_msgint_ready(acb)) { 4275 printf( "arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit); 4276 return FALSE; 4277 } 4278 } 4279 break; |
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3847 } 3848 return (TRUE); 3849} 3850/* 3851************************************************************************ 3852************************************************************************ 3853*/ 3854static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 3855{ | 4280 } 4281 return (TRUE); 4282} 4283/* 4284************************************************************************ 4285************************************************************************ 4286*/ 4287static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 4288{ |
3856 switch (acb->adapter_type) | 4289 if (acb->adapter_type == ACB_ADAPTER_TYPE_B) |
3857 { | 4290 { |
3858 case ACB_ADAPTER_TYPE_A: 3859 case ACB_ADAPTER_TYPE_C: 3860 case ACB_ADAPTER_TYPE_D: 3861 break; 3862 case ACB_ADAPTER_TYPE_B: { 3863 struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; 3864 WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_ACTIVE_EOI_MODE); 3865 if(!arcmsr_hbb_wait_msgint_ready(acb)) { 3866 printf( "arcmsr%d: 'iop enable eoi mode' timeout \n", acb->pci_unit); 3867 return; 3868 } | 4291 struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; 4292 WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_ACTIVE_EOI_MODE); 4293 if(!arcmsr_hbb_wait_msgint_ready(acb)) { 4294 printf( "arcmsr%d: 'iop enable eoi mode' timeout \n", acb->pci_unit); 4295 return; |
3869 } | 4296 } |
3870 break; | |
3871 } 3872} 3873/* 3874********************************************************************** 3875********************************************************************** 3876*/ 3877static void arcmsr_iop_init(struct AdapterControlBlock *acb) 3878{ --- 29 unchanged lines hidden (view full) --- 3908 for(i=0; i < ARCMSR_MAX_FREESRB_NUM; i++) { 3909 if(bus_dmamap_create(acb->dm_segs_dmat, 3910 /*flags*/0, &srb_tmp->dm_segs_dmamap) != 0) { 3911 acb->acb_flags |= ACB_F_MAPFREESRB_FAILD; 3912 printf("arcmsr%d:" 3913 " srb dmamap bus_dmamap_create error\n", acb->pci_unit); 3914 return; 3915 } | 4297 } 4298} 4299/* 4300********************************************************************** 4301********************************************************************** 4302*/ 4303static void arcmsr_iop_init(struct AdapterControlBlock *acb) 4304{ --- 29 unchanged lines hidden (view full) --- 4334 for(i=0; i < ARCMSR_MAX_FREESRB_NUM; i++) { 4335 if(bus_dmamap_create(acb->dm_segs_dmat, 4336 /*flags*/0, &srb_tmp->dm_segs_dmamap) != 0) { 4337 acb->acb_flags |= ACB_F_MAPFREESRB_FAILD; 4338 printf("arcmsr%d:" 4339 " srb dmamap bus_dmamap_create error\n", acb->pci_unit); 4340 return; 4341 } |
3916 if((acb->adapter_type == ACB_ADAPTER_TYPE_C) || (acb->adapter_type == ACB_ADAPTER_TYPE_D)) | 4342 if((acb->adapter_type == ACB_ADAPTER_TYPE_C) || (acb->adapter_type == ACB_ADAPTER_TYPE_D) 4343 || (acb->adapter_type == ACB_ADAPTER_TYPE_E)) |
3917 { 3918 srb_tmp->cdb_phyaddr_low = srb_phyaddr; 3919 srb_tmp->cdb_phyaddr_high = (u_int32_t)((srb_phyaddr >> 16) >> 16); 3920 } 3921 else 3922 srb_tmp->cdb_phyaddr_low = srb_phyaddr >> 5; 3923 srb_tmp->acb = acb; | 4344 { 4345 srb_tmp->cdb_phyaddr_low = srb_phyaddr; 4346 srb_tmp->cdb_phyaddr_high = (u_int32_t)((srb_phyaddr >> 16) >> 16); 4347 } 4348 else 4349 srb_tmp->cdb_phyaddr_low = srb_phyaddr >> 5; 4350 srb_tmp->acb = acb; |
4351 srb_tmp->smid = i << 16; |
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3924 acb->srbworkingQ[i] = acb->psrb_pool[i] = srb_tmp; 3925 srb_phyaddr = srb_phyaddr + SRB_SIZE; 3926 srb_tmp = (struct CommandControlBlock *)((unsigned long)srb_tmp + SRB_SIZE); 3927 } | 4352 acb->srbworkingQ[i] = acb->psrb_pool[i] = srb_tmp; 4353 srb_phyaddr = srb_phyaddr + SRB_SIZE; 4354 srb_tmp = (struct CommandControlBlock *)((unsigned long)srb_tmp + SRB_SIZE); 4355 } |
4356 acb->pCompletionQ = (pCompletion_Q)srb_tmp; |
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3928 acb->vir2phy_offset = (unsigned long)srb_tmp - (unsigned long)srb_phyaddr; 3929} 3930/* 3931************************************************************************ 3932************************************************************************ 3933*/ 3934static void arcmsr_free_resource(struct AdapterControlBlock *acb) 3935{ --- 51 unchanged lines hidden (view full) --- 3987 acb->adapter_type = ACB_ADAPTER_TYPE_C; 3988 if (acb->sub_device_id == ARECA_SUB_DEV_ID_1883) 3989 acb->adapter_bus_speed = ACB_BUS_SPEED_12G; 3990 else 3991 acb->adapter_bus_speed = ACB_BUS_SPEED_6G; 3992 max_coherent_size = ARCMSR_SRBS_POOL_SIZE; 3993 } 3994 break; | 4357 acb->vir2phy_offset = (unsigned long)srb_tmp - (unsigned long)srb_phyaddr; 4358} 4359/* 4360************************************************************************ 4361************************************************************************ 4362*/ 4363static void arcmsr_free_resource(struct AdapterControlBlock *acb) 4364{ --- 51 unchanged lines hidden (view full) --- 4416 acb->adapter_type = ACB_ADAPTER_TYPE_C; 4417 if (acb->sub_device_id == ARECA_SUB_DEV_ID_1883) 4418 acb->adapter_bus_speed = ACB_BUS_SPEED_12G; 4419 else 4420 acb->adapter_bus_speed = ACB_BUS_SPEED_6G; 4421 max_coherent_size = ARCMSR_SRBS_POOL_SIZE; 4422 } 4423 break; |
4424 case PCIDevVenIDARC1884: 4425 acb->adapter_type = ACB_ADAPTER_TYPE_E; 4426 acb->adapter_bus_speed = ACB_BUS_SPEED_12G; 4427 max_coherent_size = ARCMSR_SRBS_POOL_SIZE + COMPLETION_Q_POOL_SIZE; 4428 acb->completionQ_entry = COMPLETION_Q_POOL_SIZE / sizeof(struct deliver_completeQ); 4429 break; |
|
3995 case PCIDevVenIDARC1214: { 3996 acb->adapter_type = ACB_ADAPTER_TYPE_D; 3997 acb->adapter_bus_speed = ACB_BUS_SPEED_6G; 3998 max_coherent_size = ARCMSR_SRBS_POOL_SIZE + (sizeof(struct HBD_MessageUnit0)); 3999 } 4000 break; 4001 case PCIDevVenIDARC1200: 4002 case PCIDevVenIDARC1201: { --- 132 unchanged lines hidden (view full) --- 4135 pci_command = pci_read_config(dev, PCIR_COMMAND, 2); 4136 pci_command |= PCIM_CMD_BUSMASTEREN; 4137 pci_command |= PCIM_CMD_PERRESPEN; 4138 pci_command |= PCIM_CMD_MWRICEN; 4139 /* Enable Busmaster */ 4140 pci_write_config(dev, PCIR_COMMAND, pci_command, 2); 4141 switch(acb->adapter_type) { 4142 case ACB_ADAPTER_TYPE_A: { | 4430 case PCIDevVenIDARC1214: { 4431 acb->adapter_type = ACB_ADAPTER_TYPE_D; 4432 acb->adapter_bus_speed = ACB_BUS_SPEED_6G; 4433 max_coherent_size = ARCMSR_SRBS_POOL_SIZE + (sizeof(struct HBD_MessageUnit0)); 4434 } 4435 break; 4436 case PCIDevVenIDARC1200: 4437 case PCIDevVenIDARC1201: { --- 132 unchanged lines hidden (view full) --- 4570 pci_command = pci_read_config(dev, PCIR_COMMAND, 2); 4571 pci_command |= PCIM_CMD_BUSMASTEREN; 4572 pci_command |= PCIM_CMD_PERRESPEN; 4573 pci_command |= PCIM_CMD_MWRICEN; 4574 /* Enable Busmaster */ 4575 pci_write_config(dev, PCIR_COMMAND, pci_command, 2); 4576 switch(acb->adapter_type) { 4577 case ACB_ADAPTER_TYPE_A: { |
4143 u_int32_t rid0 = PCIR_BAR(0); 4144 vm_offset_t mem_base0; | 4578 u_int32_t rid0 = PCIR_BAR(0); 4579 vm_offset_t mem_base0; |
4145 | 4580 |
4146 acb->sys_res_arcmsr[0] = bus_alloc_resource_any(dev,SYS_RES_MEMORY, &rid0, RF_ACTIVE); 4147 if(acb->sys_res_arcmsr[0] == NULL) { 4148 arcmsr_free_resource(acb); 4149 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev)); 4150 return ENOMEM; 4151 } 4152 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) { 4153 arcmsr_free_resource(acb); 4154 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev)); 4155 return ENXIO; 4156 } 4157 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]); 4158 if(mem_base0 == 0) { 4159 arcmsr_free_resource(acb); 4160 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev)); 4161 return ENXIO; 4162 } 4163 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]); 4164 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]); 4165 acb->pmu = (struct MessageUnit_UNION *)mem_base0; | 4581 acb->sys_res_arcmsr[0] = bus_alloc_resource_any(dev,SYS_RES_MEMORY, &rid0, RF_ACTIVE); 4582 if(acb->sys_res_arcmsr[0] == NULL) { 4583 arcmsr_free_resource(acb); 4584 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev)); 4585 return ENOMEM; |
4166 } | 4586 } |
4587 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) { 4588 arcmsr_free_resource(acb); 4589 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev)); 4590 return ENXIO; 4591 } 4592 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]); 4593 if(mem_base0 == 0) { 4594 arcmsr_free_resource(acb); 4595 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev)); 4596 return ENXIO; 4597 } 4598 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]); 4599 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]); 4600 acb->pmu = (struct MessageUnit_UNION *)mem_base0; 4601 acb->rid = 0; 4602 } |
|
4167 break; 4168 case ACB_ADAPTER_TYPE_B: { | 4603 break; 4604 case ACB_ADAPTER_TYPE_B: { |
4169 struct HBB_MessageUnit *phbbmu; 4170 struct CommandControlBlock *freesrb; 4171 u_int32_t rid[]={ PCIR_BAR(0), PCIR_BAR(2) }; 4172 vm_offset_t mem_base[]={0,0}; 4173 u_long size; 4174 if (vendor_dev_id == PCIDevVenIDARC1203) 4175 size = sizeof(struct HBB_DOORBELL_1203); 4176 else 4177 size = sizeof(struct HBB_DOORBELL); 4178 for(i=0; i < 2; i++) { 4179 if(i == 0) { 4180 acb->sys_res_arcmsr[i] = bus_alloc_resource_any(dev,SYS_RES_MEMORY, &rid[i], 4181 RF_ACTIVE); 4182 } else { 4183 acb->sys_res_arcmsr[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid[i], 4184 RF_ACTIVE); 4185 } 4186 if(acb->sys_res_arcmsr[i] == NULL) { 4187 arcmsr_free_resource(acb); 4188 printf("arcmsr%d: bus_alloc_resource %d failure!\n", device_get_unit(dev), i); 4189 return ENOMEM; 4190 } 4191 if(rman_get_start(acb->sys_res_arcmsr[i]) <= 0) { 4192 arcmsr_free_resource(acb); 4193 printf("arcmsr%d: rman_get_start %d failure!\n", device_get_unit(dev), i); 4194 return ENXIO; 4195 } 4196 mem_base[i] = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[i]); 4197 if(mem_base[i] == 0) { 4198 arcmsr_free_resource(acb); 4199 printf("arcmsr%d: rman_get_virtual %d failure!\n", device_get_unit(dev), i); 4200 return ENXIO; 4201 } 4202 acb->btag[i] = rman_get_bustag(acb->sys_res_arcmsr[i]); 4203 acb->bhandle[i] = rman_get_bushandle(acb->sys_res_arcmsr[i]); 4204 } 4205 freesrb = (struct CommandControlBlock *)acb->uncacheptr; 4206 acb->pmu = (struct MessageUnit_UNION *)((unsigned long)freesrb+ARCMSR_SRBS_POOL_SIZE); 4207 phbbmu = (struct HBB_MessageUnit *)acb->pmu; 4208 phbbmu->hbb_doorbell = (struct HBB_DOORBELL *)mem_base[0]; 4209 phbbmu->hbb_rwbuffer = (struct HBB_RWBUFFER *)mem_base[1]; 4210 if (vendor_dev_id == PCIDevVenIDARC1203) { 4211 phbbmu->drv2iop_doorbell = offsetof(struct HBB_DOORBELL_1203, drv2iop_doorbell); 4212 phbbmu->drv2iop_doorbell_mask = offsetof(struct HBB_DOORBELL_1203, drv2iop_doorbell_mask); 4213 phbbmu->iop2drv_doorbell = offsetof(struct HBB_DOORBELL_1203, iop2drv_doorbell); 4214 phbbmu->iop2drv_doorbell_mask = offsetof(struct HBB_DOORBELL_1203, iop2drv_doorbell_mask); | 4605 struct HBB_MessageUnit *phbbmu; 4606 struct CommandControlBlock *freesrb; 4607 u_int32_t rid[]={ PCIR_BAR(0), PCIR_BAR(2) }; 4608 vm_offset_t mem_base[]={0,0}; 4609 u_long size; 4610 if (vendor_dev_id == PCIDevVenIDARC1203) 4611 size = sizeof(struct HBB_DOORBELL_1203); 4612 else 4613 size = sizeof(struct HBB_DOORBELL); 4614 for(i=0; i < 2; i++) { 4615 if(i == 0) { 4616 acb->sys_res_arcmsr[i] = bus_alloc_resource_any(dev,SYS_RES_MEMORY, &rid[i], 4617 RF_ACTIVE); |
4215 } else { | 4618 } else { |
4216 phbbmu->drv2iop_doorbell = offsetof(struct HBB_DOORBELL, drv2iop_doorbell); 4217 phbbmu->drv2iop_doorbell_mask = offsetof(struct HBB_DOORBELL, drv2iop_doorbell_mask); 4218 phbbmu->iop2drv_doorbell = offsetof(struct HBB_DOORBELL, iop2drv_doorbell); 4219 phbbmu->iop2drv_doorbell_mask = offsetof(struct HBB_DOORBELL, iop2drv_doorbell_mask); | 4619 acb->sys_res_arcmsr[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid[i], 4620 RF_ACTIVE); |
4220 } | 4621 } |
4221 } 4222 break; 4223 case ACB_ADAPTER_TYPE_C: { 4224 u_int32_t rid0 = PCIR_BAR(1); 4225 vm_offset_t mem_base0; 4226 4227 acb->sys_res_arcmsr[0] = bus_alloc_resource_any(dev,SYS_RES_MEMORY, &rid0, RF_ACTIVE); 4228 if(acb->sys_res_arcmsr[0] == NULL) { | 4622 if(acb->sys_res_arcmsr[i] == NULL) { |
4229 arcmsr_free_resource(acb); | 4623 arcmsr_free_resource(acb); |
4230 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev)); | 4624 printf("arcmsr%d: bus_alloc_resource %d failure!\n", device_get_unit(dev), i); |
4231 return ENOMEM; 4232 } | 4625 return ENOMEM; 4626 } |
4233 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) { | 4627 if(rman_get_start(acb->sys_res_arcmsr[i]) <= 0) { |
4234 arcmsr_free_resource(acb); | 4628 arcmsr_free_resource(acb); |
4235 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev)); | 4629 printf("arcmsr%d: rman_get_start %d failure!\n", device_get_unit(dev), i); |
4236 return ENXIO; 4237 } | 4630 return ENXIO; 4631 } |
4238 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]); 4239 if(mem_base0 == 0) { | 4632 mem_base[i] = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[i]); 4633 if(mem_base[i] == 0) { |
4240 arcmsr_free_resource(acb); | 4634 arcmsr_free_resource(acb); |
4241 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev)); | 4635 printf("arcmsr%d: rman_get_virtual %d failure!\n", device_get_unit(dev), i); |
4242 return ENXIO; 4243 } | 4636 return ENXIO; 4637 } |
4244 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]); 4245 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]); 4246 acb->pmu = (struct MessageUnit_UNION *)mem_base0; | 4638 acb->btag[i] = rman_get_bustag(acb->sys_res_arcmsr[i]); 4639 acb->bhandle[i] = rman_get_bushandle(acb->sys_res_arcmsr[i]); |
4247 } | 4640 } |
4641 freesrb = (struct CommandControlBlock *)acb->uncacheptr; 4642 acb->pmu = (struct MessageUnit_UNION *)((unsigned long)freesrb+ARCMSR_SRBS_POOL_SIZE); 4643 phbbmu = (struct HBB_MessageUnit *)acb->pmu; 4644 phbbmu->hbb_doorbell = (struct HBB_DOORBELL *)mem_base[0]; 4645 phbbmu->hbb_rwbuffer = (struct HBB_RWBUFFER *)mem_base[1]; 4646 if (vendor_dev_id == PCIDevVenIDARC1203) { 4647 phbbmu->drv2iop_doorbell = offsetof(struct HBB_DOORBELL_1203, drv2iop_doorbell); 4648 phbbmu->drv2iop_doorbell_mask = offsetof(struct HBB_DOORBELL_1203, drv2iop_doorbell_mask); 4649 phbbmu->iop2drv_doorbell = offsetof(struct HBB_DOORBELL_1203, iop2drv_doorbell); 4650 phbbmu->iop2drv_doorbell_mask = offsetof(struct HBB_DOORBELL_1203, iop2drv_doorbell_mask); 4651 } else { 4652 phbbmu->drv2iop_doorbell = offsetof(struct HBB_DOORBELL, drv2iop_doorbell); 4653 phbbmu->drv2iop_doorbell_mask = offsetof(struct HBB_DOORBELL, drv2iop_doorbell_mask); 4654 phbbmu->iop2drv_doorbell = offsetof(struct HBB_DOORBELL, iop2drv_doorbell); 4655 phbbmu->iop2drv_doorbell_mask = offsetof(struct HBB_DOORBELL, iop2drv_doorbell_mask); 4656 } 4657 acb->rid = 0; 4658 } |
|
4248 break; | 4659 break; |
4660 case ACB_ADAPTER_TYPE_C: { 4661 u_int32_t rid0 = PCIR_BAR(1); 4662 vm_offset_t mem_base0; 4663 4664 acb->sys_res_arcmsr[0] = bus_alloc_resource_any(dev,SYS_RES_MEMORY, &rid0, RF_ACTIVE); 4665 if(acb->sys_res_arcmsr[0] == NULL) { 4666 arcmsr_free_resource(acb); 4667 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev)); 4668 return ENOMEM; 4669 } 4670 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) { 4671 arcmsr_free_resource(acb); 4672 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev)); 4673 return ENXIO; 4674 } 4675 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]); 4676 if(mem_base0 == 0) { 4677 arcmsr_free_resource(acb); 4678 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev)); 4679 return ENXIO; 4680 } 4681 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]); 4682 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]); 4683 acb->pmu = (struct MessageUnit_UNION *)mem_base0; 4684 acb->rid = 1; 4685 } 4686 break; |
|
4249 case ACB_ADAPTER_TYPE_D: { | 4687 case ACB_ADAPTER_TYPE_D: { |
4250 struct HBD_MessageUnit0 *phbdmu; 4251 u_int32_t rid0 = PCIR_BAR(0); 4252 vm_offset_t mem_base0; | 4688 struct HBD_MessageUnit0 *phbdmu; 4689 u_int32_t rid0 = PCIR_BAR(0); 4690 vm_offset_t mem_base0; |
4253 | 4691 |
4254 acb->sys_res_arcmsr[0] = bus_alloc_resource_any(dev,SYS_RES_MEMORY, &rid0, RF_ACTIVE); 4255 if(acb->sys_res_arcmsr[0] == NULL) { 4256 arcmsr_free_resource(acb); 4257 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev)); 4258 return ENOMEM; 4259 } 4260 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) { 4261 arcmsr_free_resource(acb); 4262 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev)); 4263 return ENXIO; 4264 } 4265 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]); 4266 if(mem_base0 == 0) { 4267 arcmsr_free_resource(acb); 4268 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev)); 4269 return ENXIO; 4270 } 4271 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]); 4272 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]); 4273 acb->pmu = (struct MessageUnit_UNION *)((unsigned long)acb->uncacheptr+ARCMSR_SRBS_POOL_SIZE); 4274 phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; 4275 phbdmu->phbdmu = (struct HBD_MessageUnit *)mem_base0; | 4692 acb->sys_res_arcmsr[0] = bus_alloc_resource_any(dev,SYS_RES_MEMORY, &rid0, RF_ACTIVE); 4693 if(acb->sys_res_arcmsr[0] == NULL) { 4694 arcmsr_free_resource(acb); 4695 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev)); 4696 return ENOMEM; |
4276 } | 4697 } |
4698 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) { 4699 arcmsr_free_resource(acb); 4700 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev)); 4701 return ENXIO; 4702 } 4703 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]); 4704 if(mem_base0 == 0) { 4705 arcmsr_free_resource(acb); 4706 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev)); 4707 return ENXIO; 4708 } 4709 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]); 4710 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]); 4711 acb->pmu = (struct MessageUnit_UNION *)((unsigned long)acb->uncacheptr+ARCMSR_SRBS_POOL_SIZE); 4712 phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; 4713 phbdmu->phbdmu = (struct HBD_MessageUnit *)mem_base0; 4714 acb->rid = 0; 4715 } |
|
4277 break; | 4716 break; |
4717 case ACB_ADAPTER_TYPE_E: { 4718 u_int32_t rid0 = PCIR_BAR(1); 4719 vm_offset_t mem_base0; 4720 4721 acb->sys_res_arcmsr[0] = bus_alloc_resource(dev,SYS_RES_MEMORY, &rid0, 0ul, ~0ul, sizeof(struct HBE_MessageUnit), RF_ACTIVE); 4722 if(acb->sys_res_arcmsr[0] == NULL) { 4723 arcmsr_free_resource(acb); 4724 printf("arcmsr%d: bus_alloc_resource failure!\n", device_get_unit(dev)); 4725 return ENOMEM; 4726 } 4727 if(rman_get_start(acb->sys_res_arcmsr[0]) <= 0) { 4728 arcmsr_free_resource(acb); 4729 printf("arcmsr%d: rman_get_start failure!\n", device_get_unit(dev)); 4730 return ENXIO; 4731 } 4732 mem_base0 = (vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr[0]); 4733 if(mem_base0 == 0) { 4734 arcmsr_free_resource(acb); 4735 printf("arcmsr%d: rman_get_virtual failure!\n", device_get_unit(dev)); 4736 return ENXIO; 4737 } 4738 acb->btag[0] = rman_get_bustag(acb->sys_res_arcmsr[0]); 4739 acb->bhandle[0] = rman_get_bushandle(acb->sys_res_arcmsr[0]); 4740 acb->pmu = (struct MessageUnit_UNION *)mem_base0; 4741 acb->doneq_index = 0; 4742 acb->in_doorbell = 0; 4743 acb->out_doorbell = 0; 4744 acb->rid = 1; 4745 CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_status, 0); /*clear interrupt*/ 4746 CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, ARCMSR_HBEMU_DOORBELL_SYNC); /* synchronize doorbell to 0 */ 4747 } 4748 break; |
|
4278 } 4279 if(acb->acb_flags & ACB_F_MAPFREESRB_FAILD) { 4280 arcmsr_free_resource(acb); 4281 printf("arcmsr%d: map free srb failure!\n", device_get_unit(dev)); 4282 return ENXIO; 4283 } 4284 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED|ACB_F_MESSAGE_RQBUFFER_CLEARED|ACB_F_MESSAGE_WQBUFFER_READ); 4285 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; --- 5 unchanged lines hidden (view full) --- 4291 for(i=0; i < ARCMSR_MAX_TARGETID; i++) { 4292 for(j=0; j < ARCMSR_MAX_TARGETLUN; j++) { 4293 acb->devstate[i][j] = ARECA_RAID_GONE; 4294 } 4295 } 4296 arcmsr_iop_init(acb); 4297 return(0); 4298} | 4749 } 4750 if(acb->acb_flags & ACB_F_MAPFREESRB_FAILD) { 4751 arcmsr_free_resource(acb); 4752 printf("arcmsr%d: map free srb failure!\n", device_get_unit(dev)); 4753 return ENXIO; 4754 } 4755 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED|ACB_F_MESSAGE_RQBUFFER_CLEARED|ACB_F_MESSAGE_WQBUFFER_READ); 4756 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; --- 5 unchanged lines hidden (view full) --- 4762 for(i=0; i < ARCMSR_MAX_TARGETID; i++) { 4763 for(j=0; j < ARCMSR_MAX_TARGETLUN; j++) { 4764 acb->devstate[i][j] = ARECA_RAID_GONE; 4765 } 4766 } 4767 arcmsr_iop_init(acb); 4768 return(0); 4769} |
4770 4771static int arcmsr_setup_msix(struct AdapterControlBlock *acb) 4772{ 4773 int i; 4774 4775 for (i = 0; i < acb->msix_vectors; i++) { 4776 acb->irq_id[i] = acb->rid + i; 4777 acb->irqres[i] = bus_alloc_resource_any(acb->pci_dev, 4778 SYS_RES_IRQ, &acb->irq_id[i], RF_ACTIVE); 4779 if (acb->irqres[i] == NULL) { 4780 printf("arcmsr: Can't allocate MSI-X resource\n"); 4781 goto irq_alloc_failed; 4782 } 4783 if (bus_setup_intr(acb->pci_dev, acb->irqres[i], 4784 INTR_MPSAFE | INTR_TYPE_CAM, NULL, arcmsr_intr_handler, 4785 acb, &acb->ih[i])) { 4786 printf("arcmsr: Cannot set up MSI-X interrupt handler\n"); 4787 goto irq_alloc_failed; 4788 } 4789 } 4790 printf("arcmsr: MSI-X INT enabled\n"); 4791 acb->acb_flags |= ACB_F_MSIX_ENABLED; 4792 return TRUE; 4793 4794irq_alloc_failed: 4795 arcmsr_teardown_intr(acb->pci_dev, acb); 4796 return FALSE; 4797} 4798 |
|
4299/* 4300************************************************************************ 4301************************************************************************ 4302*/ 4303static int arcmsr_attach(device_t dev) 4304{ 4305 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 4306 u_int32_t unit=device_get_unit(dev); 4307 struct ccb_setasync csa; 4308 struct cam_devq *devq; /* Device Queue to use for this SIM */ 4309 struct resource *irqres; | 4799/* 4800************************************************************************ 4801************************************************************************ 4802*/ 4803static int arcmsr_attach(device_t dev) 4804{ 4805 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 4806 u_int32_t unit=device_get_unit(dev); 4807 struct ccb_setasync csa; 4808 struct cam_devq *devq; /* Device Queue to use for this SIM */ 4809 struct resource *irqres; |
4310 int rid; | |
4311 4312 if(acb == NULL) { 4313 printf("arcmsr%d: cannot allocate softc\n", unit); 4314 return (ENOMEM); 4315 } 4316 arcmsr_mutex_init(acb); 4317 acb->pci_dev = dev; 4318 acb->pci_unit = unit; 4319 if(arcmsr_initialize(dev)) { 4320 printf("arcmsr%d: initialize failure!\n", unit); | 4810 4811 if(acb == NULL) { 4812 printf("arcmsr%d: cannot allocate softc\n", unit); 4813 return (ENOMEM); 4814 } 4815 arcmsr_mutex_init(acb); 4816 acb->pci_dev = dev; 4817 acb->pci_unit = unit; 4818 if(arcmsr_initialize(dev)) { 4819 printf("arcmsr%d: initialize failure!\n", unit); |
4321 arcmsr_mutex_destroy(acb); 4322 return ENXIO; | 4820 goto initialize_failed; |
4323 } 4324 /* After setting up the adapter, map our interrupt */ | 4821 } 4822 /* After setting up the adapter, map our interrupt */ |
4325 rid = 0; 4326 irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); | 4823 acb->msix_vectors = ARCMSR_NUM_MSIX_VECTORS; 4824 if (pci_alloc_msix(dev, &acb->msix_vectors) == 0) { 4825 if (arcmsr_setup_msix(acb) == TRUE) 4826 goto irqx; 4827 } 4828 acb->irq_id[0] = acb->rid; 4829 irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &acb->irq_id[0], RF_SHAREABLE | RF_ACTIVE); |
4327 if(irqres == NULL || 4328#if __FreeBSD_version >= 700025 | 4830 if(irqres == NULL || 4831#if __FreeBSD_version >= 700025 |
4329 bus_setup_intr(dev, irqres, INTR_TYPE_CAM|INTR_ENTROPY|INTR_MPSAFE, NULL, arcmsr_intr_handler, acb, &acb->ih)) { | 4832 bus_setup_intr(dev, irqres, INTR_TYPE_CAM|INTR_ENTROPY|INTR_MPSAFE, NULL, arcmsr_intr_handler, acb, &acb->ih[0])) { |
4330#else | 4833#else |
4331 bus_setup_intr(dev, irqres, INTR_TYPE_CAM|INTR_ENTROPY|INTR_MPSAFE, arcmsr_intr_handler, acb, &acb->ih)) { | 4834 bus_setup_intr(dev, irqres, INTR_TYPE_CAM|INTR_ENTROPY|INTR_MPSAFE, arcmsr_intr_handler, acb, &acb->ih[0])) { |
4332#endif | 4835#endif |
4333 arcmsr_free_resource(acb); 4334 arcmsr_mutex_destroy(acb); | |
4335 printf("arcmsr%d: unable to register interrupt handler!\n", unit); | 4836 printf("arcmsr%d: unable to register interrupt handler!\n", unit); |
4336 return ENXIO; | 4837 goto setup_intr_failed; |
4337 } | 4838 } |
4338 acb->irqres = irqres; | 4839 acb->irqres[0] = irqres; 4840irqx: |
4339 /* 4340 * Now let the CAM generic SCSI layer find the SCSI devices on 4341 * the bus * start queue to reset to the idle loop. * 4342 * Create device queue of SIM(s) * (MAX_START_JOB - 1) : 4343 * max_sim_transactions 4344 */ 4345 devq = cam_simq_alloc(acb->maxOutstanding); 4346 if(devq == NULL) { | 4841 /* 4842 * Now let the CAM generic SCSI layer find the SCSI devices on 4843 * the bus * start queue to reset to the idle loop. * 4844 * Create device queue of SIM(s) * (MAX_START_JOB - 1) : 4845 * max_sim_transactions 4846 */ 4847 devq = cam_simq_alloc(acb->maxOutstanding); 4848 if(devq == NULL) { |
4347 arcmsr_free_resource(acb); 4348 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 4349 arcmsr_mutex_destroy(acb); | |
4350 printf("arcmsr%d: cam_simq_alloc failure!\n", unit); | 4849 printf("arcmsr%d: cam_simq_alloc failure!\n", unit); |
4351 return ENXIO; | 4850 goto simq_alloc_failed; |
4352 } 4353#if __FreeBSD_version >= 700025 4354 acb->psim = cam_sim_alloc(arcmsr_action, arcmsr_poll, "arcmsr", acb, unit, &acb->isr_lock, 1, ARCMSR_MAX_OUTSTANDING_CMD, devq); 4355#else 4356 acb->psim = cam_sim_alloc(arcmsr_action, arcmsr_poll, "arcmsr", acb, unit, 1, ARCMSR_MAX_OUTSTANDING_CMD, devq); 4357#endif 4358 if(acb->psim == NULL) { | 4851 } 4852#if __FreeBSD_version >= 700025 4853 acb->psim = cam_sim_alloc(arcmsr_action, arcmsr_poll, "arcmsr", acb, unit, &acb->isr_lock, 1, ARCMSR_MAX_OUTSTANDING_CMD, devq); 4854#else 4855 acb->psim = cam_sim_alloc(arcmsr_action, arcmsr_poll, "arcmsr", acb, unit, 1, ARCMSR_MAX_OUTSTANDING_CMD, devq); 4856#endif 4857 if(acb->psim == NULL) { |
4359 arcmsr_free_resource(acb); 4360 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 4361 cam_simq_free(devq); 4362 arcmsr_mutex_destroy(acb); | |
4363 printf("arcmsr%d: cam_sim_alloc failure!\n", unit); | 4858 printf("arcmsr%d: cam_sim_alloc failure!\n", unit); |
4364 return ENXIO; | 4859 goto sim_alloc_failed; |
4365 } 4366 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock); 4367#if __FreeBSD_version >= 700044 4368 if(xpt_bus_register(acb->psim, dev, 0) != CAM_SUCCESS) { 4369#else 4370 if(xpt_bus_register(acb->psim, 0) != CAM_SUCCESS) { 4371#endif | 4860 } 4861 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock); 4862#if __FreeBSD_version >= 700044 4863 if(xpt_bus_register(acb->psim, dev, 0) != CAM_SUCCESS) { 4864#else 4865 if(xpt_bus_register(acb->psim, 0) != CAM_SUCCESS) { 4866#endif |
4372 arcmsr_free_resource(acb); 4373 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 4374 cam_sim_free(acb->psim, /*free_devq*/TRUE); 4375 arcmsr_mutex_destroy(acb); | |
4376 printf("arcmsr%d: xpt_bus_register failure!\n", unit); | 4867 printf("arcmsr%d: xpt_bus_register failure!\n", unit); |
4377 return ENXIO; | 4868 goto xpt_bus_failed; |
4378 } 4379 if(xpt_create_path(&acb->ppath, /* periph */ NULL, cam_sim_path(acb->psim), CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { | 4869 } 4870 if(xpt_create_path(&acb->ppath, /* periph */ NULL, cam_sim_path(acb->psim), CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { |
4380 arcmsr_free_resource(acb); 4381 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 4382 xpt_bus_deregister(cam_sim_path(acb->psim)); 4383 cam_sim_free(acb->psim, /* free_simq */ TRUE); 4384 arcmsr_mutex_destroy(acb); | |
4385 printf("arcmsr%d: xpt_create_path failure!\n", unit); | 4871 printf("arcmsr%d: xpt_create_path failure!\n", unit); |
4386 return ENXIO; | 4872 goto xpt_path_failed; |
4387 } 4388 /* 4389 **************************************************** 4390 */ 4391 xpt_setup_ccb(&csa.ccb_h, acb->ppath, /*priority*/5); 4392 csa.ccb_h.func_code = XPT_SASYNC_CB; 4393 csa.event_enable = AC_FOUND_DEVICE|AC_LOST_DEVICE; 4394 csa.callback = arcmsr_async; --- 7 unchanged lines hidden (view full) --- 4402 acb->ioctl_dev->si_drv1 = acb; 4403#endif 4404#if __FreeBSD_version > 500005 4405 (void)make_dev_alias(acb->ioctl_dev, "arc%d", unit); 4406#endif 4407 arcmsr_callout_init(&acb->devmap_callout); 4408 callout_reset(&acb->devmap_callout, 60 * hz, arcmsr_polling_devmap, acb); 4409 return (0); | 4873 } 4874 /* 4875 **************************************************** 4876 */ 4877 xpt_setup_ccb(&csa.ccb_h, acb->ppath, /*priority*/5); 4878 csa.ccb_h.func_code = XPT_SASYNC_CB; 4879 csa.event_enable = AC_FOUND_DEVICE|AC_LOST_DEVICE; 4880 csa.callback = arcmsr_async; --- 7 unchanged lines hidden (view full) --- 4888 acb->ioctl_dev->si_drv1 = acb; 4889#endif 4890#if __FreeBSD_version > 500005 4891 (void)make_dev_alias(acb->ioctl_dev, "arc%d", unit); 4892#endif 4893 arcmsr_callout_init(&acb->devmap_callout); 4894 callout_reset(&acb->devmap_callout, 60 * hz, arcmsr_polling_devmap, acb); 4895 return (0); |
4896xpt_path_failed: 4897 xpt_bus_deregister(cam_sim_path(acb->psim)); 4898xpt_bus_failed: 4899 cam_sim_free(acb->psim, /* free_simq */ TRUE); 4900sim_alloc_failed: 4901 cam_simq_free(devq); 4902simq_alloc_failed: 4903 arcmsr_teardown_intr(dev, acb); 4904setup_intr_failed: 4905 arcmsr_free_resource(acb); 4906initialize_failed: 4907 arcmsr_mutex_destroy(acb); 4908 return ENXIO; |
|
4410} 4411 4412/* 4413************************************************************************ 4414************************************************************************ 4415*/ 4416static int arcmsr_probe(device_t dev) 4417{ --- 40 unchanged lines hidden (view full) --- 4458 case PCIDevVenIDARC1882: 4459 case PCIDevVenIDARC1213: 4460 case PCIDevVenIDARC1223: 4461 if (sub_device_id == ARECA_SUB_DEV_ID_1883) 4462 type = "SAS 12G"; 4463 else 4464 type = "SAS 6G"; 4465 break; | 4909} 4910 4911/* 4912************************************************************************ 4913************************************************************************ 4914*/ 4915static int arcmsr_probe(device_t dev) 4916{ --- 40 unchanged lines hidden (view full) --- 4957 case PCIDevVenIDARC1882: 4958 case PCIDevVenIDARC1213: 4959 case PCIDevVenIDARC1223: 4960 if (sub_device_id == ARECA_SUB_DEV_ID_1883) 4961 type = "SAS 12G"; 4962 else 4963 type = "SAS 6G"; 4964 break; |
4965 case PCIDevVenIDARC1884: 4966 type = "SAS 12G"; 4967 break; |
|
4466 case PCIDevVenIDARC1214: 4467 case PCIDevVenIDARC1203: 4468 type = "SATA 6G"; 4469 break; 4470 default: 4471 type = x_type; 4472 raid6 = 0; 4473 break; --- 46 unchanged lines hidden (view full) --- 4520 acb->pktReturnCount = 0; 4521 ARCMSR_LOCK_RELEASE(&acb->isr_lock); 4522 return (0); 4523} 4524/* 4525************************************************************************ 4526************************************************************************ 4527*/ | 4968 case PCIDevVenIDARC1214: 4969 case PCIDevVenIDARC1203: 4970 type = "SATA 6G"; 4971 break; 4972 default: 4973 type = x_type; 4974 raid6 = 0; 4975 break; --- 46 unchanged lines hidden (view full) --- 5022 acb->pktReturnCount = 0; 5023 ARCMSR_LOCK_RELEASE(&acb->isr_lock); 5024 return (0); 5025} 5026/* 5027************************************************************************ 5028************************************************************************ 5029*/ |
5030void arcmsr_teardown_intr(device_t dev, struct AdapterControlBlock *acb) 5031{ 5032 int i; 5033 5034 if (acb->acb_flags & ACB_F_MSIX_ENABLED) { 5035 for (i = 0; i < acb->msix_vectors; i++) { 5036 if (acb->ih[i]) 5037 bus_teardown_intr(dev, acb->irqres[i], acb->ih[i]); 5038 if (acb->irqres[i] != NULL) 5039 bus_release_resource(dev, SYS_RES_IRQ, 5040 acb->irq_id[i], acb->irqres[i]); 5041 5042 acb->ih[i] = NULL; 5043 } 5044 pci_release_msi(dev); 5045 } else { 5046 if (acb->ih[0]) 5047 bus_teardown_intr(dev, acb->irqres[0], acb->ih[0]); 5048 if (acb->irqres[0] != NULL) 5049 bus_release_resource(dev, SYS_RES_IRQ, 5050 acb->irq_id[0], acb->irqres[0]); 5051 acb->ih[0] = NULL; 5052 } 5053 5054} 5055/* 5056************************************************************************ 5057************************************************************************ 5058*/ |
|
4528static int arcmsr_detach(device_t dev) 4529{ 4530 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 4531 int i; 4532 4533 callout_stop(&acb->devmap_callout); | 5059static int arcmsr_detach(device_t dev) 5060{ 5061 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 5062 int i; 5063 5064 callout_stop(&acb->devmap_callout); |
4534 bus_teardown_intr(dev, acb->irqres, acb->ih); | 5065 arcmsr_teardown_intr(dev, acb); |
4535 arcmsr_shutdown(dev); 4536 arcmsr_free_resource(acb); 4537 for(i=0; (acb->sys_res_arcmsr[i]!=NULL) && (i<2); i++) { 4538 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(i), acb->sys_res_arcmsr[i]); 4539 } | 5066 arcmsr_shutdown(dev); 5067 arcmsr_free_resource(acb); 5068 for(i=0; (acb->sys_res_arcmsr[i]!=NULL) && (i<2); i++) { 5069 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(i), acb->sys_res_arcmsr[i]); 5070 } |
4540 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); | |
4541 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock); 4542 xpt_async(AC_LOST_DEVICE, acb->ppath, NULL); 4543 xpt_free_path(acb->ppath); 4544 xpt_bus_deregister(cam_sim_path(acb->psim)); 4545 cam_sim_free(acb->psim, TRUE); 4546 ARCMSR_LOCK_RELEASE(&acb->isr_lock); 4547 arcmsr_mutex_destroy(acb); 4548 return (0); --- 14 unchanged lines hidden --- | 5071 ARCMSR_LOCK_ACQUIRE(&acb->isr_lock); 5072 xpt_async(AC_LOST_DEVICE, acb->ppath, NULL); 5073 xpt_free_path(acb->ppath); 5074 xpt_bus_deregister(cam_sim_path(acb->psim)); 5075 cam_sim_free(acb->psim, TRUE); 5076 ARCMSR_LOCK_RELEASE(&acb->isr_lock); 5077 arcmsr_mutex_destroy(acb); 5078 return (0); --- 14 unchanged lines hidden --- |