arcmsr.c (6a068746777241722b2b32c5d0bc443a2a64d80b) arcmsr.c (dac366886ec6752cd98b433dee5e62b8ab7eb49d)
1/*
2*****************************************************************************************
3** O.S : FreeBSD
4** FILE NAME : arcmsr.c
5** BY : Erich Chen, Ching Huang
6** Description: SCSI RAID Device Driver for
7** ARECA (ARC11XX/ARC12XX/ARC13XX/ARC16XX/ARC188x) SATA/SAS RAID HOST Adapter
8** ARCMSR RAID Host adapter

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32** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
34** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35**(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
36** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37**************************************************************************
38** History
39**
1/*
2*****************************************************************************************
3** O.S : FreeBSD
4** FILE NAME : arcmsr.c
5** BY : Erich Chen, Ching Huang
6** Description: SCSI RAID Device Driver for
7** ARECA (ARC11XX/ARC12XX/ARC13XX/ARC16XX/ARC188x) SATA/SAS RAID HOST Adapter
8** ARCMSR RAID Host adapter

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32** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
34** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35**(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
36** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37**************************************************************************
38** History
39**
40** REV# DATE NAME DESCRIPTION
41** 1.00.00.00 03/31/2004 Erich Chen First release
42** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error
43** 1.20.00.03 04/19/2005 Erich Chen add SATA 24 Ports adapter type support
40** REV# DATE NAME DESCRIPTION
41** 1.00.00.00 03/31/2004 Erich Chen First release
42** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error
43** 1.20.00.03 04/19/2005 Erich Chen add SATA 24 Ports adapter type support
44** clean unused function
44** clean unused function
45** 1.20.00.12 09/12/2005 Erich Chen bug fix with abort command handling,
45** 1.20.00.12 09/12/2005 Erich Chen bug fix with abort command handling,
46** firmware version check
47** and firmware update notify for hardware bug fix
48** handling if none zero high part physical address
49** of srb resource
46** firmware version check
47** and firmware update notify for hardware bug fix
48** handling if none zero high part physical address
49** of srb resource
50** 1.20.00.13 08/18/2006 Erich Chen remove pending srb and report busy
50** 1.20.00.13 08/18/2006 Erich Chen remove pending srb and report busy
51** add iop message xfer
52** with scsi pass-through command
53** add new device id of sas raid adapters
54** code fit for SPARC64 & PPC
51** add iop message xfer
52** with scsi pass-through command
53** add new device id of sas raid adapters
54** code fit for SPARC64 & PPC
55** 1.20.00.14 02/05/2007 Erich Chen bug fix for incorrect ccb_h.status report
55** 1.20.00.14 02/05/2007 Erich Chen bug fix for incorrect ccb_h.status report
56** and cause g_vfs_done() read write error
56** and cause g_vfs_done() read write error
57** 1.20.00.15 10/10/2007 Erich Chen support new RAID adapter type ARC120x
58** 1.20.00.16 10/10/2009 Erich Chen Bug fix for RAID adapter type ARC120x
57** 1.20.00.15 10/10/2007 Erich Chen support new RAID adapter type ARC120x
58** 1.20.00.16 10/10/2009 Erich Chen Bug fix for RAID adapter type ARC120x
59** bus_dmamem_alloc() with BUS_DMA_ZERO
59** bus_dmamem_alloc() with BUS_DMA_ZERO
60** 1.20.00.17 07/15/2010 Ching Huang Added support ARC1880
61** report CAM_DEV_NOT_THERE instead of CAM_SEL_TIMEOUT when device failed,
62** prevent cam_periph_error removing all LUN devices of one Target id
63** for any one LUN device failed
64** 1.20.00.18 10/14/2010 Ching Huang Fixed "inquiry data fails comparion at DV1 step"
65** 10/25/2010 Ching Huang Fixed bad range input in bus_alloc_resource for ADAPTER_TYPE_B
66** 1.20.00.19 11/11/2010 Ching Huang Fixed arcmsr driver prevent arcsas support for Areca SAS HBA ARC13x0
67** 1.20.00.20 12/08/2010 Ching Huang Avoid calling atomic_set_int function
68** 1.20.00.21 02/08/2011 Ching Huang Implement I/O request timeout
69** 02/14/2011 Ching Huang Modified pktRequestCount
70** 1.20.00.21 03/03/2011 Ching Huang if a command timeout, then wait its ccb back before free it
71** 1.20.00.22 07/04/2011 Ching Huang Fixed multiple MTX panic
60** 1.20.00.17 07/15/2010 Ching Huang Added support ARC1880
61** report CAM_DEV_NOT_THERE instead of CAM_SEL_TIMEOUT when device failed,
62** prevent cam_periph_error removing all LUN devices of one Target id
63** for any one LUN device failed
64** 1.20.00.18 10/14/2010 Ching Huang Fixed "inquiry data fails comparion at DV1 step"
65** 10/25/2010 Ching Huang Fixed bad range input in bus_alloc_resource for ADAPTER_TYPE_B
66** 1.20.00.19 11/11/2010 Ching Huang Fixed arcmsr driver prevent arcsas support for Areca SAS HBA ARC13x0
67** 1.20.00.20 12/08/2010 Ching Huang Avoid calling atomic_set_int function
68** 1.20.00.21 02/08/2011 Ching Huang Implement I/O request timeout
69** 02/14/2011 Ching Huang Modified pktRequestCount
70** 1.20.00.21 03/03/2011 Ching Huang if a command timeout, then wait its ccb back before free it
71** 1.20.00.22 07/04/2011 Ching Huang Fixed multiple MTX panic
72** 1.20.00.23 10/28/2011 Ching Huang Added TIMEOUT_DELAY in case of too many HDDs need to start
73** 1.20.00.23 11/08/2011 Ching Huang Added report device transfer speed
74** 1.20.00.23 01/30/2012 Ching Huang Fixed Request requeued and Retrying command
75** 1.20.00.24 06/11/2012 Ching Huang Fixed return sense data condition
76** 1.20.00.25 08/17/2012 Ching Huang Fixed hotplug device no function on type A adapter
72******************************************************************************************
73*/
74
75#include <sys/cdefs.h>
76__FBSDID("$FreeBSD$");
77
78#if 0
79#define ARCMSR_DEBUG1 1

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149#endif
150
151#if __FreeBSD_version > 500000
152#define arcmsr_callout_init(a) callout_init(a, /*mpsafe*/1);
153#else
154#define arcmsr_callout_init(a) callout_init(a);
155#endif
156
77******************************************************************************************
78*/
79
80#include <sys/cdefs.h>
81__FBSDID("$FreeBSD$");
82
83#if 0
84#define ARCMSR_DEBUG1 1

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154#endif
155
156#if __FreeBSD_version > 500000
157#define arcmsr_callout_init(a) callout_init(a, /*mpsafe*/1);
158#else
159#define arcmsr_callout_init(a) callout_init(a);
160#endif
161
157#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.22 2011-07-04"
162#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.25 2012-08-17"
158#include <dev/arcmsr/arcmsr.h>
159#define SRB_SIZE ((sizeof(struct CommandControlBlock)+0x1f) & 0xffe0)
160#define ARCMSR_SRBS_POOL_SIZE (SRB_SIZE * ARCMSR_MAX_FREESRB_NUM)
161/*
162**************************************************************************
163**************************************************************************
164*/
165#define CHIP_REG_READ32(s, b, r) bus_space_read_4(acb->btag[b], acb->bhandle[b], offsetof(struct s, r))

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291 struct AdapterControlBlock *acb=dev->si_drv1;
292 #else
293 int unit = dev2unit(dev);
294 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit);
295 #endif
296 if(acb==NULL) {
297 return ENXIO;
298 }
163#include <dev/arcmsr/arcmsr.h>
164#define SRB_SIZE ((sizeof(struct CommandControlBlock)+0x1f) & 0xffe0)
165#define ARCMSR_SRBS_POOL_SIZE (SRB_SIZE * ARCMSR_MAX_FREESRB_NUM)
166/*
167**************************************************************************
168**************************************************************************
169*/
170#define CHIP_REG_READ32(s, b, r) bus_space_read_4(acb->btag[b], acb->bhandle[b], offsetof(struct s, r))

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296 struct AdapterControlBlock *acb=dev->si_drv1;
297 #else
298 int unit = dev2unit(dev);
299 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit);
300 #endif
301 if(acb==NULL) {
302 return ENXIO;
303 }
299 return 0;
304 return (0);
300}
301/*
302**************************************************************************
303**************************************************************************
304*/
305#if __FreeBSD_version < 500005
306 static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc)
307#else

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342 #else
343 int unit = dev2unit(dev);
344 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit);
345 #endif
346
347 if(acb==NULL) {
348 return ENXIO;
349 }
305}
306/*
307**************************************************************************
308**************************************************************************
309*/
310#if __FreeBSD_version < 500005
311 static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc)
312#else

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347 #else
348 int unit = dev2unit(dev);
349 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit);
350 #endif
351
352 if(acb==NULL) {
353 return ENXIO;
354 }
350 return(arcmsr_iop_ioctlcmd(acb, ioctl_cmd, arg));
355 return (arcmsr_iop_ioctlcmd(acb, ioctl_cmd, arg));
351}
352/*
353**********************************************************************
354**********************************************************************
355*/
356static u_int32_t arcmsr_disable_allintr( struct AdapterControlBlock *acb)
357{
358 u_int32_t intmask_org=0;

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373 break;
374 case ACB_ADAPTER_TYPE_C: {
375 /* disable all outbound interrupt */
376 intmask_org=CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_mask) ; /* disable outbound message0 int */
377 CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE);
378 }
379 break;
380 }
356}
357/*
358**********************************************************************
359**********************************************************************
360*/
361static u_int32_t arcmsr_disable_allintr( struct AdapterControlBlock *acb)
362{
363 u_int32_t intmask_org=0;

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378 break;
379 case ACB_ADAPTER_TYPE_C: {
380 /* disable all outbound interrupt */
381 intmask_org=CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_mask) ; /* disable outbound message0 int */
382 CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE);
383 }
384 break;
385 }
381 return(intmask_org);
386 return (intmask_org);
382}
383/*
384**********************************************************************
385**********************************************************************
386*/
387static void arcmsr_enable_allintr( struct AdapterControlBlock *acb, u_int32_t intmask_org)
388{
389 u_int32_t mask;

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406 case ACB_ADAPTER_TYPE_C: {
407 /* enable outbound Post Queue, outbound doorbell Interrupt */
408 mask=~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
409 CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org & mask);
410 acb->outbound_int_enable= ~(intmask_org & mask) & 0x0000000f;
411 }
412 break;
413 }
387}
388/*
389**********************************************************************
390**********************************************************************
391*/
392static void arcmsr_enable_allintr( struct AdapterControlBlock *acb, u_int32_t intmask_org)
393{
394 u_int32_t mask;

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411 case ACB_ADAPTER_TYPE_C: {
412 /* enable outbound Post Queue, outbound doorbell Interrupt */
413 mask=~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
414 CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org & mask);
415 acb->outbound_int_enable= ~(intmask_org & mask) & 0x0000000f;
416 }
417 break;
418 }
414 return;
415}
416/*
417**********************************************************************
418**********************************************************************
419*/
420static u_int8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
421{
422 u_int32_t Index;
423 u_int8_t Retries=0x00;
424
425 do {
426 for(Index=0; Index < 100; Index++) {
427 if(CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
428 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, ARCMSR_MU_OUTBOUND_MESSAGE0_INT);/*clear interrupt*/
429 return TRUE;
430 }
431 UDELAY(10000);
432 }/*max 1 seconds*/
433 }while(Retries++ < 20);/*max 20 sec*/
419}
420/*
421**********************************************************************
422**********************************************************************
423*/
424static u_int8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
425{
426 u_int32_t Index;
427 u_int8_t Retries=0x00;
428
429 do {
430 for(Index=0; Index < 100; Index++) {
431 if(CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
432 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, ARCMSR_MU_OUTBOUND_MESSAGE0_INT);/*clear interrupt*/
433 return TRUE;
434 }
435 UDELAY(10000);
436 }/*max 1 seconds*/
437 }while(Retries++ < 20);/*max 20 sec*/
434 return FALSE;
438 return (FALSE);
435}
436/*
437**********************************************************************
438**********************************************************************
439*/
440static u_int8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
441{
442 u_int32_t Index;

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447 if(CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell) & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
448 CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN);/*clear interrupt*/
449 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT);
450 return TRUE;
451 }
452 UDELAY(10000);
453 }/*max 1 seconds*/
454 }while(Retries++ < 20);/*max 20 sec*/
439}
440/*
441**********************************************************************
442**********************************************************************
443*/
444static u_int8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
445{
446 u_int32_t Index;

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451 if(CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell) & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
452 CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN);/*clear interrupt*/
453 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT);
454 return TRUE;
455 }
456 UDELAY(10000);
457 }/*max 1 seconds*/
458 }while(Retries++ < 20);/*max 20 sec*/
455 return FALSE;
459 return (FALSE);
456}
457/*
458**********************************************************************
459**********************************************************************
460*/
461static u_int8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *acb)
462{
463 u_int32_t Index;
464 u_int8_t Retries=0x00;
465
466 do {
467 for(Index=0; Index < 100; Index++) {
468 if(CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
469 CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR);/*clear interrupt*/
470 return TRUE;
471 }
472 UDELAY(10000);
473 }/*max 1 seconds*/
474 }while(Retries++ < 20);/*max 20 sec*/
460}
461/*
462**********************************************************************
463**********************************************************************
464*/
465static u_int8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *acb)
466{
467 u_int32_t Index;
468 u_int8_t Retries=0x00;
469
470 do {
471 for(Index=0; Index < 100; Index++) {
472 if(CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
473 CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR);/*clear interrupt*/
474 return TRUE;
475 }
476 UDELAY(10000);
477 }/*max 1 seconds*/
478 }while(Retries++ < 20);/*max 20 sec*/
475 return FALSE;
479 return (FALSE);
476}
477/*
478************************************************************************
479************************************************************************
480*/
481static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
482{
483 int retry_count=30;/* enlarge wait flush adapter cache time: 10 minute */
484
485 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE);
486 do {
487 if(arcmsr_hba_wait_msgint_ready(acb)) {
488 break;
489 } else {
490 retry_count--;
491 }
492 }while(retry_count!=0);
480}
481/*
482************************************************************************
483************************************************************************
484*/
485static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
486{
487 int retry_count=30;/* enlarge wait flush adapter cache time: 10 minute */
488
489 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE);
490 do {
491 if(arcmsr_hba_wait_msgint_ready(acb)) {
492 break;
493 } else {
494 retry_count--;
495 }
496 }while(retry_count!=0);
493 return;
494}
495/*
496************************************************************************
497************************************************************************
498*/
499static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
500{
501 int retry_count=30;/* enlarge wait flush adapter cache time: 10 minute */
502
503 CHIP_REG_WRITE32(HBB_DOORBELL,
504 0, drv2iop_doorbell, ARCMSR_MESSAGE_FLUSH_CACHE);
505 do {
506 if(arcmsr_hbb_wait_msgint_ready(acb)) {
507 break;
508 } else {
509 retry_count--;
510 }
511 }while(retry_count!=0);
497}
498/*
499************************************************************************
500************************************************************************
501*/
502static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
503{
504 int retry_count=30;/* enlarge wait flush adapter cache time: 10 minute */
505
506 CHIP_REG_WRITE32(HBB_DOORBELL,
507 0, drv2iop_doorbell, ARCMSR_MESSAGE_FLUSH_CACHE);
508 do {
509 if(arcmsr_hbb_wait_msgint_ready(acb)) {
510 break;
511 } else {
512 retry_count--;
513 }
514 }while(retry_count!=0);
512 return;
513}
514/*
515************************************************************************
516************************************************************************
517*/
518static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *acb)
519{
520 int retry_count=30;/* enlarge wait flush adapter cache time: 10 minute */
521
522 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE);
523 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
524 do {
525 if(arcmsr_hbc_wait_msgint_ready(acb)) {
526 break;
527 } else {
528 retry_count--;
529 }
530 }while(retry_count!=0);
515}
516/*
517************************************************************************
518************************************************************************
519*/
520static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *acb)
521{
522 int retry_count=30;/* enlarge wait flush adapter cache time: 10 minute */
523
524 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE);
525 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
526 do {
527 if(arcmsr_hbc_wait_msgint_ready(acb)) {
528 break;
529 } else {
530 retry_count--;
531 }
532 }while(retry_count!=0);
531 return;
532}
533/*
534************************************************************************
535************************************************************************
536*/
537static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
538{
539 switch (acb->adapter_type) {

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545 arcmsr_flush_hbb_cache(acb);
546 }
547 break;
548 case ACB_ADAPTER_TYPE_C: {
549 arcmsr_flush_hbc_cache(acb);
550 }
551 break;
552 }
533}
534/*
535************************************************************************
536************************************************************************
537*/
538static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
539{
540 switch (acb->adapter_type) {

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546 arcmsr_flush_hbb_cache(acb);
547 }
548 break;
549 case ACB_ADAPTER_TYPE_C: {
550 arcmsr_flush_hbc_cache(acb);
551 }
552 break;
553 }
553 return;
554}
555/*
556*******************************************************************************
557*******************************************************************************
558*/
559static int arcmsr_suspend(device_t dev)
560{
561 struct AdapterControlBlock *acb = device_get_softc(dev);

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591 acb =(struct AdapterControlBlock *) cam_sim_softc(sim);
592 switch (code) {
593 case AC_LOST_DEVICE:
594 target_id=xpt_path_target_id(path);
595 target_lun=xpt_path_lun_id(path);
596 if((target_id > ARCMSR_MAX_TARGETID) || (target_lun > ARCMSR_MAX_TARGETLUN)) {
597 break;
598 }
554}
555/*
556*******************************************************************************
557*******************************************************************************
558*/
559static int arcmsr_suspend(device_t dev)
560{
561 struct AdapterControlBlock *acb = device_get_softc(dev);

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591 acb =(struct AdapterControlBlock *) cam_sim_softc(sim);
592 switch (code) {
593 case AC_LOST_DEVICE:
594 target_id=xpt_path_target_id(path);
595 target_lun=xpt_path_lun_id(path);
596 if((target_id > ARCMSR_MAX_TARGETID) || (target_lun > ARCMSR_MAX_TARGETLUN)) {
597 break;
598 }
599 printf("%s:scsi id=%d lun=%d device lost \n", device_get_name(acb->pci_dev), target_id, target_lun);
599 // printf("%s:scsi id=%d lun=%d device lost \n", device_get_name(acb->pci_dev), target_id, target_lun);
600 break;
601 default:
602 break;
603 }
604}
605/*
606**********************************************************************
607**********************************************************************
608*/
609static void arcmsr_report_sense_info(struct CommandControlBlock *srb)
610{
611 union ccb * pccb=srb->pccb;
612
613 pccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
614 pccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
600 break;
601 default:
602 break;
603 }
604}
605/*
606**********************************************************************
607**********************************************************************
608*/
609static void arcmsr_report_sense_info(struct CommandControlBlock *srb)
610{
611 union ccb * pccb=srb->pccb;
612
613 pccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
614 pccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
615 if(&pccb->csio.sense_data) {
615 if(pccb->csio.sense_len) {
616 memset(&pccb->csio.sense_data, 0, sizeof(pccb->csio.sense_data));
617 memcpy(&pccb->csio.sense_data, srb->arcmsr_cdb.SenseData,
618 get_min(sizeof(struct SENSE_DATA), sizeof(pccb->csio.sense_data)));
619 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); /* Valid,ErrorCode */
620 pccb->ccb_h.status |= CAM_AUTOSNS_VALID;
621 }
616 memset(&pccb->csio.sense_data, 0, sizeof(pccb->csio.sense_data));
617 memcpy(&pccb->csio.sense_data, srb->arcmsr_cdb.SenseData,
618 get_min(sizeof(struct SENSE_DATA), sizeof(pccb->csio.sense_data)));
619 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); /* Valid,ErrorCode */
620 pccb->ccb_h.status |= CAM_AUTOSNS_VALID;
621 }
622 return;
623}
624/*
625*********************************************************************
626*********************************************************************
627*/
628static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
629{
630 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD);
631 if(!arcmsr_hba_wait_msgint_ready(acb)) {
632 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
633 }
622}
623/*
624*********************************************************************
625*********************************************************************
626*/
627static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
628{
629 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD);
630 if(!arcmsr_hba_wait_msgint_ready(acb)) {
631 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
632 }
634 return;
635}
636/*
637*********************************************************************
638*********************************************************************
639*/
640static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
641{
642 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_ABORT_CMD);
643 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
644 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
645 }
633}
634/*
635*********************************************************************
636*********************************************************************
637*/
638static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
639{
640 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_ABORT_CMD);
641 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
642 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
643 }
646 return;
647}
648/*
649*********************************************************************
650*********************************************************************
651*/
652static void arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *acb)
653{
654 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD);
655 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
656 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
657 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
658 }
644}
645/*
646*********************************************************************
647*********************************************************************
648*/
649static void arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *acb)
650{
651 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD);
652 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
653 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
654 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit);
655 }
659 return;
660}
661/*
662*********************************************************************
663*********************************************************************
664*/
665static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
666{
667 switch (acb->adapter_type) {

--- 5 unchanged lines hidden (view full) ---

673 arcmsr_abort_hbb_allcmd(acb);
674 }
675 break;
676 case ACB_ADAPTER_TYPE_C: {
677 arcmsr_abort_hbc_allcmd(acb);
678 }
679 break;
680 }
656}
657/*
658*********************************************************************
659*********************************************************************
660*/
661static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
662{
663 switch (acb->adapter_type) {

--- 5 unchanged lines hidden (view full) ---

669 arcmsr_abort_hbb_allcmd(acb);
670 }
671 break;
672 case ACB_ADAPTER_TYPE_C: {
673 arcmsr_abort_hbc_allcmd(acb);
674 }
675 break;
676 }
681 return;
682}
683/*
684**********************************************************************
685**********************************************************************
686*/
687static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag)
688{
689 struct AdapterControlBlock *acb=srb->acb;

--- 21 unchanged lines hidden (view full) ---

711 }
712 }
713 if(srb->srb_state != ARCMSR_SRB_TIMEOUT)
714 arcmsr_free_srb(srb);
715#ifdef ARCMSR_DEBUG1
716 acb->pktReturnCount++;
717#endif
718 xpt_done(pccb);
677}
678/*
679**********************************************************************
680**********************************************************************
681*/
682static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag)
683{
684 struct AdapterControlBlock *acb=srb->acb;

--- 21 unchanged lines hidden (view full) ---

706 }
707 }
708 if(srb->srb_state != ARCMSR_SRB_TIMEOUT)
709 arcmsr_free_srb(srb);
710#ifdef ARCMSR_DEBUG1
711 acb->pktReturnCount++;
712#endif
713 xpt_done(pccb);
719 return;
720}
721/*
722**************************************************************************
723**************************************************************************
724*/
725static void arcmsr_report_srb_state(struct AdapterControlBlock *acb, struct CommandControlBlock *srb, u_int16_t error)
726{
727 int target, lun;

--- 35 unchanged lines hidden (view full) ---

763 , acb->pci_unit, target, lun ,srb->arcmsr_cdb.DeviceStatus);
764 acb->devstate[target][lun]=ARECA_RAID_GONE;
765 srb->pccb->ccb_h.status |= CAM_UNCOR_PARITY;
766 /*unknow error or crc error just for retry*/
767 arcmsr_srb_complete(srb, 1);
768 break;
769 }
770 }
714}
715/*
716**************************************************************************
717**************************************************************************
718*/
719static void arcmsr_report_srb_state(struct AdapterControlBlock *acb, struct CommandControlBlock *srb, u_int16_t error)
720{
721 int target, lun;

--- 35 unchanged lines hidden (view full) ---

757 , acb->pci_unit, target, lun ,srb->arcmsr_cdb.DeviceStatus);
758 acb->devstate[target][lun]=ARECA_RAID_GONE;
759 srb->pccb->ccb_h.status |= CAM_UNCOR_PARITY;
760 /*unknow error or crc error just for retry*/
761 arcmsr_srb_complete(srb, 1);
762 break;
763 }
764 }
771 return;
772}
773/*
774**************************************************************************
775**************************************************************************
776*/
777static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, u_int32_t flag_srb, u_int16_t error)
778{
779 struct CommandControlBlock *srb;

--- 16 unchanged lines hidden (view full) ---

796 return;
797 }
798 printf("arcmsr%d: return srb has been completed\n"
799 "srb='%p' srb_state=0x%x outstanding srb count=%d \n",
800 acb->pci_unit, srb, srb->srb_state, acb->srboutstandingcount);
801 return;
802 }
803 arcmsr_report_srb_state(acb, srb, error);
765}
766/*
767**************************************************************************
768**************************************************************************
769*/
770static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, u_int32_t flag_srb, u_int16_t error)
771{
772 struct CommandControlBlock *srb;

--- 16 unchanged lines hidden (view full) ---

789 return;
790 }
791 printf("arcmsr%d: return srb has been completed\n"
792 "srb='%p' srb_state=0x%x outstanding srb count=%d \n",
793 acb->pci_unit, srb, srb->srb_state, acb->srboutstandingcount);
794 return;
795 }
796 arcmsr_report_srb_state(acb, srb, error);
804 return;
805}
806/*
807**************************************************************************
808**************************************************************************
809*/
810static void arcmsr_srb_timeout(void* arg)
811{
812 struct CommandControlBlock *srb = (struct CommandControlBlock *)arg;

--- 65 unchanged lines hidden (view full) ---

878 while((CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
879 flag_srb=CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low);
880 error=(flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE;
881 arcmsr_drain_donequeue(acb, flag_srb, error);
882 }
883 }
884 break;
885 }
797}
798/*
799**************************************************************************
800**************************************************************************
801*/
802static void arcmsr_srb_timeout(void* arg)
803{
804 struct CommandControlBlock *srb = (struct CommandControlBlock *)arg;

--- 65 unchanged lines hidden (view full) ---

870 while((CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
871 flag_srb=CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low);
872 error=(flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE;
873 arcmsr_drain_donequeue(acb, flag_srb, error);
874 }
875 }
876 break;
877 }
886 return;
887}
888/*
889****************************************************************************
890****************************************************************************
891*/
892static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
893{
894 struct CommandControlBlock *srb;

--- 23 unchanged lines hidden (view full) ---

918 }
919 acb->srboutstandingcount=0;
920 acb->workingsrb_doneindex=0;
921 acb->workingsrb_startindex=0;
922#ifdef ARCMSR_DEBUG1
923 acb->pktRequestCount = 0;
924 acb->pktReturnCount = 0;
925#endif
878}
879/*
880****************************************************************************
881****************************************************************************
882*/
883static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
884{
885 struct CommandControlBlock *srb;

--- 23 unchanged lines hidden (view full) ---

909 }
910 acb->srboutstandingcount=0;
911 acb->workingsrb_doneindex=0;
912 acb->workingsrb_startindex=0;
913#ifdef ARCMSR_DEBUG1
914 acb->pktRequestCount = 0;
915 acb->pktReturnCount = 0;
916#endif
926 return;
927}
928/*
929**********************************************************************
930**********************************************************************
931*/
932static void arcmsr_build_srb(struct CommandControlBlock *srb,
933 bus_dma_segment_t *dm_segs, u_int32_t nseg)
934{

--- 71 unchanged lines hidden (view full) ---

1006 arcmsr_cdb->DataLength=pcsio->dxfer_len;
1007 if( arccdbsize > 256) {
1008 arcmsr_cdb->Flags|=ARCMSR_CDB_FLAG_SGL_BSIZE;
1009 }
1010 } else {
1011 arcmsr_cdb->DataLength = 0;
1012 }
1013 srb->arc_cdb_size=arccdbsize;
917}
918/*
919**********************************************************************
920**********************************************************************
921*/
922static void arcmsr_build_srb(struct CommandControlBlock *srb,
923 bus_dma_segment_t *dm_segs, u_int32_t nseg)
924{

--- 71 unchanged lines hidden (view full) ---

996 arcmsr_cdb->DataLength=pcsio->dxfer_len;
997 if( arccdbsize > 256) {
998 arcmsr_cdb->Flags|=ARCMSR_CDB_FLAG_SGL_BSIZE;
999 }
1000 } else {
1001 arcmsr_cdb->DataLength = 0;
1002 }
1003 srb->arc_cdb_size=arccdbsize;
1014 return;
1015}
1016/*
1017**************************************************************************
1018**************************************************************************
1019*/
1020static void arcmsr_post_srb(struct AdapterControlBlock *acb, struct CommandControlBlock *srb)
1021{
1022 u_int32_t cdb_shifted_phyaddr=(u_int32_t) srb->cdb_shifted_phyaddr;

--- 44 unchanged lines hidden (view full) ---

1067 }
1068 else
1069 {
1070 CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp);
1071 }
1072 }
1073 break;
1074 }
1004}
1005/*
1006**************************************************************************
1007**************************************************************************
1008*/
1009static void arcmsr_post_srb(struct AdapterControlBlock *acb, struct CommandControlBlock *srb)
1010{
1011 u_int32_t cdb_shifted_phyaddr=(u_int32_t) srb->cdb_shifted_phyaddr;

--- 44 unchanged lines hidden (view full) ---

1056 }
1057 else
1058 {
1059 CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp);
1060 }
1061 }
1062 break;
1063 }
1075 return;
1076}
1077/*
1078************************************************************************
1079************************************************************************
1080*/
1081static struct QBUFFER * arcmsr_get_iop_rqbuffer( struct AdapterControlBlock *acb)
1082{
1083 struct QBUFFER *qbuffer=NULL;

--- 67 unchanged lines hidden (view full) ---

1151 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_READ_OK);
1152 }
1153 break;
1154 case ACB_ADAPTER_TYPE_C: {
1155 /* let IOP know data has been read */
1156 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK);
1157 }
1158 }
1064}
1065/*
1066************************************************************************
1067************************************************************************
1068*/
1069static struct QBUFFER * arcmsr_get_iop_rqbuffer( struct AdapterControlBlock *acb)
1070{
1071 struct QBUFFER *qbuffer=NULL;

--- 67 unchanged lines hidden (view full) ---

1139 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_READ_OK);
1140 }
1141 break;
1142 case ACB_ADAPTER_TYPE_C: {
1143 /* let IOP know data has been read */
1144 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK);
1145 }
1146 }
1159 return;
1160}
1161/*
1162**************************************************************************
1163**************************************************************************
1164*/
1165static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1166{
1167 switch (acb->adapter_type) {

--- 48 unchanged lines hidden (view full) ---

1216 allxfer_len++;
1217 }
1218 pwbuffer->data_len=allxfer_len;
1219 /*
1220 ** push inbound doorbell and wait reply at hwinterrupt routine for next Qbuffer post
1221 */
1222 arcmsr_iop_message_wrote(acb);
1223 }
1147}
1148/*
1149**************************************************************************
1150**************************************************************************
1151*/
1152static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1153{
1154 switch (acb->adapter_type) {

--- 48 unchanged lines hidden (view full) ---

1203 allxfer_len++;
1204 }
1205 pwbuffer->data_len=allxfer_len;
1206 /*
1207 ** push inbound doorbell and wait reply at hwinterrupt routine for next Qbuffer post
1208 */
1209 arcmsr_iop_message_wrote(acb);
1210 }
1224 return;
1225}
1226/*
1227************************************************************************
1228************************************************************************
1229*/
1230static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
1231{
1232 acb->acb_flags &=~ACB_F_MSG_START_BGRB;
1233 CHIP_REG_WRITE32(HBA_MessageUnit,
1234 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB);
1235 if(!arcmsr_hba_wait_msgint_ready(acb)) {
1236 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1237 , acb->pci_unit);
1238 }
1211}
1212/*
1213************************************************************************
1214************************************************************************
1215*/
1216static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
1217{
1218 acb->acb_flags &=~ACB_F_MSG_START_BGRB;
1219 CHIP_REG_WRITE32(HBA_MessageUnit,
1220 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB);
1221 if(!arcmsr_hba_wait_msgint_ready(acb)) {
1222 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1223 , acb->pci_unit);
1224 }
1239 return;
1240}
1241/*
1242************************************************************************
1243************************************************************************
1244*/
1245static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1246{
1247 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1248 CHIP_REG_WRITE32(HBB_DOORBELL,
1249 0, drv2iop_doorbell, ARCMSR_MESSAGE_STOP_BGRB);
1250 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
1251 printf( "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1252 , acb->pci_unit);
1253 }
1225}
1226/*
1227************************************************************************
1228************************************************************************
1229*/
1230static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1231{
1232 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1233 CHIP_REG_WRITE32(HBB_DOORBELL,
1234 0, drv2iop_doorbell, ARCMSR_MESSAGE_STOP_BGRB);
1235 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
1236 printf( "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1237 , acb->pci_unit);
1238 }
1254 return;
1255}
1256/*
1257************************************************************************
1258************************************************************************
1259*/
1260static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *acb)
1261{
1262 acb->acb_flags &=~ACB_F_MSG_START_BGRB;
1263 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB);
1264 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
1265 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
1266 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n", acb->pci_unit);
1267 }
1239}
1240/*
1241************************************************************************
1242************************************************************************
1243*/
1244static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *acb)
1245{
1246 acb->acb_flags &=~ACB_F_MSG_START_BGRB;
1247 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB);
1248 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
1249 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
1250 printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n", acb->pci_unit);
1251 }
1268 return;
1269}
1270/*
1271************************************************************************
1272************************************************************************
1273*/
1274static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1275{
1276 switch (acb->adapter_type) {

--- 5 unchanged lines hidden (view full) ---

1282 arcmsr_stop_hbb_bgrb(acb);
1283 }
1284 break;
1285 case ACB_ADAPTER_TYPE_C: {
1286 arcmsr_stop_hbc_bgrb(acb);
1287 }
1288 break;
1289 }
1252}
1253/*
1254************************************************************************
1255************************************************************************
1256*/
1257static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1258{
1259 switch (acb->adapter_type) {

--- 5 unchanged lines hidden (view full) ---

1265 arcmsr_stop_hbb_bgrb(acb);
1266 }
1267 break;
1268 case ACB_ADAPTER_TYPE_C: {
1269 arcmsr_stop_hbc_bgrb(acb);
1270 }
1271 break;
1272 }
1290 return;
1291}
1292/*
1293************************************************************************
1294************************************************************************
1295*/
1296static void arcmsr_poll(struct cam_sim * psim)
1297{
1298 struct AdapterControlBlock *acb;
1299 int mutex;
1300
1301 acb = (struct AdapterControlBlock *)cam_sim_softc(psim);
1302 mutex = mtx_owned(&acb->qbuffer_lock);
1303 if( mutex == 0 )
1304 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
1305 arcmsr_interrupt(acb);
1306 if( mutex == 0 )
1307 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
1273}
1274/*
1275************************************************************************
1276************************************************************************
1277*/
1278static void arcmsr_poll(struct cam_sim * psim)
1279{
1280 struct AdapterControlBlock *acb;
1281 int mutex;
1282
1283 acb = (struct AdapterControlBlock *)cam_sim_softc(psim);
1284 mutex = mtx_owned(&acb->qbuffer_lock);
1285 if( mutex == 0 )
1286 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock);
1287 arcmsr_interrupt(acb);
1288 if( mutex == 0 )
1289 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
1308 return;
1309}
1310/*
1311**************************************************************************
1312**************************************************************************
1313*/
1314static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1315{
1316 struct QBUFFER *prbuffer;

--- 18 unchanged lines hidden (view full) ---

1335 iop_len--;
1336 }
1337 acb->rqbuf_lastindex=rqbuf_lastindex;
1338 arcmsr_iop_message_read(acb);
1339 /*signature, let IOP know data has been read */
1340 } else {
1341 acb->acb_flags|=ACB_F_IOPDATA_OVERFLOW;
1342 }
1290}
1291/*
1292**************************************************************************
1293**************************************************************************
1294*/
1295static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1296{
1297 struct QBUFFER *prbuffer;

--- 18 unchanged lines hidden (view full) ---

1316 iop_len--;
1317 }
1318 acb->rqbuf_lastindex=rqbuf_lastindex;
1319 arcmsr_iop_message_read(acb);
1320 /*signature, let IOP know data has been read */
1321 } else {
1322 acb->acb_flags|=ACB_F_IOPDATA_OVERFLOW;
1323 }
1343 return;
1344}
1345/*
1346**************************************************************************
1347**************************************************************************
1348*/
1349static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1350{
1351 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READ;

--- 26 unchanged lines hidden (view full) ---

1378 ** push inbound doorbell tell iop driver data write ok
1379 ** and wait reply on next hwinterrupt for next Qbuffer post
1380 */
1381 arcmsr_iop_message_wrote(acb);
1382 }
1383 if(acb->wqbuf_firstindex==acb->wqbuf_lastindex) {
1384 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1385 }
1324}
1325/*
1326**************************************************************************
1327**************************************************************************
1328*/
1329static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1330{
1331 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READ;

--- 26 unchanged lines hidden (view full) ---

1358 ** push inbound doorbell tell iop driver data write ok
1359 ** and wait reply on next hwinterrupt for next Qbuffer post
1360 */
1361 arcmsr_iop_message_wrote(acb);
1362 }
1363 if(acb->wqbuf_firstindex==acb->wqbuf_lastindex) {
1364 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1365 }
1386 return;
1387}
1388
1389static void arcmsr_rescanLun_cb(struct cam_periph *periph, union ccb *ccb)
1390{
1391/*
1392 if (ccb->ccb_h.status != CAM_REQ_CMP)
1393 printf("arcmsr_rescanLun_cb: Rescan Target=%x, lun=%x, failure status=%x\n",ccb->ccb_h.target_id,ccb->ccb_h.target_lun,ccb->ccb_h.status);
1394 else

--- 17 unchanged lines hidden (view full) ---

1412 }
1413/* printf("arcmsr_rescan_lun: Rescan Target=%x, Lun=%x\n", target, lun); */
1414 bzero(ccb, sizeof(union ccb));
1415 xpt_setup_ccb(&ccb->ccb_h, path, 5);
1416 ccb->ccb_h.func_code = XPT_SCAN_LUN;
1417 ccb->ccb_h.cbfcnp = arcmsr_rescanLun_cb;
1418 ccb->crcn.flags = CAM_FLAG_NONE;
1419 xpt_action(ccb);
1366}
1367
1368static void arcmsr_rescanLun_cb(struct cam_periph *periph, union ccb *ccb)
1369{
1370/*
1371 if (ccb->ccb_h.status != CAM_REQ_CMP)
1372 printf("arcmsr_rescanLun_cb: Rescan Target=%x, lun=%x, failure status=%x\n",ccb->ccb_h.target_id,ccb->ccb_h.target_lun,ccb->ccb_h.status);
1373 else

--- 17 unchanged lines hidden (view full) ---

1391 }
1392/* printf("arcmsr_rescan_lun: Rescan Target=%x, Lun=%x\n", target, lun); */
1393 bzero(ccb, sizeof(union ccb));
1394 xpt_setup_ccb(&ccb->ccb_h, path, 5);
1395 ccb->ccb_h.func_code = XPT_SCAN_LUN;
1396 ccb->ccb_h.cbfcnp = arcmsr_rescanLun_cb;
1397 ccb->crcn.flags = CAM_FLAG_NONE;
1398 xpt_action(ccb);
1420 return;
1421}
1422
1423
1424static void arcmsr_abort_dr_ccbs(struct AdapterControlBlock *acb, int target, int lun)
1425{
1426 struct CommandControlBlock *srb;
1427 u_int32_t intmask_org;
1428 int i;

--- 54 unchanged lines hidden (view full) ---

1483 devicemap = offsetof(struct HBC_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
1484 for (target= 0; target < 4; target++)
1485 {
1486 deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap);
1487 devicemap += 4;
1488 }
1489 break;
1490 }
1399}
1400
1401
1402static void arcmsr_abort_dr_ccbs(struct AdapterControlBlock *acb, int target, int lun)
1403{
1404 struct CommandControlBlock *srb;
1405 u_int32_t intmask_org;
1406 int i;

--- 54 unchanged lines hidden (view full) ---

1461 devicemap = offsetof(struct HBC_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
1462 for (target= 0; target < 4; target++)
1463 {
1464 deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap);
1465 devicemap += 4;
1466 }
1467 break;
1468 }
1469
1491 if(acb->acb_flags & ACB_F_BUS_HANG_ON)
1492 {
1493 acb->acb_flags &= ~ACB_F_BUS_HANG_ON;
1494 }
1495 /*
1496 ** adapter posted CONFIG message
1497 ** copy the new map, note if there are differences with the current map
1498 */

--- 88 unchanged lines hidden (view full) ---

1587 CHIP_REG_WRITE32(HBA_MessageUnit,
1588 0, outbound_doorbell, outbound_doorbell); /* clear doorbell interrupt */
1589 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1590 arcmsr_iop2drv_data_wrote_handle(acb);
1591 }
1592 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
1593 arcmsr_iop2drv_data_read_handle(acb);
1594 }
1470 if(acb->acb_flags & ACB_F_BUS_HANG_ON)
1471 {
1472 acb->acb_flags &= ~ACB_F_BUS_HANG_ON;
1473 }
1474 /*
1475 ** adapter posted CONFIG message
1476 ** copy the new map, note if there are differences with the current map
1477 */

--- 88 unchanged lines hidden (view full) ---

1566 CHIP_REG_WRITE32(HBA_MessageUnit,
1567 0, outbound_doorbell, outbound_doorbell); /* clear doorbell interrupt */
1568 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1569 arcmsr_iop2drv_data_wrote_handle(acb);
1570 }
1571 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
1572 arcmsr_iop2drv_data_read_handle(acb);
1573 }
1595 return;
1596}
1597/*
1598**************************************************************************
1599**************************************************************************
1600*/
1601static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *acb)
1602{
1603 u_int32_t outbound_doorbell;

--- 11 unchanged lines hidden (view full) ---

1615 arcmsr_iop2drv_data_wrote_handle(acb);
1616 }
1617 if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
1618 arcmsr_iop2drv_data_read_handle(acb);
1619 }
1620 if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
1621 arcmsr_hbc_message_isr(acb); /* messenger of "driver to iop commands" */
1622 }
1574}
1575/*
1576**************************************************************************
1577**************************************************************************
1578*/
1579static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *acb)
1580{
1581 u_int32_t outbound_doorbell;

--- 11 unchanged lines hidden (view full) ---

1593 arcmsr_iop2drv_data_wrote_handle(acb);
1594 }
1595 if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
1596 arcmsr_iop2drv_data_read_handle(acb);
1597 }
1598 if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
1599 arcmsr_hbc_message_isr(acb); /* messenger of "driver to iop commands" */
1600 }
1623 return;
1624}
1625/*
1626**************************************************************************
1627**************************************************************************
1628*/
1629static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1630{
1631 u_int32_t flag_srb;

--- 7 unchanged lines hidden (view full) ---

1639 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap,
1640 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1641 while((flag_srb=CHIP_REG_READ32(HBA_MessageUnit,
1642 0, outbound_queueport)) != 0xFFFFFFFF) {
1643 /* check if command done with no error*/
1644 error=(flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE;
1645 arcmsr_drain_donequeue(acb, flag_srb, error);
1646 } /*drain reply FIFO*/
1601}
1602/*
1603**************************************************************************
1604**************************************************************************
1605*/
1606static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1607{
1608 u_int32_t flag_srb;

--- 7 unchanged lines hidden (view full) ---

1616 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap,
1617 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1618 while((flag_srb=CHIP_REG_READ32(HBA_MessageUnit,
1619 0, outbound_queueport)) != 0xFFFFFFFF) {
1620 /* check if command done with no error*/
1621 error=(flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE;
1622 arcmsr_drain_donequeue(acb, flag_srb, error);
1623 } /*drain reply FIFO*/
1647 return;
1648}
1649/*
1650**************************************************************************
1651**************************************************************************
1652*/
1653static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1654{
1655 struct HBB_MessageUnit *phbbmu=(struct HBB_MessageUnit *)acb->pmu;

--- 13 unchanged lines hidden (view full) ---

1669 phbbmu->done_qbuffer[index]=0;
1670 index++;
1671 index %= ARCMSR_MAX_HBB_POSTQUEUE; /*if last index number set it to 0 */
1672 phbbmu->doneq_index=index;
1673 /* check if command done with no error*/
1674 error=(flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE;
1675 arcmsr_drain_donequeue(acb, flag_srb, error);
1676 } /*drain reply FIFO*/
1624}
1625/*
1626**************************************************************************
1627**************************************************************************
1628*/
1629static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1630{
1631 struct HBB_MessageUnit *phbbmu=(struct HBB_MessageUnit *)acb->pmu;

--- 13 unchanged lines hidden (view full) ---

1645 phbbmu->done_qbuffer[index]=0;
1646 index++;
1647 index %= ARCMSR_MAX_HBB_POSTQUEUE; /*if last index number set it to 0 */
1648 phbbmu->doneq_index=index;
1649 /* check if command done with no error*/
1650 error=(flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE;
1651 arcmsr_drain_donequeue(acb, flag_srb, error);
1652 } /*drain reply FIFO*/
1677 return;
1678}
1679/*
1680**************************************************************************
1681**************************************************************************
1682*/
1683static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1684{
1685 u_int32_t flag_srb,throttling=0;

--- 13 unchanged lines hidden (view full) ---

1699 error=(flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE;
1700 arcmsr_drain_donequeue(acb, flag_srb, error);
1701 if(throttling==ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1702 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING);
1703 break;
1704 }
1705 throttling++;
1706 } /*drain reply FIFO*/
1653}
1654/*
1655**************************************************************************
1656**************************************************************************
1657*/
1658static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1659{
1660 u_int32_t flag_srb,throttling=0;

--- 13 unchanged lines hidden (view full) ---

1674 error=(flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE;
1675 arcmsr_drain_donequeue(acb, flag_srb, error);
1676 if(throttling==ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1677 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING);
1678 break;
1679 }
1680 throttling++;
1681 } /*drain reply FIFO*/
1707 return;
1708}
1709/*
1710**********************************************************************
1711**********************************************************************
1712*/
1713static void arcmsr_handle_hba_isr( struct AdapterControlBlock *acb)
1714{
1682}
1683/*
1684**********************************************************************
1685**********************************************************************
1686*/
1687static void arcmsr_handle_hba_isr( struct AdapterControlBlock *acb)
1688{
1715 u_int32_t outbound_intstatus;
1689 u_int32_t outbound_intStatus;
1716 /*
1717 *********************************************
1718 ** check outbound intstatus
1719 *********************************************
1720 */
1690 /*
1691 *********************************************
1692 ** check outbound intstatus
1693 *********************************************
1694 */
1721 outbound_intstatus=CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & acb->outbound_int_enable;
1722 if(!outbound_intstatus) {
1695 outbound_intStatus=CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & acb->outbound_int_enable;
1696 if(!outbound_intStatus) {
1723 /*it must be share irq*/
1724 return;
1725 }
1697 /*it must be share irq*/
1698 return;
1699 }
1726 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, outbound_intstatus);/*clear interrupt*/
1700 CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, outbound_intStatus);/*clear interrupt*/
1727 /* MU doorbell interrupts*/
1701 /* MU doorbell interrupts*/
1728 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1702 if(outbound_intStatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1729 arcmsr_hba_doorbell_isr(acb);
1730 }
1731 /* MU post queue interrupts*/
1703 arcmsr_hba_doorbell_isr(acb);
1704 }
1705 /* MU post queue interrupts*/
1732 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
1706 if(outbound_intStatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
1733 arcmsr_hba_postqueue_isr(acb);
1734 }
1707 arcmsr_hba_postqueue_isr(acb);
1708 }
1735 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
1709 if(outbound_intStatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
1736 arcmsr_hba_message_isr(acb);
1737 }
1710 arcmsr_hba_message_isr(acb);
1711 }
1738 return;
1739}
1740/*
1741**********************************************************************
1742**********************************************************************
1743*/
1744static void arcmsr_handle_hbb_isr( struct AdapterControlBlock *acb)
1745{
1746 u_int32_t outbound_doorbell;

--- 19 unchanged lines hidden (view full) ---

1766 }
1767 /* MU post queue interrupts*/
1768 if(outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1769 arcmsr_hbb_postqueue_isr(acb);
1770 }
1771 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
1772 arcmsr_hbb_message_isr(acb);
1773 }
1712}
1713/*
1714**********************************************************************
1715**********************************************************************
1716*/
1717static void arcmsr_handle_hbb_isr( struct AdapterControlBlock *acb)
1718{
1719 u_int32_t outbound_doorbell;

--- 19 unchanged lines hidden (view full) ---

1739 }
1740 /* MU post queue interrupts*/
1741 if(outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1742 arcmsr_hbb_postqueue_isr(acb);
1743 }
1744 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
1745 arcmsr_hbb_message_isr(acb);
1746 }
1774 return;
1775}
1776/*
1777**********************************************************************
1778**********************************************************************
1779*/
1780static void arcmsr_handle_hbc_isr( struct AdapterControlBlock *acb)
1781{
1782 u_int32_t host_interrupt_status;

--- 10 unchanged lines hidden (view full) ---

1793 /* MU doorbell interrupts*/
1794 if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
1795 arcmsr_hbc_doorbell_isr(acb);
1796 }
1797 /* MU post queue interrupts*/
1798 if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
1799 arcmsr_hbc_postqueue_isr(acb);
1800 }
1747}
1748/*
1749**********************************************************************
1750**********************************************************************
1751*/
1752static void arcmsr_handle_hbc_isr( struct AdapterControlBlock *acb)
1753{
1754 u_int32_t host_interrupt_status;

--- 10 unchanged lines hidden (view full) ---

1765 /* MU doorbell interrupts*/
1766 if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
1767 arcmsr_hbc_doorbell_isr(acb);
1768 }
1769 /* MU post queue interrupts*/
1770 if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
1771 arcmsr_hbc_postqueue_isr(acb);
1772 }
1801 return;
1802}
1803/*
1804******************************************************************************
1805******************************************************************************
1806*/
1807static void arcmsr_interrupt(struct AdapterControlBlock *acb)
1808{
1809 switch (acb->adapter_type) {

--- 6 unchanged lines hidden (view full) ---

1816 case ACB_ADAPTER_TYPE_C:
1817 arcmsr_handle_hbc_isr(acb);
1818 break;
1819 default:
1820 printf("arcmsr%d: interrupt service,"
1821 " unknow adapter type =%d\n", acb->pci_unit, acb->adapter_type);
1822 break;
1823 }
1773}
1774/*
1775******************************************************************************
1776******************************************************************************
1777*/
1778static void arcmsr_interrupt(struct AdapterControlBlock *acb)
1779{
1780 switch (acb->adapter_type) {

--- 6 unchanged lines hidden (view full) ---

1787 case ACB_ADAPTER_TYPE_C:
1788 arcmsr_handle_hbc_isr(acb);
1789 break;
1790 default:
1791 printf("arcmsr%d: interrupt service,"
1792 " unknow adapter type =%d\n", acb->pci_unit, acb->adapter_type);
1793 break;
1794 }
1824 return;
1825}
1826/*
1827**********************************************************************
1828**********************************************************************
1829*/
1830static void arcmsr_intr_handler(void *arg)
1831{
1832 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)arg;

--- 6 unchanged lines hidden (view full) ---

1839******************************************************************************
1840******************************************************************************
1841*/
1842static void arcmsr_polling_devmap(void* arg)
1843{
1844 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)arg;
1845 switch (acb->adapter_type) {
1846 case ACB_ADAPTER_TYPE_A:
1795}
1796/*
1797**********************************************************************
1798**********************************************************************
1799*/
1800static void arcmsr_intr_handler(void *arg)
1801{
1802 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)arg;

--- 6 unchanged lines hidden (view full) ---

1809******************************************************************************
1810******************************************************************************
1811*/
1812static void arcmsr_polling_devmap(void* arg)
1813{
1814 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)arg;
1815 switch (acb->adapter_type) {
1816 case ACB_ADAPTER_TYPE_A:
1847 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);
1817 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);
1848 break;
1849
1850 case ACB_ADAPTER_TYPE_B:
1851 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_GET_CONFIG);
1852 break;
1853
1854 case ACB_ADAPTER_TYPE_C:
1855 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);

--- 204 unchanged lines hidden (view full) ---

2060 break;
2061 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
2062 arcmsr_flush_adapter_cache(acb);
2063 retvalue=ARCMSR_MESSAGE_SUCCESS;
2064 }
2065 break;
2066 }
2067 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
1818 break;
1819
1820 case ACB_ADAPTER_TYPE_B:
1821 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_GET_CONFIG);
1822 break;
1823
1824 case ACB_ADAPTER_TYPE_C:
1825 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);

--- 204 unchanged lines hidden (view full) ---

2030 break;
2031 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
2032 arcmsr_flush_adapter_cache(acb);
2033 retvalue=ARCMSR_MESSAGE_SUCCESS;
2034 }
2035 break;
2036 }
2037 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock);
2068 return retvalue;
2038 return (retvalue);
2069}
2070/*
2071**************************************************************************
2072**************************************************************************
2073*/
2074static void arcmsr_free_srb(struct CommandControlBlock *srb)
2075{
2076 struct AdapterControlBlock *acb;

--- 109 unchanged lines hidden (view full) ---

2186 u_int8_t *ptmpuserbuffer=pcmdmessagefld->messagedatabuffer;
2187
2188 user_len = pcmdmessagefld->cmdmessage.Length;
2189 wqbuf_lastindex = acb->wqbuf_lastindex;
2190 wqbuf_firstindex = acb->wqbuf_firstindex;
2191 if (wqbuf_lastindex != wqbuf_firstindex) {
2192 arcmsr_post_ioctldata2iop(acb);
2193 /* has error report sensedata */
2039}
2040/*
2041**************************************************************************
2042**************************************************************************
2043*/
2044static void arcmsr_free_srb(struct CommandControlBlock *srb)
2045{
2046 struct AdapterControlBlock *acb;

--- 109 unchanged lines hidden (view full) ---

2156 u_int8_t *ptmpuserbuffer=pcmdmessagefld->messagedatabuffer;
2157
2158 user_len = pcmdmessagefld->cmdmessage.Length;
2159 wqbuf_lastindex = acb->wqbuf_lastindex;
2160 wqbuf_firstindex = acb->wqbuf_firstindex;
2161 if (wqbuf_lastindex != wqbuf_firstindex) {
2162 arcmsr_post_ioctldata2iop(acb);
2163 /* has error report sensedata */
2194 if(&pccb->csio.sense_data) {
2164 if(pccb->csio.sense_len) {
2195 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70);
2196 /* Valid,ErrorCode */
2197 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05;
2198 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */
2199 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A;
2200 /* AdditionalSenseLength */
2201 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20;
2202 /* AdditionalSenseCode */

--- 13 unchanged lines hidden (view full) ---

2216 }
2217 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2218 acb->acb_flags &=
2219 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
2220 arcmsr_post_ioctldata2iop(acb);
2221 }
2222 } else {
2223 /* has error report sensedata */
2165 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70);
2166 /* Valid,ErrorCode */
2167 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05;
2168 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */
2169 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A;
2170 /* AdditionalSenseLength */
2171 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20;
2172 /* AdditionalSenseCode */

--- 13 unchanged lines hidden (view full) ---

2186 }
2187 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2188 acb->acb_flags &=
2189 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
2190 arcmsr_post_ioctldata2iop(acb);
2191 }
2192 } else {
2193 /* has error report sensedata */
2224 if(&pccb->csio.sense_data) {
2194 if(pccb->csio.sense_len) {
2225 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70);
2226 /* Valid,ErrorCode */
2227 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05;
2228 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */
2229 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A;
2230 /* AdditionalSenseLength */
2231 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20;
2232 /* AdditionalSenseCode */

--- 74 unchanged lines hidden (view full) ---

2307 break;
2308 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
2309 arcmsr_flush_adapter_cache(acb);
2310 break;
2311 default:
2312 retvalue = ARCMSR_MESSAGE_FAIL;
2313 }
2314message_out:
2195 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70);
2196 /* Valid,ErrorCode */
2197 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05;
2198 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */
2199 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A;
2200 /* AdditionalSenseLength */
2201 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20;
2202 /* AdditionalSenseCode */

--- 74 unchanged lines hidden (view full) ---

2277 break;
2278 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
2279 arcmsr_flush_adapter_cache(acb);
2280 break;
2281 default:
2282 retvalue = ARCMSR_MESSAGE_FAIL;
2283 }
2284message_out:
2315 return retvalue;
2285 return (retvalue);
2316}
2317/*
2318*********************************************************************
2319*********************************************************************
2320*/
2321static void arcmsr_execute_srb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
2322{
2323 struct CommandControlBlock *srb=(struct CommandControlBlock *)arg;

--- 46 unchanged lines hidden (view full) ---

2370 }
2371 if((pccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
2372 if(nseg != 0) {
2373 bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap);
2374 }
2375 arcmsr_srb_complete(srb, 0);
2376 return;
2377 }
2286}
2287/*
2288*********************************************************************
2289*********************************************************************
2290*/
2291static void arcmsr_execute_srb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
2292{
2293 struct CommandControlBlock *srb=(struct CommandControlBlock *)arg;

--- 46 unchanged lines hidden (view full) ---

2340 }
2341 if((pccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
2342 if(nseg != 0) {
2343 bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap);
2344 }
2345 arcmsr_srb_complete(srb, 0);
2346 return;
2347 }
2378 if(acb->srboutstandingcount >= ARCMSR_MAX_OUTSTANDING_CMD) {
2348 if(acb->srboutstandingcount > ARCMSR_MAX_OUTSTANDING_CMD) {
2379 xpt_freeze_simq(acb->psim, 1);
2380 pccb->ccb_h.status = CAM_REQUEUE_REQ;
2381 acb->acb_flags |= ACB_F_CAM_DEV_QFRZN;
2382 arcmsr_srb_complete(srb, 0);
2383 return;
2384 }
2385 pccb->ccb_h.status |= CAM_SIM_QUEUED;
2386 arcmsr_build_srb(srb, dm_segs, nseg);
2387 arcmsr_post_srb(acb, srb);
2388 if (pccb->ccb_h.timeout != CAM_TIME_INFINITY)
2389 {
2390 arcmsr_callout_init(&srb->ccb_callout);
2349 xpt_freeze_simq(acb->psim, 1);
2350 pccb->ccb_h.status = CAM_REQUEUE_REQ;
2351 acb->acb_flags |= ACB_F_CAM_DEV_QFRZN;
2352 arcmsr_srb_complete(srb, 0);
2353 return;
2354 }
2355 pccb->ccb_h.status |= CAM_SIM_QUEUED;
2356 arcmsr_build_srb(srb, dm_segs, nseg);
2357 arcmsr_post_srb(acb, srb);
2358 if (pccb->ccb_h.timeout != CAM_TIME_INFINITY)
2359 {
2360 arcmsr_callout_init(&srb->ccb_callout);
2391 callout_reset(&srb->ccb_callout, (pccb->ccb_h.timeout * hz ) / 1000, arcmsr_srb_timeout, srb);
2361 callout_reset(&srb->ccb_callout, ((pccb->ccb_h.timeout + (ARCMSR_TIMEOUT_DELAY * 1000)) * hz) / 1000, arcmsr_srb_timeout, srb);
2392 srb->srb_flags |= SRB_FLAG_TIMER_START;
2393 }
2362 srb->srb_flags |= SRB_FLAG_TIMER_START;
2363 }
2394 return;
2395}
2396/*
2397*****************************************************************************************
2398*****************************************************************************************
2399*/
2400static u_int8_t arcmsr_seek_cmd2abort(union ccb * abortccb)
2401{
2402 struct CommandControlBlock *srb;

--- 47 unchanged lines hidden (view full) ---

2450 acb->acb_flags |=ACB_F_BUS_RESET;
2451 while(acb->srboutstandingcount!=0 && retry < 400) {
2452 arcmsr_interrupt(acb);
2453 UDELAY(25000);
2454 retry++;
2455 }
2456 arcmsr_iop_reset(acb);
2457 acb->acb_flags &= ~ACB_F_BUS_RESET;
2364}
2365/*
2366*****************************************************************************************
2367*****************************************************************************************
2368*/
2369static u_int8_t arcmsr_seek_cmd2abort(union ccb * abortccb)
2370{
2371 struct CommandControlBlock *srb;

--- 47 unchanged lines hidden (view full) ---

2419 acb->acb_flags |=ACB_F_BUS_RESET;
2420 while(acb->srboutstandingcount!=0 && retry < 400) {
2421 arcmsr_interrupt(acb);
2422 UDELAY(25000);
2423 retry++;
2424 }
2425 arcmsr_iop_reset(acb);
2426 acb->acb_flags &= ~ACB_F_BUS_RESET;
2458 return;
2459}
2460/*
2461**************************************************************************
2462**************************************************************************
2463*/
2464static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2465 union ccb * pccb)
2466{

--- 135 unchanged lines hidden (view full) ---

2602 cpi->max_lun=ARCMSR_MAX_TARGETLUN; /* 0-7 */
2603 cpi->initiator_id=ARCMSR_SCSI_INITIATOR_ID; /* 255 */
2604 cpi->bus_id=cam_sim_bus(psim);
2605 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
2606 strncpy(cpi->hba_vid, "ARCMSR", HBA_IDLEN);
2607 strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN);
2608 cpi->unit_number=cam_sim_unit(psim);
2609 #ifdef CAM_NEW_TRAN_CODE
2427}
2428/*
2429**************************************************************************
2430**************************************************************************
2431*/
2432static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2433 union ccb * pccb)
2434{

--- 135 unchanged lines hidden (view full) ---

2570 cpi->max_lun=ARCMSR_MAX_TARGETLUN; /* 0-7 */
2571 cpi->initiator_id=ARCMSR_SCSI_INITIATOR_ID; /* 255 */
2572 cpi->bus_id=cam_sim_bus(psim);
2573 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
2574 strncpy(cpi->hba_vid, "ARCMSR", HBA_IDLEN);
2575 strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN);
2576 cpi->unit_number=cam_sim_unit(psim);
2577 #ifdef CAM_NEW_TRAN_CODE
2610 cpi->transport = XPORT_SPI;
2611 cpi->transport_version = 2;
2578 if(acb->adapter_bus_speed == ACB_BUS_SPEED_6G)
2579 cpi->base_transfer_speed = 600000;
2580 else
2581 cpi->base_transfer_speed = 300000;
2582 if((acb->vendor_device_id == PCIDevVenIDARC1880) ||
2583 (acb->vendor_device_id == PCIDevVenIDARC1680))
2584 {
2585 cpi->transport = XPORT_SAS;
2586 cpi->transport_version = 0;
2587 cpi->protocol_version = SCSI_REV_SPC2;
2588 }
2589 else
2590 {
2591 cpi->transport = XPORT_SPI;
2592 cpi->transport_version = 2;
2593 cpi->protocol_version = SCSI_REV_2;
2594 }
2612 cpi->protocol = PROTO_SCSI;
2595 cpi->protocol = PROTO_SCSI;
2613 cpi->protocol_version = SCSI_REV_2;
2614 #endif
2615 cpi->ccb_h.status |= CAM_REQ_CMP;
2616 xpt_done(pccb);
2617 break;
2618 }
2619 case XPT_ABORT: {
2620 union ccb *pabort_ccb;
2621

--- 47 unchanged lines hidden (view full) ---

2669 xpt_done(pccb);
2670 break;
2671 }
2672 cts= &pccb->cts;
2673 #ifdef CAM_NEW_TRAN_CODE
2674 {
2675 struct ccb_trans_settings_scsi *scsi;
2676 struct ccb_trans_settings_spi *spi;
2596 #endif
2597 cpi->ccb_h.status |= CAM_REQ_CMP;
2598 xpt_done(pccb);
2599 break;
2600 }
2601 case XPT_ABORT: {
2602 union ccb *pabort_ccb;
2603

--- 47 unchanged lines hidden (view full) ---

2651 xpt_done(pccb);
2652 break;
2653 }
2654 cts= &pccb->cts;
2655 #ifdef CAM_NEW_TRAN_CODE
2656 {
2657 struct ccb_trans_settings_scsi *scsi;
2658 struct ccb_trans_settings_spi *spi;
2659 struct ccb_trans_settings_sas *sas;
2677
2678 scsi = &cts->proto_specific.scsi;
2660
2661 scsi = &cts->proto_specific.scsi;
2679 spi = &cts->xport_specific.spi;
2680 cts->protocol = PROTO_SCSI;
2681 cts->protocol_version = SCSI_REV_2;
2682 cts->transport = XPORT_SPI;
2683 cts->transport_version = 2;
2684 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
2685 spi->sync_period=3;
2686 spi->sync_offset=32;
2687 spi->bus_width=MSG_EXT_WDTR_BUS_16_BIT;
2688 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
2662 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
2689 spi->valid = CTS_SPI_VALID_DISC
2690 | CTS_SPI_VALID_SYNC_RATE
2691 | CTS_SPI_VALID_SYNC_OFFSET
2692 | CTS_SPI_VALID_BUS_WIDTH;
2693 scsi->valid = CTS_SCSI_VALID_TQ;
2663 scsi->valid = CTS_SCSI_VALID_TQ;
2664 cts->protocol = PROTO_SCSI;
2665
2666 if((acb->vendor_device_id == PCIDevVenIDARC1880) ||
2667 (acb->vendor_device_id == PCIDevVenIDARC1680))
2668 {
2669 cts->protocol_version = SCSI_REV_SPC2;
2670 cts->transport_version = 0;
2671 cts->transport = XPORT_SAS;
2672 sas = &cts->xport_specific.sas;
2673 sas->valid = CTS_SAS_VALID_SPEED;
2674 if(acb->vendor_device_id == PCIDevVenIDARC1880)
2675 sas->bitrate = 600000;
2676 else if(acb->vendor_device_id == PCIDevVenIDARC1680)
2677 sas->bitrate = 300000;
2678 }
2679 else
2680 {
2681 cts->protocol_version = SCSI_REV_2;
2682 cts->transport_version = 2;
2683 cts->transport = XPORT_SPI;
2684 spi = &cts->xport_specific.spi;
2685 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
2686 spi->sync_period=2;
2687 spi->sync_offset=32;
2688 spi->bus_width=MSG_EXT_WDTR_BUS_16_BIT;
2689 spi->valid = CTS_SPI_VALID_DISC
2690 | CTS_SPI_VALID_SYNC_RATE
2691 | CTS_SPI_VALID_SYNC_OFFSET
2692 | CTS_SPI_VALID_BUS_WIDTH;
2693 }
2694 }
2695 #else
2696 {
2697 cts->flags=(CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB);
2694 }
2695 #else
2696 {
2697 cts->flags=(CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB);
2698 cts->sync_period=3;
2698 cts->sync_period=2;
2699 cts->sync_offset=32;
2700 cts->bus_width=MSG_EXT_WDTR_BUS_16_BIT;
2701 cts->valid=CCB_TRANS_SYNC_RATE_VALID |
2702 CCB_TRANS_SYNC_OFFSET_VALID |
2703 CCB_TRANS_BUS_WIDTH_VALID |
2704 CCB_TRANS_DISC_VALID |
2705 CCB_TRANS_TQ_VALID;
2706 }

--- 47 unchanged lines hidden (view full) ---

2754#endif
2755 xpt_done(pccb);
2756 break;
2757 default:
2758 pccb->ccb_h.status |= CAM_REQ_INVALID;
2759 xpt_done(pccb);
2760 break;
2761 }
2699 cts->sync_offset=32;
2700 cts->bus_width=MSG_EXT_WDTR_BUS_16_BIT;
2701 cts->valid=CCB_TRANS_SYNC_RATE_VALID |
2702 CCB_TRANS_SYNC_OFFSET_VALID |
2703 CCB_TRANS_BUS_WIDTH_VALID |
2704 CCB_TRANS_DISC_VALID |
2705 CCB_TRANS_TQ_VALID;
2706 }

--- 47 unchanged lines hidden (view full) ---

2754#endif
2755 xpt_done(pccb);
2756 break;
2757 default:
2758 pccb->ccb_h.status |= CAM_REQ_INVALID;
2759 xpt_done(pccb);
2760 break;
2761 }
2762 return;
2763}
2764/*
2765**********************************************************************
2766**********************************************************************
2767*/
2768static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2769{
2770 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2771 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB);
2772 if(!arcmsr_hba_wait_msgint_ready(acb)) {
2773 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
2774 }
2762}
2763/*
2764**********************************************************************
2765**********************************************************************
2766*/
2767static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2768{
2769 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2770 CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB);
2771 if(!arcmsr_hba_wait_msgint_ready(acb)) {
2772 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
2773 }
2775 return;
2776}
2777/*
2778**********************************************************************
2779**********************************************************************
2780*/
2781static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2782{
2783 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2784 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_START_BGRB);
2785 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
2786 printf( "arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
2787 }
2774}
2775/*
2776**********************************************************************
2777**********************************************************************
2778*/
2779static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2780{
2781 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2782 CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_START_BGRB);
2783 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
2784 printf( "arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
2785 }
2788 return;
2789}
2790/*
2791**********************************************************************
2792**********************************************************************
2793*/
2794static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *acb)
2795{
2796 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2797 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB);
2798 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
2799 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
2800 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
2801 }
2786}
2787/*
2788**********************************************************************
2789**********************************************************************
2790*/
2791static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *acb)
2792{
2793 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2794 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB);
2795 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE);
2796 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
2797 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit);
2798 }
2802 return;
2803}
2804/*
2805**********************************************************************
2806**********************************************************************
2807*/
2808static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2809{
2810 switch (acb->adapter_type) {
2811 case ACB_ADAPTER_TYPE_A:
2812 arcmsr_start_hba_bgrb(acb);
2813 break;
2814 case ACB_ADAPTER_TYPE_B:
2815 arcmsr_start_hbb_bgrb(acb);
2816 break;
2817 case ACB_ADAPTER_TYPE_C:
2818 arcmsr_start_hbc_bgrb(acb);
2819 break;
2820 }
2799}
2800/*
2801**********************************************************************
2802**********************************************************************
2803*/
2804static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2805{
2806 switch (acb->adapter_type) {
2807 case ACB_ADAPTER_TYPE_A:
2808 arcmsr_start_hba_bgrb(acb);
2809 break;
2810 case ACB_ADAPTER_TYPE_B:
2811 arcmsr_start_hbb_bgrb(acb);
2812 break;
2813 case ACB_ADAPTER_TYPE_C:
2814 arcmsr_start_hbc_bgrb(acb);
2815 break;
2816 }
2821 return;
2822}
2823/*
2824**********************************************************************
2825**
2826**********************************************************************
2827*/
2828static void arcmsr_polling_hba_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
2829{

--- 38 unchanged lines hidden (view full) ---

2868 printf("arcmsr%d: polling get an illegal srb command done srb='%p'"
2869 "srboutstandingcount=%d \n"
2870 , acb->pci_unit
2871 , srb, acb->srboutstandingcount);
2872 continue;
2873 }
2874 arcmsr_report_srb_state(acb, srb, error);
2875 } /*drain reply FIFO*/
2817}
2818/*
2819**********************************************************************
2820**
2821**********************************************************************
2822*/
2823static void arcmsr_polling_hba_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
2824{

--- 38 unchanged lines hidden (view full) ---

2863 printf("arcmsr%d: polling get an illegal srb command done srb='%p'"
2864 "srboutstandingcount=%d \n"
2865 , acb->pci_unit
2866 , srb, acb->srboutstandingcount);
2867 continue;
2868 }
2869 arcmsr_report_srb_state(acb, srb, error);
2870 } /*drain reply FIFO*/
2876 return;
2877}
2878/*
2879**********************************************************************
2880**
2881**********************************************************************
2882*/
2883static void arcmsr_polling_hbb_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
2884{

--- 44 unchanged lines hidden (view full) ---

2929 printf("arcmsr%d: polling get an illegal srb command done srb='%p'"
2930 "srboutstandingcount=%d \n"
2931 , acb->pci_unit
2932 , srb, acb->srboutstandingcount);
2933 continue;
2934 }
2935 arcmsr_report_srb_state(acb, srb, error);
2936 } /*drain reply FIFO*/
2871}
2872/*
2873**********************************************************************
2874**
2875**********************************************************************
2876*/
2877static void arcmsr_polling_hbb_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
2878{

--- 44 unchanged lines hidden (view full) ---

2923 printf("arcmsr%d: polling get an illegal srb command done srb='%p'"
2924 "srboutstandingcount=%d \n"
2925 , acb->pci_unit
2926 , srb, acb->srboutstandingcount);
2927 continue;
2928 }
2929 arcmsr_report_srb_state(acb, srb, error);
2930 } /*drain reply FIFO*/
2937 return;
2938}
2939/*
2940**********************************************************************
2941**
2942**********************************************************************
2943*/
2944static void arcmsr_polling_hbc_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
2945{

--- 34 unchanged lines hidden (view full) ---

2980 continue;
2981 }
2982 printf("arcmsr%d: polling get an illegal srb command done srb='%p'srboutstandingcount=%d \n"
2983 , acb->pci_unit, srb, acb->srboutstandingcount);
2984 continue;
2985 }
2986 arcmsr_report_srb_state(acb, srb, error);
2987 } /*drain reply FIFO*/
2931}
2932/*
2933**********************************************************************
2934**
2935**********************************************************************
2936*/
2937static void arcmsr_polling_hbc_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
2938{

--- 34 unchanged lines hidden (view full) ---

2973 continue;
2974 }
2975 printf("arcmsr%d: polling get an illegal srb command done srb='%p'srboutstandingcount=%d \n"
2976 , acb->pci_unit, srb, acb->srboutstandingcount);
2977 continue;
2978 }
2979 arcmsr_report_srb_state(acb, srb, error);
2980 } /*drain reply FIFO*/
2988 return;
2989}
2990/*
2991**********************************************************************
2992**********************************************************************
2993*/
2994static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
2995{
2996 switch (acb->adapter_type) {

--- 51 unchanged lines hidden (view full) ---

3048 }
3049 printf("ARECA RAID ADAPTER%d: %s \n", acb->pci_unit, ARCMSR_DRIVER_VERSION);
3050 printf("ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", acb->pci_unit, acb->firm_version);
3051 acb->firm_request_len=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/
3052 acb->firm_numbers_queue=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/
3053 acb->firm_sdram_size=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/
3054 acb->firm_ide_channels=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/
3055 acb->firm_cfg_version=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
2981}
2982/*
2983**********************************************************************
2984**********************************************************************
2985*/
2986static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb)
2987{
2988 switch (acb->adapter_type) {

--- 51 unchanged lines hidden (view full) ---

3040 }
3041 printf("ARECA RAID ADAPTER%d: %s \n", acb->pci_unit, ARCMSR_DRIVER_VERSION);
3042 printf("ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", acb->pci_unit, acb->firm_version);
3043 acb->firm_request_len=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/
3044 acb->firm_numbers_queue=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/
3045 acb->firm_sdram_size=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/
3046 acb->firm_ide_channels=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/
3047 acb->firm_cfg_version=CHIP_REG_READ32(HBA_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
3056 return;
3057}
3058/*
3059**********************************************************************
3060**********************************************************************
3061*/
3062static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
3063{
3064 char *acb_firm_model=acb->firm_model;

--- 30 unchanged lines hidden (view full) ---

3095 }
3096 printf("ARECA RAID ADAPTER%d: %s \n", acb->pci_unit, ARCMSR_DRIVER_VERSION);
3097 printf("ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", acb->pci_unit, acb->firm_version);
3098 acb->firm_request_len=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/
3099 acb->firm_numbers_queue=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/
3100 acb->firm_sdram_size=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/
3101 acb->firm_ide_channels=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/
3102 acb->firm_cfg_version=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
3048}
3049/*
3050**********************************************************************
3051**********************************************************************
3052*/
3053static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
3054{
3055 char *acb_firm_model=acb->firm_model;

--- 30 unchanged lines hidden (view full) ---

3086 }
3087 printf("ARECA RAID ADAPTER%d: %s \n", acb->pci_unit, ARCMSR_DRIVER_VERSION);
3088 printf("ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", acb->pci_unit, acb->firm_version);
3089 acb->firm_request_len=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/
3090 acb->firm_numbers_queue=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/
3091 acb->firm_sdram_size=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/
3092 acb->firm_ide_channels=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/
3093 acb->firm_cfg_version=CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
3103 return;
3104}
3105/*
3106**********************************************************************
3107**********************************************************************
3108*/
3109static void arcmsr_get_hbc_config(struct AdapterControlBlock *acb)
3110{
3111 char *acb_firm_model=acb->firm_model;

--- 31 unchanged lines hidden (view full) ---

3143 }
3144 printf("ARECA RAID ADAPTER%d: %s \n", acb->pci_unit, ARCMSR_DRIVER_VERSION);
3145 printf("ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", acb->pci_unit, acb->firm_version);
3146 acb->firm_request_len =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/
3147 acb->firm_numbers_queue =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/
3148 acb->firm_sdram_size =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/
3149 acb->firm_ide_channels =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/
3150 acb->firm_cfg_version =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
3094}
3095/*
3096**********************************************************************
3097**********************************************************************
3098*/
3099static void arcmsr_get_hbc_config(struct AdapterControlBlock *acb)
3100{
3101 char *acb_firm_model=acb->firm_model;

--- 31 unchanged lines hidden (view full) ---

3133 }
3134 printf("ARECA RAID ADAPTER%d: %s \n", acb->pci_unit, ARCMSR_DRIVER_VERSION);
3135 printf("ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", acb->pci_unit, acb->firm_version);
3136 acb->firm_request_len =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/
3137 acb->firm_numbers_queue =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/
3138 acb->firm_sdram_size =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/
3139 acb->firm_ide_channels =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/
3140 acb->firm_cfg_version =CHIP_REG_READ32(HBC_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */
3151 return;
3152}
3153/*
3154**********************************************************************
3155**********************************************************************
3156*/
3157static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3158{
3159 switch (acb->adapter_type) {

--- 5 unchanged lines hidden (view full) ---

3165 arcmsr_get_hbb_config(acb);
3166 }
3167 break;
3168 case ACB_ADAPTER_TYPE_C: {
3169 arcmsr_get_hbc_config(acb);
3170 }
3171 break;
3172 }
3141}
3142/*
3143**********************************************************************
3144**********************************************************************
3145*/
3146static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3147{
3148 switch (acb->adapter_type) {

--- 5 unchanged lines hidden (view full) ---

3154 arcmsr_get_hbb_config(acb);
3155 }
3156 break;
3157 case ACB_ADAPTER_TYPE_C: {
3158 arcmsr_get_hbc_config(acb);
3159 }
3160 break;
3161 }
3173 return;
3174}
3175/*
3176**********************************************************************
3177**********************************************************************
3178*/
3179static void arcmsr_wait_firmware_ready( struct AdapterControlBlock *acb)
3180{
3181 int timeout=0;

--- 32 unchanged lines hidden (view full) ---

3214 printf( "arcmsr%d:timed out waiting for firmware ready\n", acb->pci_unit);
3215 return;
3216 }
3217 UDELAY(15000); /* wait 15 milli-seconds */
3218 }
3219 }
3220 break;
3221 }
3162}
3163/*
3164**********************************************************************
3165**********************************************************************
3166*/
3167static void arcmsr_wait_firmware_ready( struct AdapterControlBlock *acb)
3168{
3169 int timeout=0;

--- 32 unchanged lines hidden (view full) ---

3202 printf( "arcmsr%d:timed out waiting for firmware ready\n", acb->pci_unit);
3203 return;
3204 }
3205 UDELAY(15000); /* wait 15 milli-seconds */
3206 }
3207 }
3208 break;
3209 }
3222 return;
3223}
3224/*
3225**********************************************************************
3226**********************************************************************
3227*/
3228static void arcmsr_clear_doorbell_queue_buffer( struct AdapterControlBlock *acb)
3229{
3230 u_int32_t outbound_doorbell;

--- 17 unchanged lines hidden (view full) ---

3248 /* empty doorbell Qbuffer if door bell ringed */
3249 outbound_doorbell = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell);
3250 CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, outbound_doorbell); /*clear doorbell interrupt */
3251 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK);
3252
3253 }
3254 break;
3255 }
3210}
3211/*
3212**********************************************************************
3213**********************************************************************
3214*/
3215static void arcmsr_clear_doorbell_queue_buffer( struct AdapterControlBlock *acb)
3216{
3217 u_int32_t outbound_doorbell;

--- 17 unchanged lines hidden (view full) ---

3235 /* empty doorbell Qbuffer if door bell ringed */
3236 outbound_doorbell = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell);
3237 CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, outbound_doorbell); /*clear doorbell interrupt */
3238 CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK);
3239
3240 }
3241 break;
3242 }
3256 return;
3257}
3258/*
3259************************************************************************
3260************************************************************************
3261*/
3262static u_int32_t arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3263{
3264 unsigned long srb_phyaddr;

--- 66 unchanged lines hidden (view full) ---

3331 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
3332 printf( "arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit);
3333 return FALSE;
3334 }
3335 }
3336 }
3337 break;
3338 }
3243}
3244/*
3245************************************************************************
3246************************************************************************
3247*/
3248static u_int32_t arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3249{
3250 unsigned long srb_phyaddr;

--- 66 unchanged lines hidden (view full) ---

3317 if(!arcmsr_hbc_wait_msgint_ready(acb)) {
3318 printf( "arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit);
3319 return FALSE;
3320 }
3321 }
3322 }
3323 break;
3324 }
3339 return TRUE;
3325 return (TRUE);
3340}
3341/*
3342************************************************************************
3343************************************************************************
3344*/
3345static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
3346{
3347 switch (acb->adapter_type)

--- 6 unchanged lines hidden (view full) ---

3354 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
3355 printf( "arcmsr%d: 'iop enable eoi mode' timeout \n", acb->pci_unit);
3356
3357 return;
3358 }
3359 }
3360 break;
3361 }
3326}
3327/*
3328************************************************************************
3329************************************************************************
3330*/
3331static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
3332{
3333 switch (acb->adapter_type)

--- 6 unchanged lines hidden (view full) ---

3340 if(!arcmsr_hbb_wait_msgint_ready(acb)) {
3341 printf( "arcmsr%d: 'iop enable eoi mode' timeout \n", acb->pci_unit);
3342
3343 return;
3344 }
3345 }
3346 break;
3347 }
3362 return;
3363}
3364/*
3365**********************************************************************
3366**********************************************************************
3367*/
3368static void arcmsr_iop_init(struct AdapterControlBlock *acb)
3369{
3370 u_int32_t intmask_org;

--- 6 unchanged lines hidden (view full) ---

3377 /*start background rebuild*/
3378 arcmsr_start_adapter_bgrb(acb);
3379 /* empty doorbell Qbuffer if door bell ringed */
3380 arcmsr_clear_doorbell_queue_buffer(acb);
3381 arcmsr_enable_eoi_mode(acb);
3382 /* enable outbound Post Queue, outbound doorbell Interrupt */
3383 arcmsr_enable_allintr(acb, intmask_org);
3384 acb->acb_flags |=ACB_F_IOP_INITED;
3348}
3349/*
3350**********************************************************************
3351**********************************************************************
3352*/
3353static void arcmsr_iop_init(struct AdapterControlBlock *acb)
3354{
3355 u_int32_t intmask_org;

--- 6 unchanged lines hidden (view full) ---

3362 /*start background rebuild*/
3363 arcmsr_start_adapter_bgrb(acb);
3364 /* empty doorbell Qbuffer if door bell ringed */
3365 arcmsr_clear_doorbell_queue_buffer(acb);
3366 arcmsr_enable_eoi_mode(acb);
3367 /* enable outbound Post Queue, outbound doorbell Interrupt */
3368 arcmsr_enable_allintr(acb, intmask_org);
3369 acb->acb_flags |=ACB_F_IOP_INITED;
3385 return;
3386}
3387/*
3388**********************************************************************
3389**********************************************************************
3390*/
3391static void arcmsr_map_free_srb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3392{
3393 struct AdapterControlBlock *acb=arg;

--- 15 unchanged lines hidden (view full) ---

3409 }
3410 srb_tmp->cdb_shifted_phyaddr=(acb->adapter_type==ACB_ADAPTER_TYPE_C)?srb_phyaddr:(srb_phyaddr >> 5);
3411 srb_tmp->acb=acb;
3412 acb->srbworkingQ[i]=acb->psrb_pool[i]=srb_tmp;
3413 srb_phyaddr=srb_phyaddr+SRB_SIZE;
3414 srb_tmp = (struct CommandControlBlock *)((unsigned long)srb_tmp+SRB_SIZE);
3415 }
3416 acb->vir2phy_offset=(unsigned long)srb_tmp-(unsigned long)srb_phyaddr;
3370}
3371/*
3372**********************************************************************
3373**********************************************************************
3374*/
3375static void arcmsr_map_free_srb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3376{
3377 struct AdapterControlBlock *acb=arg;

--- 15 unchanged lines hidden (view full) ---

3393 }
3394 srb_tmp->cdb_shifted_phyaddr=(acb->adapter_type==ACB_ADAPTER_TYPE_C)?srb_phyaddr:(srb_phyaddr >> 5);
3395 srb_tmp->acb=acb;
3396 acb->srbworkingQ[i]=acb->psrb_pool[i]=srb_tmp;
3397 srb_phyaddr=srb_phyaddr+SRB_SIZE;
3398 srb_tmp = (struct CommandControlBlock *)((unsigned long)srb_tmp+SRB_SIZE);
3399 }
3400 acb->vir2phy_offset=(unsigned long)srb_tmp-(unsigned long)srb_phyaddr;
3417 return;
3418}
3419/*
3420************************************************************************
3421**
3422**
3423************************************************************************
3424*/
3425static void arcmsr_free_resource(struct AdapterControlBlock *acb)
3426{
3427 /* remove the control device */
3428 if(acb->ioctl_dev != NULL) {
3429 destroy_dev(acb->ioctl_dev);
3430 }
3431 bus_dmamap_unload(acb->srb_dmat, acb->srb_dmamap);
3432 bus_dmamap_destroy(acb->srb_dmat, acb->srb_dmamap);
3433 bus_dma_tag_destroy(acb->srb_dmat);
3434 bus_dma_tag_destroy(acb->dm_segs_dmat);
3435 bus_dma_tag_destroy(acb->parent_dmat);
3401}
3402/*
3403************************************************************************
3404**
3405**
3406************************************************************************
3407*/
3408static void arcmsr_free_resource(struct AdapterControlBlock *acb)
3409{
3410 /* remove the control device */
3411 if(acb->ioctl_dev != NULL) {
3412 destroy_dev(acb->ioctl_dev);
3413 }
3414 bus_dmamap_unload(acb->srb_dmat, acb->srb_dmamap);
3415 bus_dmamap_destroy(acb->srb_dmat, acb->srb_dmamap);
3416 bus_dma_tag_destroy(acb->srb_dmat);
3417 bus_dma_tag_destroy(acb->dm_segs_dmat);
3418 bus_dma_tag_destroy(acb->parent_dmat);
3436 return;
3437}
3438/*
3439************************************************************************
3440************************************************************************
3441*/
3442static u_int32_t arcmsr_initialize(device_t dev)
3443{
3444 struct AdapterControlBlock *acb=device_get_softc(dev);
3445 u_int16_t pci_command;
3446 int i, j,max_coherent_size;
3419}
3420/*
3421************************************************************************
3422************************************************************************
3423*/
3424static u_int32_t arcmsr_initialize(device_t dev)
3425{
3426 struct AdapterControlBlock *acb=device_get_softc(dev);
3427 u_int16_t pci_command;
3428 int i, j,max_coherent_size;
3447
3448 switch (pci_get_devid(dev)) {
3449 case PCIDevVenIDARC1880: {
3429 u_int32_t vendor_dev_id;
3430
3431 vendor_dev_id = pci_get_devid(dev);
3432 acb->vendor_device_id = vendor_dev_id;
3433 switch (vendor_dev_id) {
3434 case PCIDevVenIDARC1880:
3435 case PCIDevVenIDARC1882:
3436 case PCIDevVenIDARC1213:
3437 case PCIDevVenIDARC1223: {
3450 acb->adapter_type=ACB_ADAPTER_TYPE_C;
3438 acb->adapter_type=ACB_ADAPTER_TYPE_C;
3439 acb->adapter_bus_speed = ACB_BUS_SPEED_6G;
3451 max_coherent_size=ARCMSR_SRBS_POOL_SIZE;
3452 }
3453 break;
3454 case PCIDevVenIDARC1200:
3455 case PCIDevVenIDARC1201: {
3456 acb->adapter_type=ACB_ADAPTER_TYPE_B;
3440 max_coherent_size=ARCMSR_SRBS_POOL_SIZE;
3441 }
3442 break;
3443 case PCIDevVenIDARC1200:
3444 case PCIDevVenIDARC1201: {
3445 acb->adapter_type=ACB_ADAPTER_TYPE_B;
3446 acb->adapter_bus_speed = ACB_BUS_SPEED_3G;
3457 max_coherent_size=ARCMSR_SRBS_POOL_SIZE+(sizeof(struct HBB_MessageUnit));
3458 }
3459 break;
3460 case PCIDevVenIDARC1110:
3461 case PCIDevVenIDARC1120:
3462 case PCIDevVenIDARC1130:
3463 case PCIDevVenIDARC1160:
3464 case PCIDevVenIDARC1170:

--- 7 unchanged lines hidden (view full) ---

3472 case PCIDevVenIDARC1280:
3473 case PCIDevVenIDARC1212:
3474 case PCIDevVenIDARC1222:
3475 case PCIDevVenIDARC1380:
3476 case PCIDevVenIDARC1381:
3477 case PCIDevVenIDARC1680:
3478 case PCIDevVenIDARC1681: {
3479 acb->adapter_type=ACB_ADAPTER_TYPE_A;
3447 max_coherent_size=ARCMSR_SRBS_POOL_SIZE+(sizeof(struct HBB_MessageUnit));
3448 }
3449 break;
3450 case PCIDevVenIDARC1110:
3451 case PCIDevVenIDARC1120:
3452 case PCIDevVenIDARC1130:
3453 case PCIDevVenIDARC1160:
3454 case PCIDevVenIDARC1170:

--- 7 unchanged lines hidden (view full) ---

3462 case PCIDevVenIDARC1280:
3463 case PCIDevVenIDARC1212:
3464 case PCIDevVenIDARC1222:
3465 case PCIDevVenIDARC1380:
3466 case PCIDevVenIDARC1381:
3467 case PCIDevVenIDARC1680:
3468 case PCIDevVenIDARC1681: {
3469 acb->adapter_type=ACB_ADAPTER_TYPE_A;
3470 acb->adapter_bus_speed = ACB_BUS_SPEED_3G;
3480 max_coherent_size=ARCMSR_SRBS_POOL_SIZE;
3481 }
3482 break;
3483 default: {
3484 printf("arcmsr%d:"
3485 " unknown RAID adapter type \n", device_get_unit(dev));
3486 return ENOMEM;
3487 }

--- 311 unchanged lines hidden (view full) ---

3799#if __FreeBSD_version < 503000
3800 acb->ioctl_dev->si_drv1=acb;
3801#endif
3802#if __FreeBSD_version > 500005
3803 (void)make_dev_alias(acb->ioctl_dev, "arc%d", unit);
3804#endif
3805 arcmsr_callout_init(&acb->devmap_callout);
3806 callout_reset(&acb->devmap_callout, 60 * hz, arcmsr_polling_devmap, acb);
3471 max_coherent_size=ARCMSR_SRBS_POOL_SIZE;
3472 }
3473 break;
3474 default: {
3475 printf("arcmsr%d:"
3476 " unknown RAID adapter type \n", device_get_unit(dev));
3477 return ENOMEM;
3478 }

--- 311 unchanged lines hidden (view full) ---

3790#if __FreeBSD_version < 503000
3791 acb->ioctl_dev->si_drv1=acb;
3792#endif
3793#if __FreeBSD_version > 500005
3794 (void)make_dev_alias(acb->ioctl_dev, "arc%d", unit);
3795#endif
3796 arcmsr_callout_init(&acb->devmap_callout);
3797 callout_reset(&acb->devmap_callout, 60 * hz, arcmsr_polling_devmap, acb);
3807 return 0;
3798 return (0);
3808}
3809
3810/*
3811************************************************************************
3812************************************************************************
3813*/
3814static int arcmsr_probe(device_t dev)
3815{

--- 30 unchanged lines hidden (view full) ---

3846 case PCIDevVenIDARC1222:
3847 case PCIDevVenIDARC1380:
3848 case PCIDevVenIDARC1381:
3849 case PCIDevVenIDARC1680:
3850 case PCIDevVenIDARC1681:
3851 type = "SAS 3G";
3852 break;
3853 case PCIDevVenIDARC1880:
3799}
3800
3801/*
3802************************************************************************
3803************************************************************************
3804*/
3805static int arcmsr_probe(device_t dev)
3806{

--- 30 unchanged lines hidden (view full) ---

3837 case PCIDevVenIDARC1222:
3838 case PCIDevVenIDARC1380:
3839 case PCIDevVenIDARC1381:
3840 case PCIDevVenIDARC1680:
3841 case PCIDevVenIDARC1681:
3842 type = "SAS 3G";
3843 break;
3844 case PCIDevVenIDARC1880:
3845 case PCIDevVenIDARC1882:
3846 case PCIDevVenIDARC1213:
3847 case PCIDevVenIDARC1223:
3854 type = "SAS 6G";
3855 break;
3856 default:
3857 type = x_type;
3858 break;
3859 }
3860 if(type == x_type)
3861 return(ENXIO);

--- 87 unchanged lines hidden ---
3848 type = "SAS 6G";
3849 break;
3850 default:
3851 type = x_type;
3852 break;
3853 }
3854 if(type == x_type)
3855 return(ENXIO);

--- 87 unchanged lines hidden ---