ti_i2c.c (5c9ef378541ddaf6c7606a454ba992c610c09dd0) ti_i2c.c (844aff82a6599a8d96545dfb89663809e71719fc)
1/*-
2 * Copyright (c) 2011 Ben Gray <ben.r.gray@gmail.com>.
3 * Copyright (c) 2014 Luiz Otavio O Souza <loos@freebsd.org>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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97 int sc_fifo_trsh;
98
99 uint16_t sc_con_reg;
100 uint16_t sc_rev;
101};
102
103struct ti_i2c_clock_config
104{
1/*-
2 * Copyright (c) 2011 Ben Gray <ben.r.gray@gmail.com>.
3 * Copyright (c) 2014 Luiz Otavio O Souza <loos@freebsd.org>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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97 int sc_fifo_trsh;
98
99 uint16_t sc_con_reg;
100 uint16_t sc_rev;
101};
102
103struct ti_i2c_clock_config
104{
105 int speed;
106 int bitrate;
105 u_int frequency; /* Bus frequency in Hz */
107 uint8_t psc; /* Fast/Standard mode prescale divider */
108 uint8_t scll; /* Fast/Standard mode SCL low time */
109 uint8_t sclh; /* Fast/Standard mode SCL high time */
110 uint8_t hsscll; /* High Speed mode SCL low time */
111 uint8_t hssclh; /* High Speed mode SCL high time */
112};
113
114#if defined(SOC_OMAP4)
115static struct ti_i2c_clock_config ti_omap4_i2c_clock_configs[] = {
106 uint8_t psc; /* Fast/Standard mode prescale divider */
107 uint8_t scll; /* Fast/Standard mode SCL low time */
108 uint8_t sclh; /* Fast/Standard mode SCL high time */
109 uint8_t hsscll; /* High Speed mode SCL low time */
110 uint8_t hssclh; /* High Speed mode SCL high time */
111};
112
113#if defined(SOC_OMAP4)
114static struct ti_i2c_clock_config ti_omap4_i2c_clock_configs[] = {
116 { IIC_UNKNOWN, 100000, 23, 13, 15, 0, 0},
117 { IIC_SLOW, 100000, 23, 13, 15, 0, 0},
118 { IIC_FAST, 400000, 9, 5, 7, 0, 0},
119 { IIC_FASTEST, 1000000, 5, 3, 4, 0, 0},
120 /* { IIC_FASTEST, 3200000, 1, 113, 115, 7, 10}, - HS mode */
121 { -1, 0 }
115 { 100000, 23, 13, 15, 0, 0},
116 { 400000, 9, 5, 7, 0, 0},
117 { 1000000, 5, 3, 4, 0, 0},
118/* { 3200000, 1, 113, 115, 7, 10}, - HS mode */
119 { 0 /* Table terminator */ }
122};
123#endif
124
125#if defined(SOC_TI_AM335X)
126/*
127 * AM335X doesn't support HS mode. For 100kHz I2C clock set the internal
128 * clock to 12Mhz, for 400kHz I2C clock set the internal clock to 24Mhz.
129 */
130static struct ti_i2c_clock_config ti_am335x_i2c_clock_configs[] = {
120};
121#endif
122
123#if defined(SOC_TI_AM335X)
124/*
125 * AM335X doesn't support HS mode. For 100kHz I2C clock set the internal
126 * clock to 12Mhz, for 400kHz I2C clock set the internal clock to 24Mhz.
127 */
128static struct ti_i2c_clock_config ti_am335x_i2c_clock_configs[] = {
131 { IIC_UNKNOWN, 100000, 7, 59, 61, 0, 0},
132 { IIC_SLOW, 100000, 7, 59, 61, 0, 0},
133 { IIC_FAST, 400000, 3, 23, 25, 0, 0},
134 { IIC_FASTEST, 400000, 3, 23, 25, 0, 0},
135 { -1, 0 }
129 { 100000, 7, 59, 61, 0, 0},
130 { 400000, 3, 23, 25, 0, 0},
131 { 0 /* Table terminator */ }
136};
137#endif
138
139/**
140 * Locking macros used throughout the driver
141 */
142#define TI_I2C_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
143#define TI_I2C_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)

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503 return (error);
504}
505
506static int
507ti_i2c_reset(struct ti_i2c_softc *sc, u_char speed)
508{
509 int timeout;
510 struct ti_i2c_clock_config *clkcfg;
132};
133#endif
134
135/**
136 * Locking macros used throughout the driver
137 */
138#define TI_I2C_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
139#define TI_I2C_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)

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499 return (error);
500}
501
502static int
503ti_i2c_reset(struct ti_i2c_softc *sc, u_char speed)
504{
505 int timeout;
506 struct ti_i2c_clock_config *clkcfg;
507 u_int busfreq;
511 uint16_t fifo_trsh, reg, scll, sclh;
512
513 switch (ti_chip()) {
514#ifdef SOC_OMAP4
515 case CHIP_OMAP_4:
516 clkcfg = ti_omap4_i2c_clock_configs;
517 break;
518#endif
519#ifdef SOC_TI_AM335X
520 case CHIP_AM335X:
521 clkcfg = ti_am335x_i2c_clock_configs;
522 break;
523#endif
524 default:
525 panic("Unknown Ti SoC, unable to reset the i2c");
526 }
508 uint16_t fifo_trsh, reg, scll, sclh;
509
510 switch (ti_chip()) {
511#ifdef SOC_OMAP4
512 case CHIP_OMAP_4:
513 clkcfg = ti_omap4_i2c_clock_configs;
514 break;
515#endif
516#ifdef SOC_TI_AM335X
517 case CHIP_AM335X:
518 clkcfg = ti_am335x_i2c_clock_configs;
519 break;
520#endif
521 default:
522 panic("Unknown Ti SoC, unable to reset the i2c");
523 }
527 while (clkcfg->speed != -1) {
528 if (clkcfg->speed == speed)
524
525 /*
526 * If we haven't attached the bus yet, just init at the default slow
527 * speed. This lets us get the hardware initialized enough to attach
528 * the bus which is where the real speed configuration is handled. After
529 * the bus is attached, get the configured speed from it. Search the
530 * configuration table for the best speed we can do that doesn't exceed
531 * the requested speed.
532 */
533 if (sc->sc_iicbus == NULL)
534 busfreq = 100000;
535 else
536 busfreq = IICBUS_GET_FREQUENCY(sc->sc_iicbus, speed);
537 for (;;) {
538 if (clkcfg[1].frequency == 0 || clkcfg[1].frequency > busfreq)
529 break;
530 clkcfg++;
531 }
539 break;
540 clkcfg++;
541 }
532 if (clkcfg->speed == -1)
533 return (EINVAL);
534
535 /*
536 * 23.1.4.3 - HS I2C Software Reset
537 * From OMAP4 TRM at page 4068.
538 *
539 * 1. Ensure that the module is disabled.
540 */
541 sc->sc_con_reg = 0;

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543 /*
544 * 23.1.4.3 - HS I2C Software Reset
545 * From OMAP4 TRM at page 4068.
546 *
547 * 1. Ensure that the module is disabled.
548 */
549 sc->sc_con_reg = 0;

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