mvvar.h (d6c180505a1ad3c92704a745e10ca6ef3a422488) mvvar.h (16694521fe80f54bf8f37334fe9a54bc5c953a6a)
1/*-
2 * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
3 * All rights reserved.
4 *
5 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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36 *
37 * $FreeBSD$
38 */
39
40#ifndef _MVVAR_H_
41#define _MVVAR_H_
42
43#include <sys/rman.h>
1/*-
2 * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
3 * All rights reserved.
4 *
5 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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36 *
37 * $FreeBSD$
38 */
39
40#ifndef _MVVAR_H_
41#define _MVVAR_H_
42
43#include <sys/rman.h>
44#include <machine/bus.h>
44#include <vm/vm.h>
45#include <vm/pmap.h>
46#include <machine/pmap.h>
47#include <machine/vm.h>
48
49#define MV_TYPE_PCI 0
50#define MV_TYPE_PCIE 1
51
45#include <vm/vm.h>
46#include <vm/pmap.h>
47#include <machine/pmap.h>
48#include <machine/vm.h>
49
50#define MV_TYPE_PCI 0
51#define MV_TYPE_PCIE 1
52
53#define MV_MODE_ENDPOINT 0
54#define MV_MODE_ROOT 1
55
52struct gpio_config {
53 int gc_gpio; /* GPIO number */
54 uint32_t gc_flags; /* GPIO flags */
55 int gc_output; /* GPIO output value */
56};
57
58struct decode_win {
59 int target; /* Mbus unit ID */
60 int attr; /* Attributes of the target interface */
61 vm_paddr_t base; /* Physical base addr */
62 uint32_t size;
56struct gpio_config {
57 int gc_gpio; /* GPIO number */
58 uint32_t gc_flags; /* GPIO flags */
59 int gc_output; /* GPIO output value */
60};
61
62struct decode_win {
63 int target; /* Mbus unit ID */
64 int attr; /* Attributes of the target interface */
65 vm_paddr_t base; /* Physical base addr */
66 uint32_t size;
63 int remap;
67 vm_paddr_t remap;
64};
65
66extern const struct pmap_devmap pmap_devmap[];
67extern const struct gpio_config mv_gpio_config[];
68};
69
70extern const struct pmap_devmap pmap_devmap[];
71extern const struct gpio_config mv_gpio_config[];
72extern const struct decode_win *cpu_wins;
68extern const struct decode_win *idma_wins;
69extern const struct decode_win *xor_wins;
70extern int idma_wins_no;
71extern int xor_wins_no;
72
73/* Function prototypes */
74int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
75 void (*hand)(void *), void *arg, int pin, int flags, void **cookiep);

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81
82int soc_decode_win(void);
83void soc_id(uint32_t *dev, uint32_t *rev);
84void soc_dump_decode_win(void);
85uint32_t soc_power_ctrl_get(uint32_t mask);
86void soc_power_ctrl_set(uint32_t mask);
87
88int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
73extern const struct decode_win *idma_wins;
74extern const struct decode_win *xor_wins;
75extern int idma_wins_no;
76extern int xor_wins_no;
77
78/* Function prototypes */
79int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
80 void (*hand)(void *), void *arg, int pin, int flags, void **cookiep);

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86
87int soc_decode_win(void);
88void soc_id(uint32_t *dev, uint32_t *rev);
89void soc_dump_decode_win(void);
90uint32_t soc_power_ctrl_get(uint32_t mask);
91void soc_power_ctrl_set(uint32_t mask);
92
93int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
89 int remap);
94 vm_paddr_t remap);
90int decode_win_overlap(int, int, const struct decode_win *);
91int win_cpu_can_remap(int);
95int decode_win_overlap(int, int, const struct decode_win *);
96int win_cpu_can_remap(int);
97void decode_win_pcie_setup(u_long);
92
93int ddr_is_active(int i);
94uint32_t ddr_base(int i);
95uint32_t ddr_size(int i);
96uint32_t ddr_attr(int i);
97uint32_t ddr_target(int i);
98
99uint32_t cpu_extra_feat(void);
100uint32_t get_tclk(void);
98
99int ddr_is_active(int i);
100uint32_t ddr_base(int i);
101uint32_t ddr_size(int i);
102uint32_t ddr_attr(int i);
103uint32_t ddr_target(int i);
104
105uint32_t cpu_extra_feat(void);
106uint32_t get_tclk(void);
107uint32_t get_l2clk(void);
101uint32_t read_cpu_ctrl(uint32_t);
102void write_cpu_ctrl(uint32_t, uint32_t);
103
108uint32_t read_cpu_ctrl(uint32_t);
109void write_cpu_ctrl(uint32_t, uint32_t);
110
111int mv_pcib_bar_win_set(device_t dev, uint32_t base, uint32_t size,
112 uint32_t remap, int winno, int busno);
113int mv_pcib_cpu_win_remap(device_t dev, uint32_t remap, uint32_t size);
114
115void mv_mask_endpoint_irq(uintptr_t nb, int unit);
116void mv_unmask_endpoint_irq(uintptr_t nb, int unit);
117
118int mv_drbl_get_next_irq(int dir, int unit);
119void mv_drbl_mask_all(int unit);
120void mv_drbl_mask_irq(uint32_t irq, int dir, int unit);
121void mv_drbl_unmask_irq(uint32_t irq, int dir, int unit);
122void mv_drbl_set_mask(uint32_t val, int dir, int unit);
123uint32_t mv_drbl_get_mask(int dir, int unit);
124void mv_drbl_set_cause(uint32_t val, int dir, int unit);
125uint32_t mv_drbl_get_cause(int dir, int unit);
126void mv_drbl_set_msg(uint32_t val, int mnr, int dir, int unit);
127uint32_t mv_drbl_get_msg(int mnr, int dir, int unit);
128
104#endif /* _MVVAR_H_ */
129#endif /* _MVVAR_H_ */