pcb.h (6cec9cad762b6476313fb1f8e931a1647822db6b) pcb.h (c4c27bc97fe4b9157a754f0aa00d43b4bcef2b23)
1/* $NetBSD: pcb.h,v 1.10 2003/10/13 21:46:39 scw Exp $ */
2
3/*-
4 * Copyright (c) 2001 Matt Thomas <matt@3am-software.com>.
5 * Copyright (c) 1994 Mark Brinicombe.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

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34 *
35 * $FreeBSD$
36 */
37
38#ifndef _MACHINE_PCB_H_
39#define _MACHINE_PCB_H_
40
41#include <machine/fp.h>
1/* $NetBSD: pcb.h,v 1.10 2003/10/13 21:46:39 scw Exp $ */
2
3/*-
4 * Copyright (c) 2001 Matt Thomas <matt@3am-software.com>.
5 * Copyright (c) 1994 Mark Brinicombe.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

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34 *
35 * $FreeBSD$
36 */
37
38#ifndef _MACHINE_PCB_H_
39#define _MACHINE_PCB_H_
40
41#include <machine/fp.h>
42#include <machine/frame.h>
42
43
43
44
44struct trapframe;
45
46struct pcb_arm32 {
47 vm_offset_t pcb32_pagedir; /* PT hooks */
48 uint32_t *pcb32_pl1vec; /* PTR to vector_base L1 entry*/
49 uint32_t pcb32_l1vec; /* Value to stuff on ctx sw */
50 u_int pcb32_dacr; /* Domain Access Control Reg */
51 /*
52 * WARNING!
53 * cpuswitch.S relies on pcb32_r8 being quad-aligned in struct pcb
54 * (due to the use of "strd" when compiled for XSCALE)
55 */
56 u_int pcb32_r8; /* used */
57 u_int pcb32_r9; /* used */
58 u_int pcb32_r10; /* used */
59 u_int pcb32_r11; /* used */
60 u_int pcb32_r12; /* used */
61 u_int pcb32_sp; /* used */
62 u_int pcb32_lr;
63 u_int pcb32_pc;
64};
65#define pcb_pagedir un_32.pcb32_pagedir
66#define pcb_pl1vec un_32.pcb32_pl1vec
67#define pcb_l1vec un_32.pcb32_l1vec
68#define pcb_dacr un_32.pcb32_dacr
69#define pcb_cstate un_32.pcb32_cstate
70
71/*
72 * WARNING!
45/*
46 * WARNING!
73 * See warning for struct pcb_arm32, above, before changing struct pcb!
47 * Keep pcb_regs first for faster access in switch.S
74 */
75struct pcb {
48 */
49struct pcb {
50 struct switchframe pcb_regs; /* CPU state */
76 u_int pcb_flags;
77#define PCB_OWNFPU 0x00000001
78#define PCB_NOALIGNFLT 0x00000002
79 caddr_t pcb_onfault; /* On fault handler */
51 u_int pcb_flags;
52#define PCB_OWNFPU 0x00000001
53#define PCB_NOALIGNFLT 0x00000002
54 caddr_t pcb_onfault; /* On fault handler */
80 struct pcb_arm32 un_32;
55 vm_offset_t pcb_pagedir; /* PT hooks */
56 uint32_t *pcb_pl1vec; /* PTR to vector_base L1 entry*/
57 uint32_t pcb_l1vec; /* Value to stuff on ctx sw */
58 u_int pcb_dacr; /* Domain Access Control Reg */
59
81 struct vfp_state pcb_vfpstate; /* VP/NEON state */
82 u_int pcb_vfpcpu; /* VP/NEON last cpu */
83} __aligned(8); /*
84 * We need the PCB to be aligned on 8 bytes, as we may
60 struct vfp_state pcb_vfpstate; /* VP/NEON state */
61 u_int pcb_vfpcpu; /* VP/NEON last cpu */
62} __aligned(8); /*
63 * We need the PCB to be aligned on 8 bytes, as we may
85 * access it using ldrd/strd, and some CPUs require it
64 * access it using ldrd/strd, and ARM ABI require it
86 * to by aligned on 8 bytes.
87 */
88
89/*
90 * No additional data for core dumps.
91 */
92struct md_coredump {
93 int md_empty;
94};
95
96void makectx(struct trapframe *tf, struct pcb *pcb);
97
98#ifdef _KERNEL
99
100void savectx(struct pcb *) __returns_twice;
101#endif /* _KERNEL */
102
103#endif /* !_MACHINE_PCB_H_ */
65 * to by aligned on 8 bytes.
66 */
67
68/*
69 * No additional data for core dumps.
70 */
71struct md_coredump {
72 int md_empty;
73};
74
75void makectx(struct trapframe *tf, struct pcb *pcb);
76
77#ifdef _KERNEL
78
79void savectx(struct pcb *) __returns_twice;
80#endif /* _KERNEL */
81
82#endif /* !_MACHINE_PCB_H_ */