| aw_mmc.h (b091392eb8ab257f5d005357eee1aaea99de6c30) | aw_mmc.h (ffdb1aa8546c5544a02163f9d91f9cf8439931f9) |
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| 1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org> 5 * Copyright (c) 2013 Alexander Fedorov <alexander.fedorov@rtlservice.com> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 68 unchanged lines hidden (view full) --- 77#define AW_MMC_GCTL_CD_DBC_ENB (1U << 8) 78#define AW_MMC_GCTL_DDR_MOD_SEL (1U << 10) 79#define AW_MMC_GCTL_WAIT_MEM_ACCESS (1U << 30) 80#define AW_MMC_GCTL_FIFO_AC_MOD (1U << 31) 81#define AW_MMC_GCTL_RESET \ 82 (AW_MMC_GCTL_SOFT_RST | AW_MMC_GCTL_FIFO_RST | AW_MMC_GCTL_DMA_RST) 83 84/* AW_MMC_CKCR */ | 1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org> 5 * Copyright (c) 2013 Alexander Fedorov <alexander.fedorov@rtlservice.com> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 68 unchanged lines hidden (view full) --- 77#define AW_MMC_GCTL_CD_DBC_ENB (1U << 8) 78#define AW_MMC_GCTL_DDR_MOD_SEL (1U << 10) 79#define AW_MMC_GCTL_WAIT_MEM_ACCESS (1U << 30) 80#define AW_MMC_GCTL_FIFO_AC_MOD (1U << 31) 81#define AW_MMC_GCTL_RESET \ 82 (AW_MMC_GCTL_SOFT_RST | AW_MMC_GCTL_FIFO_RST | AW_MMC_GCTL_DMA_RST) 83 84/* AW_MMC_CKCR */ |
| 85#define AW_MMC_CKCR_CCLK_ENB (1U << 16) 86#define AW_MMC_CKCR_CCLK_CTRL (1U << 17) 87#define AW_MMC_CKCR_CCLK_MASK_DATA0 (1U << 31) 88#define AW_MMC_CKCR_CCLK_DIV 0xff | 85#define AW_MMC_CKCR_DIV 0xff 86#define AW_MMC_CKCR_ENB (1U << 16) 87#define AW_MMC_CKCR_LOW_POWER (1U << 17) 88#define AW_MMC_CKCR_MASK_DATA0 (1U << 31) |
| 89 90/* AW_MMC_TMOR */ 91#define AW_MMC_TMOR_RTO_LMT_SHIFT(x) x /* Response timeout limit */ 92#define AW_MMC_TMOR_RTO_LMT_MASK 0xff 93#define AW_MMC_TMOR_DTO_LMT_SHIFT(x) (x << 8) /* Data timeout limit */ 94#define AW_MMC_TMOR_DTO_LMT_MASK 0xffffff 95 96/* AW_MMC_BWDR */ --- 132 unchanged lines hidden --- | 89 90/* AW_MMC_TMOR */ 91#define AW_MMC_TMOR_RTO_LMT_SHIFT(x) x /* Response timeout limit */ 92#define AW_MMC_TMOR_RTO_LMT_MASK 0xff 93#define AW_MMC_TMOR_DTO_LMT_SHIFT(x) (x << 8) /* Data timeout limit */ 94#define AW_MMC_TMOR_DTO_LMT_MASK 0xffffff 95 96/* AW_MMC_BWDR */ --- 132 unchanged lines hidden --- |