vmcs.c (bd8572e0bea40093c0be13d9544328644cbc7376) vmcs.c (b01c2033255e5b9ca1981311d44d6955760cd7bc)
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 28 unchanged lines hidden (view full) ---

37
38#include <vm/vm.h>
39#include <vm/pmap.h>
40
41#include <machine/segments.h>
42#include <machine/pmap.h>
43
44#include <machine/vmm.h>
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 28 unchanged lines hidden (view full) ---

37
38#include <vm/vm.h>
39#include <vm/pmap.h>
40
41#include <machine/segments.h>
42#include <machine/pmap.h>
43
44#include <machine/vmm.h>
45#include "vmm_host.h"
45#include "vmcs.h"
46#include "vmx_cpufunc.h"
47#include "ept.h"
48#include "vmx.h"
49
50#ifdef DDB
51#include <ddb/ddb.h>
52#endif

--- 256 unchanged lines hidden (view full) ---

309vmcs_set_defaults(struct vmcs *vmcs,
310 u_long host_rip, u_long host_rsp, u_long ept_pml4,
311 uint32_t pinbased_ctls, uint32_t procbased_ctls,
312 uint32_t procbased_ctls2, uint32_t exit_ctls,
313 uint32_t entry_ctls, u_long msr_bitmap, uint16_t vpid)
314{
315 int error, codesel, datasel, tsssel;
316 u_long cr0, cr4, efer;
46#include "vmcs.h"
47#include "vmx_cpufunc.h"
48#include "ept.h"
49#include "vmx.h"
50
51#ifdef DDB
52#include <ddb/ddb.h>
53#endif

--- 256 unchanged lines hidden (view full) ---

310vmcs_set_defaults(struct vmcs *vmcs,
311 u_long host_rip, u_long host_rsp, u_long ept_pml4,
312 uint32_t pinbased_ctls, uint32_t procbased_ctls,
313 uint32_t procbased_ctls2, uint32_t exit_ctls,
314 uint32_t entry_ctls, u_long msr_bitmap, uint16_t vpid)
315{
316 int error, codesel, datasel, tsssel;
317 u_long cr0, cr4, efer;
317 uint64_t eptp, pat;
318 uint64_t eptp, pat, fsbase, idtrbase;
318 uint32_t exc_bitmap;
319
319 uint32_t exc_bitmap;
320
320 codesel = GSEL(GCODE_SEL, SEL_KPL);
321 datasel = GSEL(GDATA_SEL, SEL_KPL);
322 tsssel = GSEL(GPROC0_SEL, SEL_KPL);
321 codesel = vmm_get_host_codesel();
322 datasel = vmm_get_host_datasel();
323 tsssel = vmm_get_host_tsssel();
323
324 /*
325 * Make sure we have a "current" VMCS to work with.
326 */
327 VMPTRLD(vmcs);
328
329 /*
330 * Load the VMX controls

--- 21 unchanged lines hidden (view full) ---

352 PAT_VALUE(6, PAT_UNCACHED) |
353 PAT_VALUE(7, PAT_UNCACHEABLE);
354 if ((error = vmwrite(VMCS_GUEST_IA32_PAT, pat)) != 0)
355 goto done;
356
357 /* Host state */
358
359 /* Initialize host IA32_PAT MSR */
324
325 /*
326 * Make sure we have a "current" VMCS to work with.
327 */
328 VMPTRLD(vmcs);
329
330 /*
331 * Load the VMX controls

--- 21 unchanged lines hidden (view full) ---

353 PAT_VALUE(6, PAT_UNCACHED) |
354 PAT_VALUE(7, PAT_UNCACHEABLE);
355 if ((error = vmwrite(VMCS_GUEST_IA32_PAT, pat)) != 0)
356 goto done;
357
358 /* Host state */
359
360 /* Initialize host IA32_PAT MSR */
360 pat = rdmsr(MSR_PAT);
361 pat = vmm_get_host_pat();
361 if ((error = vmwrite(VMCS_HOST_IA32_PAT, pat)) != 0)
362 goto done;
363
364 /* Load the IA32_EFER MSR */
362 if ((error = vmwrite(VMCS_HOST_IA32_PAT, pat)) != 0)
363 goto done;
364
365 /* Load the IA32_EFER MSR */
365 efer = rdmsr(MSR_EFER);
366 efer = vmm_get_host_efer();
366 if ((error = vmwrite(VMCS_HOST_IA32_EFER, efer)) != 0)
367 goto done;
368
369 /* Load the control registers */
370
367 if ((error = vmwrite(VMCS_HOST_IA32_EFER, efer)) != 0)
368 goto done;
369
370 /* Load the control registers */
371
371 /*
372 * We always want CR0.TS to be set when the processor does a VM exit.
373 *
374 * With emulation turned on unconditionally after a VM exit, we are
375 * able to trap inadvertent use of the FPU until the guest FPU state
376 * has been safely squirreled away.
377 */
378 cr0 = rcr0() | CR0_TS;
372 cr0 = vmm_get_host_cr0();
379 if ((error = vmwrite(VMCS_HOST_CR0, cr0)) != 0)
380 goto done;
381
373 if ((error = vmwrite(VMCS_HOST_CR0, cr0)) != 0)
374 goto done;
375
382 cr4 = rcr4();
376 cr4 = vmm_get_host_cr4() | CR4_VMXE;
383 if ((error = vmwrite(VMCS_HOST_CR4, cr4)) != 0)
384 goto done;
385
386 /* Load the segment selectors */
387 if ((error = vmwrite(VMCS_HOST_ES_SELECTOR, datasel)) != 0)
388 goto done;
389
390 if ((error = vmwrite(VMCS_HOST_CS_SELECTOR, codesel)) != 0)

--- 15 unchanged lines hidden (view full) ---

406 goto done;
407
408 /*
409 * Load the Base-Address for %fs and idtr.
410 *
411 * Note that we exclude %gs, tss and gdtr here because their base
412 * address is pcpu specific.
413 */
377 if ((error = vmwrite(VMCS_HOST_CR4, cr4)) != 0)
378 goto done;
379
380 /* Load the segment selectors */
381 if ((error = vmwrite(VMCS_HOST_ES_SELECTOR, datasel)) != 0)
382 goto done;
383
384 if ((error = vmwrite(VMCS_HOST_CS_SELECTOR, codesel)) != 0)

--- 15 unchanged lines hidden (view full) ---

400 goto done;
401
402 /*
403 * Load the Base-Address for %fs and idtr.
404 *
405 * Note that we exclude %gs, tss and gdtr here because their base
406 * address is pcpu specific.
407 */
414 if ((error = vmwrite(VMCS_HOST_FS_BASE, 0)) != 0)
408 fsbase = vmm_get_host_fsbase();
409 if ((error = vmwrite(VMCS_HOST_FS_BASE, fsbase)) != 0)
415 goto done;
416
410 goto done;
411
417 if ((error = vmwrite(VMCS_HOST_IDTR_BASE, r_idt.rd_base)) != 0)
412 idtrbase = vmm_get_host_idtrbase();
413 if ((error = vmwrite(VMCS_HOST_IDTR_BASE, idtrbase)) != 0)
418 goto done;
419
420 /* instruction pointer */
421 if ((error = vmwrite(VMCS_HOST_RIP, host_rip)) != 0)
422 goto done;
423
424 /* stack pointer */
425 if ((error = vmwrite(VMCS_HOST_RSP, host_rsp)) != 0)

--- 130 unchanged lines hidden --- 		414 goto done;
415
416 /* instruction pointer */
417 if ((error = vmwrite(VMCS_HOST_RIP, host_rip)) != 0)
418 goto done;
419
420 /* stack pointer */
421 if ((error = vmwrite(VMCS_HOST_RSP, host_rsp)) != 0)

--- 130 unchanged lines hidden ---