pci_cfgreg.c (099d058b54ca72ce34f686cddbe57221d6c96cce) pci_cfgreg.c (bb0d0a8efc748ae3a7a6f639d373bac067cf8ba1)
1/*
2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000, BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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41#include <pci/pcivar.h>
42#include <pci/pcireg.h>
43#include <isa/isavar.h>
44#include <machine/nexusvar.h>
45#include <machine/pci_cfgreg.h>
46#include <machine/segments.h>
47#include <machine/pc/bios.h>
48
1/*
2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000, BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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41#include <pci/pcivar.h>
42#include <pci/pcireg.h>
43#include <isa/isavar.h>
44#include <machine/nexusvar.h>
45#include <machine/pci_cfgreg.h>
46#include <machine/segments.h>
47#include <machine/pc/bios.h>
48
49#ifdef APIC_IO
50#include <machine/smp.h>
51#endif /* APIC_IO */
52
49#include "pcib_if.h"
50
51static int cfgmech;
52static int devmax;
53static int usebios;
54
55static int pci_cfgintr_unique(struct PIR_entry *pe, int pin);
56static int pci_cfgintr_linked(struct PIR_entry *pe, int pin);

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107 }
108 }
109
110 opened = 1;
111 return(1);
112}
113
114/*
53#include "pcib_if.h"
54
55static int cfgmech;
56static int devmax;
57static int usebios;
58
59static int pci_cfgintr_unique(struct PIR_entry *pe, int pin);
60static int pci_cfgintr_linked(struct PIR_entry *pe, int pin);

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111 }
112 }
113
114 opened = 1;
115 return(1);
116}
117
118/*
115 * Read configuration space register
119 * Read configuration space register
116 */
117u_int32_t
120 */
121u_int32_t
118pci_cfgregread(int bus, int slot, int func, int reg, int bytes)
122pci_do_cfgregread(int bus, int slot, int func, int reg, int bytes)
119{
120 return(usebios ?
121 pcibios_cfgread(bus, slot, func, reg, bytes) :
122 pcireg_cfgread(bus, slot, func, reg, bytes));
123}
124
123{
124 return(usebios ?
125 pcibios_cfgread(bus, slot, func, reg, bytes) :
126 pcireg_cfgread(bus, slot, func, reg, bytes));
127}
128
129u_int32_t
130pci_cfgregread(int bus, int slot, int func, int reg, int bytes)
131{
132#ifdef APIC_IO
133 /*
134 * If we are using the APIC, the contents of the intline register will probably
135 * be wrong (since they are set up for use with the PIC.
136 * Rather than rewrite these registers (maybe that would be smarter) we trap
137 * attempts to read them and translate to our private vector numbers.
138 */
139 if ((reg == PCIR_INTLINE) && (bytes == 1)) {
140 int pin, line, airq;
141
142 pin = pci_do_cfgregread(bus, slot, func, PCIR_INTPIN, 1);
143 line = pci_do_cfgregread(bus, slot, func, PCIR_INTLINE, 1);
144
145 if (pin != 0) {
146 int airq;
147
148 airq = pci_apic_irq(bus, slot, pin);
149 if (airq >= 0) {
150 /* PCI specific entry found in MP table */
151 if (airq != line)
152 undirect_pci_irq(line);
153 return(airq);
154 } else {
155 /*
156 * PCI interrupts might be redirected to the
157 * ISA bus according to some MP tables. Use the
158 * same methods as used by the ISA devices
159 * devices to find the proper IOAPIC int pin.
160 */
161 airq = isa_apic_irq(line);
162 if ((airq >= 0) && (airq != line)) {
163 /* XXX: undirect_pci_irq() ? */
164 undirect_isa_irq(line);
165 return(airq);
166 }
167 }
168 }
169 return(line);
170 }
171#endif /* APIC_IO */
172 return(pci_do_cfgregread(bus, slot, func, reg, bytes));
173}
174
125/*
126 * Write configuration space register
127 */
128void
129pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
130{
131 return(usebios ?
132 pcibios_cfgwrite(bus, slot, func, reg, data, bytes) :

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176 * Write configuration space register
177 */
178void
179pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
180{
181 return(usebios ?
182 pcibios_cfgwrite(bus, slot, func, reg, data, bytes) :

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