pcpu.h (c49761dd572ca667babda4253e14498c7161e21a) pcpu.h (bd50262f705c4fed70ea94d16a0f19b5f5497cf2)
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) Peter Wemm <peter@netplex.com.au>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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30
31#ifndef _MACHINE_PCPU_H_
32#define _MACHINE_PCPU_H_
33
34#ifndef _SYS_CDEFS_H_
35#error "sys/cdefs.h is a prerequisite for this file"
36#endif
37
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) Peter Wemm <peter@netplex.com.au>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 21 unchanged lines hidden (view full) ---

30
31#ifndef _MACHINE_PCPU_H_
32#define _MACHINE_PCPU_H_
33
34#ifndef _SYS_CDEFS_H_
35#error "sys/cdefs.h is a prerequisite for this file"
36#endif
37
38#define PC_PTI_STACK_SZ 16
38/*
39 * The SMP parts are setup in pmap.c and locore.s for the BSP, and
40 * mp_machdep.c sets up the data for the AP's to "see" when they awake.
41 * The reason for doing it via a struct is so that an array of pointers
42 * to each CPU's data can be set up for things like "check curproc on all
43 * other processors"
44 */
45#define PCPU_MD_FIELDS \
46 char pc_monitorbuf[128] __aligned(128); /* cache line */ \
47 struct pcpu *pc_prvspace; /* Self-reference */ \
48 struct pmap *pc_curpmap; \
49 struct amd64tss *pc_tssp; /* TSS segment active on CPU */ \
50 struct amd64tss *pc_commontssp;/* Common TSS for the CPU */ \
39/*
40 * The SMP parts are setup in pmap.c and locore.s for the BSP, and
41 * mp_machdep.c sets up the data for the AP's to "see" when they awake.
42 * The reason for doing it via a struct is so that an array of pointers
43 * to each CPU's data can be set up for things like "check curproc on all
44 * other processors"
45 */
46#define PCPU_MD_FIELDS \
47 char pc_monitorbuf[128] __aligned(128); /* cache line */ \
48 struct pcpu *pc_prvspace; /* Self-reference */ \
49 struct pmap *pc_curpmap; \
50 struct amd64tss *pc_tssp; /* TSS segment active on CPU */ \
51 struct amd64tss *pc_commontssp;/* Common TSS for the CPU */ \
52 uint64_t pc_kcr3; \
53 uint64_t pc_ucr3; \
51 register_t pc_rsp0; \
52 register_t pc_scratch_rsp; /* User %rsp in syscall */ \
54 register_t pc_rsp0; \
55 register_t pc_scratch_rsp; /* User %rsp in syscall */ \
56 register_t pc_scratch_rax; \
53 u_int pc_apic_id; \
54 u_int pc_acpi_id; /* ACPI CPU id */ \
55 /* Pointer to the CPU %fs descriptor */ \
56 struct user_segment_descriptor *pc_fs32p; \
57 /* Pointer to the CPU %gs descriptor */ \
58 struct user_segment_descriptor *pc_gs32p; \
59 /* Pointer to the CPU LDT descriptor */ \
60 struct system_segment_descriptor *pc_ldt; \
61 /* Pointer to the CPU TSS descriptor */ \
62 struct system_segment_descriptor *pc_tss; \
63 uint64_t pc_pm_save_cnt; \
64 u_int pc_cmci_mask; /* MCx banks for CMCI */ \
65 uint64_t pc_dbreg[16]; /* ddb debugging regs */ \
57 u_int pc_apic_id; \
58 u_int pc_acpi_id; /* ACPI CPU id */ \
59 /* Pointer to the CPU %fs descriptor */ \
60 struct user_segment_descriptor *pc_fs32p; \
61 /* Pointer to the CPU %gs descriptor */ \
62 struct user_segment_descriptor *pc_gs32p; \
63 /* Pointer to the CPU LDT descriptor */ \
64 struct system_segment_descriptor *pc_ldt; \
65 /* Pointer to the CPU TSS descriptor */ \
66 struct system_segment_descriptor *pc_tss; \
67 uint64_t pc_pm_save_cnt; \
68 u_int pc_cmci_mask; /* MCx banks for CMCI */ \
69 uint64_t pc_dbreg[16]; /* ddb debugging regs */ \
70 uint64_t pc_pti_stack[PC_PTI_STACK_SZ]; \
66 int pc_dbreg_cmd; /* ddb debugging reg cmd */ \
67 u_int pc_vcpu_id; /* Xen vCPU ID */ \
68 uint32_t pc_pcid_next; \
69 uint32_t pc_pcid_gen; \
70 uint32_t pc_smp_tlb_done; /* TLB op acknowledgement */ \
71 int pc_dbreg_cmd; /* ddb debugging reg cmd */ \
72 u_int pc_vcpu_id; /* Xen vCPU ID */ \
73 uint32_t pc_pcid_next; \
74 uint32_t pc_pcid_gen; \
75 uint32_t pc_smp_tlb_done; /* TLB op acknowledgement */ \
71 char __pad[384] /* be divisor of PAGE_SIZE \
76 char __pad[232] /* be divisor of PAGE_SIZE \
72 after cache alignment */
73
74#define PC_DBREG_CMD_NONE 0
75#define PC_DBREG_CMD_LOAD 1
76
77#ifdef _KERNEL
78
79#if defined(__GNUCLIKE_ASM) && defined(__GNUCLIKE___TYPEOF)

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78
79#define PC_DBREG_CMD_NONE 0
80#define PC_DBREG_CMD_LOAD 1
81
82#ifdef _KERNEL
83
84#if defined(__GNUCLIKE_ASM) && defined(__GNUCLIKE___TYPEOF)

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