cpu_switch.S (648c711bb4884726b91dbb094028a9f94233927c) cpu_switch.S (a29b63cb739723c4874f328af2cbdfac80d184bd)
1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without

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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without

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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * $Id: swtch.s,v 1.19 1995/01/21 15:20:23 bde Exp $
36 * $Id: swtch.s,v 1.20 1995/02/17 02:22:42 phk Exp $
37 */
38
39#include "npx.h" /* for NNPX */
40#include "assym.s" /* for preprocessor defines */
41#include <sys/errno.h> /* for error codes */
42
43#include <machine/asmacros.h> /* for miscellaneous assembly macros */
44#include <machine/spl.h> /* for SWI_AST_MASK ... */

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273 movb $1,_intr_nesting_level /* charge Intr if we leave */
274 cmpl $0,_whichrtqs /* real-time queue */
275 jne sw1a
276 cmpl $0,_whichqs /* normal queue */
277 jne nortqr
278 cmpl $0,_whichidqs /* 'idle' queue */
279 jne idqr
280 movb $0,_intr_nesting_level /* charge Idle for this loop */
37 */
38
39#include "npx.h" /* for NNPX */
40#include "assym.s" /* for preprocessor defines */
41#include <sys/errno.h> /* for error codes */
42
43#include <machine/asmacros.h> /* for miscellaneous assembly macros */
44#include <machine/spl.h> /* for SWI_AST_MASK ... */

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273 movb $1,_intr_nesting_level /* charge Intr if we leave */
274 cmpl $0,_whichrtqs /* real-time queue */
275 jne sw1a
276 cmpl $0,_whichqs /* normal queue */
277 jne nortqr
278 cmpl $0,_whichidqs /* 'idle' queue */
279 jne idqr
280 movb $0,_intr_nesting_level /* charge Idle for this loop */
281 call _vm_page_zero_idle
282 testl %eax, %eax
283 jnz idle_loop
281#if NAPM > 0
282#if APM_SLOWSTART <= 0 || !defined(APM_SLOWSTART)
283 /*
284 * XXX it breaks the rules to call a function while interrupts are
285 * disabled. How long before apm enables them?
286 */
287 call _apm_cpu_idle
288 call _apm_cpu_busy

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284#if NAPM > 0
285#if APM_SLOWSTART <= 0 || !defined(APM_SLOWSTART)
286 /*
287 * XXX it breaks the rules to call a function while interrupts are
288 * disabled. How long before apm enables them?
289 */
290 call _apm_cpu_idle
291 call _apm_cpu_busy

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