ppbus.4 (310fc6c533459ac675558206a20947b83d7eb337) | ppbus.4 (1cc60ae8d8871cf269e108b2f587def3e37551cf) |
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1.\" Copyright (c) 1998, 1999 Nicolas Souchu 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. --- 81 unchanged lines hidden (view full) --- 90ppc makes chipset detection and initialization and then calls ppbus attach 91functions to initialize the ppbus system. 92.Sh PARALLEL PORT MODEL 93The logical parallel port model chosen for the ppbus system is the PC's 94parallel port model. 95Consequently, for the i386 implementation of ppbus, 96most of the services provided by ppc are macros for inb() 97and outb() calls. | 1.\" Copyright (c) 1998, 1999 Nicolas Souchu 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. --- 81 unchanged lines hidden (view full) --- 90ppc makes chipset detection and initialization and then calls ppbus attach 91functions to initialize the ppbus system. 92.Sh PARALLEL PORT MODEL 93The logical parallel port model chosen for the ppbus system is the PC's 94parallel port model. 95Consequently, for the i386 implementation of ppbus, 96most of the services provided by ppc are macros for inb() 97and outb() calls. |
98But, for an other architecture, accesses to one of our logical | 98But, for another architecture, accesses to one of our logical |
99registers (data, status, control...) may require more than one I/O access. 100.Ss Description 101The parallel port may operate in the following modes: 102.Bl -bullet -offset indent 103.It 104compatible mode, also called Centronics mode 105.It 106bidirectional 8/4-bits mode, also called NIBBLE mode --- 242 unchanged lines hidden --- | 99registers (data, status, control...) may require more than one I/O access. 100.Ss Description 101The parallel port may operate in the following modes: 102.Bl -bullet -offset indent 103.It 104compatible mode, also called Centronics mode 105.It 106bidirectional 8/4-bits mode, also called NIBBLE mode --- 242 unchanged lines hidden --- |