| ahci.4 (31ccd48942f0df842d9a31fe8e862c197ff296b9) | ahci.4 (7e3de069eff9352649f7f464c71560b1bd84a8fc) |
|---|---|
| 1.\" Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. --- 38 unchanged lines hidden (view full) --- 47ahci_load="YES" 48.Ed 49.Pp 50The following tunables are settable from the 51.Xr loader 8 : 52.Bl -ohang 53.It Va hint.ahci. Ns Ar X Ns Va .msi 54controls Message Signaled Interrupts (MSI) usage by the specified controller. | 1.\" Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. --- 38 unchanged lines hidden (view full) --- 47ahci_load="YES" 48.Ed 49.Pp 50The following tunables are settable from the 51.Xr loader 8 : 52.Bl -ohang 53.It Va hint.ahci. Ns Ar X Ns Va .msi 54controls Message Signaled Interrupts (MSI) usage by the specified controller. |
| 55.Bl -tag -compact | 55.Pp 56.Bl -tag -width 4n -offset indent -compact |
| 56.It 0 57MSI disabled; 58.It 1 59single MSI vector used, if supported (default); 60.It 2 61multiple MSI vectors used, if supported; 62.El 63.It Va hint.ahci. Ns Ar X Ns Va .ccc 64controls Command Completion Coalescing (CCC) usage by the specified controller. 65Non-zero value enables CCC and defines maximum time (in ms), request can wait 66for interrupt, if there are some more requests present on controller queue. 67CCC reduces number of context switches on systems with many parallel requests, 68but it can decrease disk performance on some workloads due to additional 69command latency. 70.It Va hint.ahcich. Ns Ar X Ns Va .pm_level 71controls SATA interface Power Management for the specified channel, 72allowing some power to be saved at the cost of additional command 73latency. 74Possible values: | 57.It 0 58MSI disabled; 59.It 1 60single MSI vector used, if supported (default); 61.It 2 62multiple MSI vectors used, if supported; 63.El 64.It Va hint.ahci. Ns Ar X Ns Va .ccc 65controls Command Completion Coalescing (CCC) usage by the specified controller. 66Non-zero value enables CCC and defines maximum time (in ms), request can wait 67for interrupt, if there are some more requests present on controller queue. 68CCC reduces number of context switches on systems with many parallel requests, 69but it can decrease disk performance on some workloads due to additional 70command latency. 71.It Va hint.ahcich. Ns Ar X Ns Va .pm_level 72controls SATA interface Power Management for the specified channel, 73allowing some power to be saved at the cost of additional command 74latency. 75Possible values: |
| 75.Bl -tag -compact | 76.Pp 77.Bl -tag -width 4n -offset indent -compact |
| 76.It 0 77interface Power Management is disabled (default); 78.It 1 79device is allowed to initiate PM state change, host is passive; 80.It 2 81host initiates PARTIAL PM state transition every time port becomes idle; 82.It 3 83host initiates SLUMBER PM state transition every time port becomes idle. 84.It 4 85driver initiates PARTIAL PM state transition 1ms after port becomes idle; 86.It 5 87driver initiates SLUMBER PM state transition 125ms after port becomes idle. 88.El | 78.It 0 79interface Power Management is disabled (default); 80.It 1 81device is allowed to initiate PM state change, host is passive; 82.It 2 83host initiates PARTIAL PM state transition every time port becomes idle; 84.It 3 85host initiates SLUMBER PM state transition every time port becomes idle. 86.It 4 87driver initiates PARTIAL PM state transition 1ms after port becomes idle; 88.It 5 89driver initiates SLUMBER PM state transition 125ms after port becomes idle. 90.El |
| 91.Pp |
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| 89Some controllers, such as ICH8, do not implement modes 2 and 3 with NCQ used. 90Because of artificial entering latency, performance degradation in modes 914 and 5 is much smaller then in modes 2 and 3. 92.Pp 93Note that interface Power Management complicates device presence detection. 94A manual bus reset/rescan may be needed after device hot-plug, unless hardware 95implements Cold Presence Detection. 96.It Va hint.ahcich. Ns Ar X Ns Va .sata_rev --- 76 unchanged lines hidden --- | 92Some controllers, such as ICH8, do not implement modes 2 and 3 with NCQ used. 93Because of artificial entering latency, performance degradation in modes 944 and 5 is much smaller then in modes 2 and 3. 95.Pp 96Note that interface Power Management complicates device presence detection. 97A manual bus reset/rescan may be needed after device hot-plug, unless hardware 98implements Cold Presence Detection. 99.It Va hint.ahcich. Ns Ar X Ns Va .sata_rev --- 76 unchanged lines hidden --- |