| divsi3.S (2357939bc239bd5334a169b62313806178dd8f30) | divsi3.S (31489a9a2653e123121e8ca39b4be802013d2b50) |
|---|---|
| 1/* $NetBSD: divsi3.S,v 1.4 2003/04/05 23:27:15 bjh21 Exp $ */ 2 3/* 4 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 5 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 6 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 7 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 8 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- 33 unchanged lines hidden (view full) --- 42#if !defined(_KERNEL) && !defined(_STANDALONE) 43 mov r0, #8 /* SIGFPE */ 44 bl PIC_SYM(_C_LABEL(raise), PLT) /* raise it */ 45 mov r0, #0 46#else 47 /* XXX should cause a fatal error */ 48 mvn r0, #0 49#endif | 1/* $NetBSD: divsi3.S,v 1.4 2003/04/05 23:27:15 bjh21 Exp $ */ 2 3/* 4 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 5 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 6 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 7 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 8 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- 33 unchanged lines hidden (view full) --- 42#if !defined(_KERNEL) && !defined(_STANDALONE) 43 mov r0, #8 /* SIGFPE */ 44 bl PIC_SYM(_C_LABEL(raise), PLT) /* raise it */ 45 mov r0, #0 46#else 47 /* XXX should cause a fatal error */ 48 mvn r0, #0 49#endif |
| 50 mov pc, lr | 50 RET |
| 51 52ENTRY(__udivsi3) 53.L_udivide: /* r0 = r0 / r1; r1 = r0 % r1 */ 54 eor r0, r1, r0 55 eor r1, r0, r1 56 eor r0, r1, r0 57 /* r0 = r1 / r0; r1 = r1 % r0 */ 58 cmp r0, #1 --- 5 unchanged lines hidden (view full) --- 64 orr ip, ip, #0x20000000 /* ip bit 0x20000000 = -ve r1 */ 65 movs r1, r1, lsr #1 66 orrcs ip, ip, #0x10000000 /* ip bit 0x10000000 = bit 0 of r1 */ 67 b .L_divide_l1 68 69.L_divide_l0: /* r0 == 1 */ 70 mov r0, r1 71 mov r1, #0 | 51 52ENTRY(__udivsi3) 53.L_udivide: /* r0 = r0 / r1; r1 = r0 % r1 */ 54 eor r0, r1, r0 55 eor r1, r0, r1 56 eor r0, r1, r0 57 /* r0 = r1 / r0; r1 = r1 % r0 */ 58 cmp r0, #1 --- 5 unchanged lines hidden (view full) --- 64 orr ip, ip, #0x20000000 /* ip bit 0x20000000 = -ve r1 */ 65 movs r1, r1, lsr #1 66 orrcs ip, ip, #0x10000000 /* ip bit 0x10000000 = bit 0 of r1 */ 67 b .L_divide_l1 68 69.L_divide_l0: /* r0 == 1 */ 70 mov r0, r1 71 mov r1, #0 |
| 72 mov pc, lr | 72 RET |
| 73 74ENTRY(__divsi3) 75.L_divide: /* r0 = r0 / r1; r1 = r0 % r1 */ 76 eor r0, r1, r0 77 eor r1, r0, r1 78 eor r0, r1, r0 79 /* r0 = r1 / r0; r1 = r1 % r0 */ 80 cmp r0, #1 --- 287 unchanged lines hidden (view full) --- 368 tst ip, #0x20000000 369 bne .L_udivide_l1 370 mov r0, r3 371 cmp ip, #0 372 rsbmi r1, r1, #0 373 movs ip, ip, lsl #1 374 bicmi r0, r0, #0x80000000 /* Fix incase we divided 0x80000000 */ 375 rsbmi r0, r0, #0 | 73 74ENTRY(__divsi3) 75.L_divide: /* r0 = r0 / r1; r1 = r0 % r1 */ 76 eor r0, r1, r0 77 eor r1, r0, r1 78 eor r0, r1, r0 79 /* r0 = r1 / r0; r1 = r1 % r0 */ 80 cmp r0, #1 --- 287 unchanged lines hidden (view full) --- 368 tst ip, #0x20000000 369 bne .L_udivide_l1 370 mov r0, r3 371 cmp ip, #0 372 rsbmi r1, r1, #0 373 movs ip, ip, lsl #1 374 bicmi r0, r0, #0x80000000 /* Fix incase we divided 0x80000000 */ 375 rsbmi r0, r0, #0 |
| 376 mov pc, lr | 376 RET |
| 377 378.L_udivide_l1: 379 tst ip, #0x10000000 380 mov r1, r1, lsl #1 381 orrne r1, r1, #1 382 mov r3, r3, lsl #1 383 cmp r1, r0 384 subhs r1, r1, r0 385 addhs r3, r3, r2 386 mov r0, r3 | 377 378.L_udivide_l1: 379 tst ip, #0x10000000 380 mov r1, r1, lsl #1 381 orrne r1, r1, #1 382 mov r3, r3, lsl #1 383 cmp r1, r0 384 subhs r1, r1, r0 385 addhs r3, r3, r2 386 mov r0, r3 |
| 387 mov pc, lr | 387 RET |