clang.build.mk (51dd214c84efceda87c2ac10d34b7e3ee5b6c28f) clang.build.mk (1ae6788e516b0849e16085dbc4f035ec6e86b09a)
1# $FreeBSD$
2
3.include <src.opts.mk>
4
5CLANG_SRCS= ${LLVM_SRCS}/tools/clang
6
7CFLAGS+= -I${LLVM_SRCS}/include -I${CLANG_SRCS}/include \
8 -I${LLVM_SRCS}/${SRCDIR} ${INCDIR:C/^/-I${LLVM_SRCS}\//} -I. \

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52 AsmWriter1/-gen-asm-writer,-asmwriternum=1 \
53 AsmWriter/-gen-asm-writer \
54 CallingConv/-gen-callingconv \
55 CodeEmitter/-gen-emitter \
56 DAGISel/-gen-dag-isel \
57 DisassemblerTables/-gen-disassembler \
58 FastISel/-gen-fast-isel \
59 InstrInfo/-gen-instr-info \
1# $FreeBSD$
2
3.include <src.opts.mk>
4
5CLANG_SRCS= ${LLVM_SRCS}/tools/clang
6
7CFLAGS+= -I${LLVM_SRCS}/include -I${CLANG_SRCS}/include \
8 -I${LLVM_SRCS}/${SRCDIR} ${INCDIR:C/^/-I${LLVM_SRCS}\//} -I. \

--- 43 unchanged lines hidden (view full) ---

52 AsmWriter1/-gen-asm-writer,-asmwriternum=1 \
53 AsmWriter/-gen-asm-writer \
54 CallingConv/-gen-callingconv \
55 CodeEmitter/-gen-emitter \
56 DAGISel/-gen-dag-isel \
57 DisassemblerTables/-gen-disassembler \
58 FastISel/-gen-fast-isel \
59 InstrInfo/-gen-instr-info \
60 MCCodeEmitter/-gen-emitter,-mc-emitter \
60 MCCodeEmitter/-gen-emitter \
61 MCPseudoLowering/-gen-pseudo-lowering \
62 RegisterInfo/-gen-register-info \
63 SubtargetInfo/-gen-subtarget
64${arch:T}Gen${hdr:H:C/$/.inc.h/}: ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td
65 ${TBLGEN} ${hdr:T:C/,/ /g} \
66 -I ${LLVM_SRCS}/include -I ${LLVM_SRCS}/lib/Target/${arch:H} \
67 -d ${.TARGET:C/\.h$/.d/} -o ${.TARGET} \
68 ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td

--- 160 unchanged lines hidden --- 		61 MCPseudoLowering/-gen-pseudo-lowering \
62 RegisterInfo/-gen-register-info \
63 SubtargetInfo/-gen-subtarget
64${arch:T}Gen${hdr:H:C/$/.inc.h/}: ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td
65 ${TBLGEN} ${hdr:T:C/,/ /g} \
66 -I ${LLVM_SRCS}/include -I ${LLVM_SRCS}/lib/Target/${arch:H} \
67 -d ${.TARGET:C/\.h$/.d/} -o ${.TARGET} \
68 ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td

--- 160 unchanged lines hidden ---