1\ 2\ CDDL HEADER START 3\ 4\ The contents of this file are subject to the terms of the 5\ Common Development and Distribution License, Version 1.0 only 6\ (the "License"). You may not use this file except in compliance 7\ with the License. 8\ 9\ You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10\ or http://www.opensolaris.org/os/licensing. 11\ See the License for the specific language governing permissions 12\ and limitations under the License. 13\ 14\ When distributing Covered Code, include this CDDL HEADER in each 15\ file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16\ If applicable, add the following below this CDDL HEADER, with the 17\ fields enclosed by brackets "[]" replaced with your own identifying 18\ information: Portions Copyright [yyyy] [name of copyright owner] 19\ 20\ CDDL HEADER END 21\ 22\ Copyright 2004 Sun Microsystems, Inc. All rights reserved. 23\ Use is subject to license terms. 24\ 25\ offsets.in: input file to produce assym.h using the stabs program 26\ 27\ 28\ Guidelines: 29\ 30\ A blank line is required between structure/union/intrinsic names. 31\ 32\ The general form is: 33\ 34\ name size_define [shift_define] 35\ [member_name [offset_define]] 36\ {blank line} 37\ 38\ If no individual member_name's are specified then all members are processed. 39\ If offset_define is not specified then the member_name is 40\ converted to all caps and used instead. If the size of an item is 41\ a power of two then an optional shift count may be output using 42\ shift_define as the name but only if shift_define was specified. 43\ 44\ Arrays cause stabs to automatically output the per-array-item increment 45\ in addition to the base address: 46\ 47\ foo FOO_SIZE 48\ array FOO_ARRAY 49\ 50\ results in: 51\ 52\ #define FOO_ARRAY 0x0 53\ #define FOO_ARRAY_INCR 0x4 54\ 55\ which allows \#define's to be used to specify array items: 56\ 57\ #define FOO_0 (FOO_ARRAY + (0 * FOO_ARRAY_INCR)) 58\ #define FOO_1 (FOO_ARRAY + (1 * FOO_ARRAY_INCR)) 59\ ... 60\ #define FOO_n (FOO_ARRAY + (n * FOO_ARRAY_INCR)) 61\ 62\ There are several examples below (search for _INCR). 63\ 64\ There is currently no manner in which to identify "anonymous" 65\ structures or unions so if they are to be used in assembly code 66\ they must be given names. 67\ 68\ When specifying the offsets of nested structures/unions each nested 69\ structure or union must be listed separately then use the 70\ "\#define" escapes to add the offsets from the base structure/union 71\ and all of the nested structures/unions together. See the many 72\ examples already in this file. 73 74#pragma ident "%Z%%M% %I% %E% SMI" 75 76#ifndef _GENASSYM 77#define _GENASSYM 78#endif 79 80#include <vm/hat_sfmmu.h> 81#include <sys/traptrace.h> 82 83machcpu 84 intrstat MCPU_INTRSTAT 85 pil_high_start MCPU_PIL_HIGH_START 86 mpcb_pa MCPU_MPCB_PA 87 kwbuf_full MCPU_KWBUF_FULL 88 kwbuf_sp MCPU_KWBUF_SP 89 kwbuf MCPU_KWBUF 90 cpu_q_base_pa MCPU_CPU_Q_BASE 91 cpu_q_size MCPU_CPU_Q_SIZE 92 dev_q_base_pa MCPU_DEV_Q_BASE 93 dev_q_size MCPU_DEV_Q_SIZE 94 mondo_data MCPU_MONDO_DATA 95 mondo_data_ra MCPU_MONDO_DATA_RA 96 cpu_rq_va MCPU_RQ_BASE_VA 97 cpu_rq_base_pa MCPU_RQ_BASE 98 cpu_rq_size MCPU_RQ_SIZE 99 cpu_nrq_va MCPU_NRQ_BASE_VA 100 cpu_nrq_base_pa MCPU_NRQ_BASE 101 cpu_nrq_size MCPU_NRQ_SIZE 102 cpu_tstat_flags MCPU_TSTAT_FLAGS 103 104\#define CPU_MPCB_PA (CPU_MCPU + MCPU_MPCB_PA) 105\#define CPU_KWBUF_FULL (CPU_MCPU + MCPU_KWBUF_FULL) 106\#define CPU_KWBUF_SP (CPU_MCPU + MCPU_KWBUF_SP) 107\#define CPU_KWBUF (CPU_MCPU + MCPU_KWBUF) 108\#define CPU_Q_BASE (CPU_MCPU + MCPU_CPU_Q_BASE) 109\#define CPU_Q_SIZE (CPU_MCPU + MCPU_CPU_Q_SIZE) 110\#define DEV_Q_BASE (CPU_MCPU + MCPU_DEV_Q_BASE) 111\#define DEV_Q_SIZE (CPU_MCPU + MCPU_DEV_Q_SIZE) 112\#define CPU_RQ_BASE_VA_OFF (CPU_MCPU + MCPU_RQ_BASE_VA) 113\#define CPU_RQ_BASE_OFF (CPU_MCPU + MCPU_RQ_BASE) 114\#define CPU_RQ_SIZE_OFF (CPU_MCPU + MCPU_RQ_SIZE) 115\#define CPU_NRQ_BASE_VA_OFF (CPU_MCPU + MCPU_NRQ_BASE_VA) 116\#define CPU_NRQ_BASE_OFF (CPU_MCPU + MCPU_NRQ_BASE) 117\#define CPU_NRQ_SIZE_OFF (CPU_MCPU + MCPU_NRQ_SIZE) 118\#define CPU_TSTAT_FLAGS (CPU_MCPU + MCPU_TSTAT_FLAGS) 119 120trap_trace_record TRAP_ENT_SIZE 121 tt_gl TRAP_ENT_GL 122 tt_tl TRAP_ENT_TL 123 tt_tt TRAP_ENT_TT 124 tt_tpc TRAP_ENT_TPC 125 tt_tstate TRAP_ENT_TSTATE 126 tt_tick TRAP_ENT_TICK 127 tt_sp TRAP_ENT_SP 128 tt_tr TRAP_ENT_TR 129 tt_f1 TRAP_ENT_F1 130 tt_f2 TRAP_ENT_F2 131 tt_f3 TRAP_ENT_F3 132 tt_f4 TRAP_ENT_F4 133 134htrap_trace_record HTRAP_ENT_SIZE 135 136hat HAT_SIZE 137 sfmmu_cnum 138 sfmmu_cpusran 139 sfmmu_tsb 140 sfmmu_ismblkpa 141 sfmmu_flags 142 sfmmu_hvblock 143 144sfmmu_global_stat HATSTAT_SIZE 145 sf_pagefaults HATSTAT_PAGEFAULT 146 sf_uhash_searches HATSTAT_UHASH_SEARCH 147 sf_uhash_links HATSTAT_UHASH_LINKS 148 sf_khash_searches HATSTAT_KHASH_SEARCH 149 sf_khash_links HATSTAT_KHASH_LINKS 150 151ctx CTX_SIZE CTX_SZ_SHIFT 152 ctx_un.ctx_sfmmup CTX_SFMMUP 153 154sf_hment SFHME_SIZE SFHME_SHIFT 155 hme_tte SFHME_TTE 156 157tsbmiss TSBMISS_SIZE TSBMISS_SHIFT 158 tsbptr TSBMISS_TSBPTR 159 tsbptr4m TSBMISS_TSBPTR4M 160 ksfmmup TSBMISS_KHATID 161 usfmmup TSBMISS_UHATID 162 khashsz TSBMISS_KHASHSZ 163 khashstart TSBMISS_KHASHSTART 164 uhashsz TSBMISS_UHASHSZ 165 uhashstart TSBMISS_UHASHSTART 166 hat_flags TSBMISS_HATFLAGS 167 ismblkpa TSBMISS_ISMBLKPA 168 itlb_misses TSBMISS_ITLBMISS 169 dtlb_misses TSBMISS_DTLBMISS 170 utsb_misses TSBMISS_UTSBMISS 171 ktsb_misses TSBMISS_KTSBMISS 172 uprot_traps TSBMISS_UPROTS 173 kprot_traps TSBMISS_KPROTS 174 scratch TSBMISS_SCRATCH 175 176\#define TSB_TAGACC (0 * TSBMISS_SCRATCH_INCR) 177\#define TSBMISS_HMEBP (1 * TSBMISS_SCRATCH_INCR) 178\#define TSBMISS_HATID (2 * TSBMISS_SCRATCH_INCR) 179\#define TSBMISS_XMMURET (3 * TSBMISS_SCRATCH_INCR) 180\#define TSBMISS_XMMUPTR (4 * TSBMISS_SCRATCH_INCR) 181 182kpmtsbm KPMTSBM_SIZE KPMTSBM_SHIFT 183 vbase KPMTSBM_VBASE 184 vend KPMTSBM_VEND 185 flags KPMTSBM_FLAGS 186 sz_shift KPMTSBM_SZSHIFT 187 kpmp_shift KPMTSBM_KPMPSHIFT 188 kpmp2pshft KPMTSBM_KPMP2PSHFT 189 kpmp_table_sz KPMTSBM_KPMPTABLESZ 190 kpmp_tablepa KPMTSBM_KPMPTABLEPA 191 msegphashpa KPMTSBM_MSEGPHASHPA 192 tsbptr KPMTSBM_TSBPTR 193 kpm_dtlb_misses KPMTSBM_DTLBMISS 194 kpm_tsb_misses KPMTSBM_TSBMISS 195 196kpm_page KPMPAGE_SIZE KPMPAGE_SHIFT 197 kp_refcnt KPMPAGE_REFCNT 198 kp_refcnta KPMPAGE_REFCNTA 199 kp_refcntc KPMPAGE_REFCNTC 200 kp_refcnts KPMPAGE_REFCNTS 201 202kpm_hlk KPMHLK_SIZE KPMHLK_SHIFT 203 khl_mutex KPMHLK_MUTEX 204 khl_lock KPMHLK_LOCK 205 206kpm_spage KPMSPAGE_SIZE KPMSPAGE_SHIFT 207 kp_mapped KPMSPAGE_MAPPED 208 209kpm_shlk KPMSHLK_SIZE KPMSHLK_SHIFT 210 kshl_lock KPMSHLK_LOCK 211 212memseg MEMSEG_SIZE 213 pages MEMSEG_PAGES 214 epages MEMSEG_EPAGES 215 pages_base MEMSEG_PAGES_BASE 216 pages_end MEMSEG_PAGES_END 217 next MEMSEG_NEXT 218 lnext MEMSEG_LNEXT 219 nextpa MEMSEG_NEXTPA 220 pagespa MEMSEG_PAGESPA 221 epagespa MEMSEG_EPAGESPA 222 kpm_pbase MEMSEG_KPM_PBASE 223 kpm_nkpmpgs MEMSEG_KPM_NKPMPGS 224 mseg_un 225 kpm_pagespa MEMSEG_KPM_PAGESPA 226 227\#define MEMSEG_KPM_PAGES (MSEG_UN) 228\#define MEMSEG_KPM_SPAGES (MSEG_UN) 229 230page PAGE_SIZE 231 p_pagenum PAGE_PAGENUM 232 233tsb_info TSBINFO_SIZE 234 tsb_tte TSBINFO_TTE 235 tsb_va TSBINFO_VADDR 236 tsb_pa TSBINFO_PADDR 237 tsb_szc TSBINFO_SZCODE 238 tsb_next TSBINFO_NEXTPTR 239 240hv_tsb_block 241 hv_tsb_info_pa 242 hv_tsb_info_cnt 243 244cpu_node CPU_NODE_SIZE 245 nodeid 246 clock_freq 247 tick_nsec_scale 248 ecache_size ECACHE_SIZE 249 ecache_linesize ECACHE_LINESIZE 250 device_id DEVICE_ID 251 252ptl1_regs 253 ptl1_trap_regs 254 ptl1_gregs 255 ptl1_tick 256 ptl1_dmmu_type 257 ptl1_dmmu_addr 258 ptl1_dmmu_ctx 259 ptl1_immu_type 260 ptl1_immu_addr 261 ptl1_immu_ctx 262 ptl1_rwindow 263 ptl1_softint 264 ptl1_pstate 265 ptl1_pil 266 ptl1_cwp 267 ptl1_wstate 268 ptl1_otherwin 269 ptl1_cleanwin 270 ptl1_cansave 271 ptl1_canrestore 272 273ptl1_gregs 274 ptl1_gl 275 ptl1_g1 276 ptl1_g2 277 ptl1_g3 278 ptl1_g4 279 ptl1_g5 280 ptl1_g6 281 ptl1_g7 282 283