1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2007 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms of the CDDLv1. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 /* 29 * ********************************************************************** 30 * * 31 * Module Name: e1000g_stat.c * 32 * * 33 * Abstract: Functions for processing statistics * 34 * * 35 * ********************************************************************** 36 */ 37 #include "e1000g_sw.h" 38 #include "e1000g_debug.h" 39 40 static int e1000g_update_stats(kstat_t *ksp, int rw); 41 42 /* 43 * e1000_tbi_adjust_stats 44 * 45 * Adjusts statistic counters when a frame is accepted 46 * under the TBI workaround. This function has been 47 * adapted for Solaris from shared code. 48 */ 49 void 50 e1000_tbi_adjust_stats(struct e1000g *Adapter, 51 uint32_t frame_len, uint8_t *mac_addr) 52 { 53 struct e1000_hw *hw = &Adapter->shared; 54 uint32_t carry_bit; 55 p_e1000g_stat_t e1000g_ksp; 56 57 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 58 59 /* First adjust the frame length */ 60 frame_len--; 61 62 /* 63 * We need to adjust the statistics counters, since the hardware 64 * counters overcount this packet as a CRC error and undercount 65 * the packet as a good packet 66 */ 67 /* This packet should not be counted as a CRC error */ 68 e1000g_ksp->Crcerrs.value.ul--; 69 /* This packet does count as a Good Packet Received */ 70 e1000g_ksp->Gprc.value.ul++; 71 72 /* 73 * Adjust the Good Octets received counters 74 */ 75 carry_bit = 0x80000000 & e1000g_ksp->Gorl.value.ul; 76 e1000g_ksp->Gorl.value.ul += frame_len; 77 /* 78 * If the high bit of Gorcl (the low 32 bits of the Good Octets 79 * Received Count) was one before the addition, 80 * AND it is zero after, then we lost the carry out, 81 * need to add one to Gorch (Good Octets Received Count High). 82 * This could be simplified if all environments supported 83 * 64-bit integers. 84 */ 85 if (carry_bit && ((e1000g_ksp->Gorl.value.ul & 0x80000000) == 0)) { 86 e1000g_ksp->Gorh.value.ul++; 87 } 88 /* 89 * Is this a broadcast or multicast? Check broadcast first, 90 * since the test for a multicast frame will test positive on 91 * a broadcast frame. 92 */ 93 if ((mac_addr[0] == (uint8_t)0xff) && 94 (mac_addr[1] == (uint8_t)0xff)) { 95 /* 96 * Broadcast packet 97 */ 98 e1000g_ksp->Bprc.value.ul++; 99 } else if (*mac_addr & 0x01) { 100 /* 101 * Multicast packet 102 */ 103 e1000g_ksp->Mprc.value.ul++; 104 } 105 106 if (frame_len == hw->mac.max_frame_size) { 107 /* 108 * In this case, the hardware has overcounted the number of 109 * oversize frames. 110 */ 111 if (e1000g_ksp->Roc.value.ul > 0) 112 e1000g_ksp->Roc.value.ul--; 113 } 114 115 /* 116 * Adjust the bin counters when the extra byte put the frame in the 117 * wrong bin. Remember that the frame_len was adjusted above. 118 */ 119 if (frame_len == 64) { 120 e1000g_ksp->Prc64.value.ul++; 121 e1000g_ksp->Prc127.value.ul--; 122 } else if (frame_len == 127) { 123 e1000g_ksp->Prc127.value.ul++; 124 e1000g_ksp->Prc255.value.ul--; 125 } else if (frame_len == 255) { 126 e1000g_ksp->Prc255.value.ul++; 127 e1000g_ksp->Prc511.value.ul--; 128 } else if (frame_len == 511) { 129 e1000g_ksp->Prc511.value.ul++; 130 e1000g_ksp->Prc1023.value.ul--; 131 } else if (frame_len == 1023) { 132 e1000g_ksp->Prc1023.value.ul++; 133 e1000g_ksp->Prc1522.value.ul--; 134 } else if (frame_len == 1522) { 135 e1000g_ksp->Prc1522.value.ul++; 136 } 137 } 138 139 140 /* 141 * e1000g_update_stats - update driver private kstat counters 142 * 143 * This routine will dump and reset the e1000's internal 144 * statistics counters. The current stats dump values will 145 * be sent to the kernel status area. 146 */ 147 static int 148 e1000g_update_stats(kstat_t *ksp, int rw) 149 { 150 struct e1000g *Adapter; 151 struct e1000_hw *hw; 152 p_e1000g_stat_t e1000g_ksp; 153 e1000g_tx_ring_t *tx_ring; 154 e1000g_rx_ring_t *rx_ring; 155 uint64_t val; 156 uint32_t low_val, high_val; 157 158 if (rw == KSTAT_WRITE) 159 return (EACCES); 160 161 Adapter = (struct e1000g *)ksp->ks_private; 162 ASSERT(Adapter != NULL); 163 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 164 ASSERT(e1000g_ksp != NULL); 165 hw = &Adapter->shared; 166 167 tx_ring = Adapter->tx_ring; 168 rx_ring = Adapter->rx_ring; 169 170 rw_enter(&Adapter->chip_lock, RW_WRITER); 171 172 e1000g_ksp->link_speed.value.ul = Adapter->link_speed; 173 e1000g_ksp->reset_count.value.ul = Adapter->reset_count; 174 175 e1000g_ksp->rx_error.value.ul = rx_ring->stat_error; 176 e1000g_ksp->rx_esballoc_fail.value.ul = rx_ring->stat_esballoc_fail; 177 e1000g_ksp->rx_allocb_fail.value.ul = rx_ring->stat_allocb_fail; 178 e1000g_ksp->rx_exceed_pkt.value.ul = rx_ring->stat_exceed_pkt; 179 180 e1000g_ksp->tx_no_swpkt.value.ul = tx_ring->stat_no_swpkt; 181 e1000g_ksp->tx_no_desc.value.ul = tx_ring->stat_no_desc; 182 e1000g_ksp->tx_send_fail.value.ul = tx_ring->stat_send_fail; 183 e1000g_ksp->tx_reschedule.value.ul = tx_ring->stat_reschedule; 184 e1000g_ksp->tx_over_size.value.ul = tx_ring->stat_over_size; 185 186 #ifdef E1000G_DEBUG 187 e1000g_ksp->rx_none.value.ul = rx_ring->stat_none; 188 e1000g_ksp->rx_multi_desc.value.ul = rx_ring->stat_multi_desc; 189 e1000g_ksp->rx_no_freepkt.value.ul = rx_ring->stat_no_freepkt; 190 e1000g_ksp->rx_avail_freepkt.value.ul = rx_ring->avail_freepkt; 191 192 e1000g_ksp->tx_under_size.value.ul = tx_ring->stat_under_size; 193 e1000g_ksp->tx_exceed_frags.value.ul = tx_ring->stat_exceed_frags; 194 e1000g_ksp->tx_empty_frags.value.ul = tx_ring->stat_empty_frags; 195 e1000g_ksp->tx_recycle.value.ul = tx_ring->stat_recycle; 196 e1000g_ksp->tx_recycle_intr.value.ul = tx_ring->stat_recycle_intr; 197 e1000g_ksp->tx_recycle_retry.value.ul = tx_ring->stat_recycle_retry; 198 e1000g_ksp->tx_recycle_none.value.ul = tx_ring->stat_recycle_none; 199 e1000g_ksp->tx_copy.value.ul = tx_ring->stat_copy; 200 e1000g_ksp->tx_bind.value.ul = tx_ring->stat_bind; 201 e1000g_ksp->tx_multi_copy.value.ul = tx_ring->stat_multi_copy; 202 e1000g_ksp->tx_multi_cookie.value.ul = tx_ring->stat_multi_cookie; 203 e1000g_ksp->tx_lack_desc.value.ul = tx_ring->stat_lack_desc; 204 #endif 205 206 /* 207 * Standard Stats 208 */ 209 e1000g_ksp->Mpc.value.ul += E1000_READ_REG(hw, E1000_MPC); 210 e1000g_ksp->Rlec.value.ul += E1000_READ_REG(hw, E1000_RLEC); 211 e1000g_ksp->Xonrxc.value.ul += E1000_READ_REG(hw, E1000_XONRXC); 212 e1000g_ksp->Xontxc.value.ul += E1000_READ_REG(hw, E1000_XONTXC); 213 e1000g_ksp->Xoffrxc.value.ul += E1000_READ_REG(hw, E1000_XOFFRXC); 214 e1000g_ksp->Xofftxc.value.ul += E1000_READ_REG(hw, E1000_XOFFTXC); 215 e1000g_ksp->Fcruc.value.ul += E1000_READ_REG(hw, E1000_FCRUC); 216 217 if ((hw->mac.type != e1000_ich8lan) && 218 (hw->mac.type != e1000_ich9lan)) { 219 e1000g_ksp->Symerrs.value.ul += 220 E1000_READ_REG(hw, E1000_SYMERRS); 221 222 e1000g_ksp->Prc64.value.ul += 223 E1000_READ_REG(hw, E1000_PRC64); 224 e1000g_ksp->Prc127.value.ul += 225 E1000_READ_REG(hw, E1000_PRC127); 226 e1000g_ksp->Prc255.value.ul += 227 E1000_READ_REG(hw, E1000_PRC255); 228 e1000g_ksp->Prc511.value.ul += 229 E1000_READ_REG(hw, E1000_PRC511); 230 e1000g_ksp->Prc1023.value.ul += 231 E1000_READ_REG(hw, E1000_PRC1023); 232 e1000g_ksp->Prc1522.value.ul += 233 E1000_READ_REG(hw, E1000_PRC1522); 234 235 e1000g_ksp->Ptc64.value.ul += 236 E1000_READ_REG(hw, E1000_PTC64); 237 e1000g_ksp->Ptc127.value.ul += 238 E1000_READ_REG(hw, E1000_PTC127); 239 e1000g_ksp->Ptc255.value.ul += 240 E1000_READ_REG(hw, E1000_PTC255); 241 e1000g_ksp->Ptc511.value.ul += 242 E1000_READ_REG(hw, E1000_PTC511); 243 e1000g_ksp->Ptc1023.value.ul += 244 E1000_READ_REG(hw, E1000_PTC1023); 245 e1000g_ksp->Ptc1522.value.ul += 246 E1000_READ_REG(hw, E1000_PTC1522); 247 } 248 249 e1000g_ksp->Gprc.value.ul += E1000_READ_REG(hw, E1000_GPRC); 250 e1000g_ksp->Gptc.value.ul += E1000_READ_REG(hw, E1000_GPTC); 251 e1000g_ksp->Ruc.value.ul += E1000_READ_REG(hw, E1000_RUC); 252 e1000g_ksp->Rfc.value.ul += E1000_READ_REG(hw, E1000_RFC); 253 e1000g_ksp->Roc.value.ul += E1000_READ_REG(hw, E1000_ROC); 254 e1000g_ksp->Rjc.value.ul += E1000_READ_REG(hw, E1000_RJC); 255 e1000g_ksp->Tpr.value.ul += E1000_READ_REG(hw, E1000_TPR); 256 e1000g_ksp->Tncrs.value.ul += E1000_READ_REG(hw, E1000_TNCRS); 257 e1000g_ksp->Tsctc.value.ul += E1000_READ_REG(hw, E1000_TSCTC); 258 e1000g_ksp->Tsctfc.value.ul += E1000_READ_REG(hw, E1000_TSCTFC); 259 260 /* 261 * Adaptive Calculations 262 */ 263 hw->mac.tx_packet_delta = E1000_READ_REG(hw, E1000_TPT); 264 e1000g_ksp->Tpt.value.ul += hw->mac.tx_packet_delta; 265 266 /* 267 * The 64-bit register will reset whenever the upper 268 * 32 bits are read. So we need to read the lower 269 * 32 bits first, then read the upper 32 bits. 270 */ 271 low_val = E1000_READ_REG(hw, E1000_GORCL); 272 high_val = E1000_READ_REG(hw, E1000_GORCH); 273 val = (uint64_t)e1000g_ksp->Gorh.value.ul << 32 | 274 (uint64_t)e1000g_ksp->Gorl.value.ul; 275 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 276 e1000g_ksp->Gorl.value.ul = (uint32_t)val; 277 e1000g_ksp->Gorh.value.ul = (uint32_t)(val >> 32); 278 279 low_val = E1000_READ_REG(hw, E1000_GOTCL); 280 high_val = E1000_READ_REG(hw, E1000_GOTCH); 281 val = (uint64_t)e1000g_ksp->Goth.value.ul << 32 | 282 (uint64_t)e1000g_ksp->Gotl.value.ul; 283 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 284 e1000g_ksp->Gotl.value.ul = (uint32_t)val; 285 e1000g_ksp->Goth.value.ul = (uint32_t)(val >> 32); 286 287 low_val = E1000_READ_REG(hw, E1000_TORL); 288 high_val = E1000_READ_REG(hw, E1000_TORH); 289 val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 290 (uint64_t)e1000g_ksp->Torl.value.ul; 291 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 292 e1000g_ksp->Torl.value.ul = (uint32_t)val; 293 e1000g_ksp->Torh.value.ul = (uint32_t)(val >> 32); 294 295 low_val = E1000_READ_REG(hw, E1000_TOTL); 296 high_val = E1000_READ_REG(hw, E1000_TOTH); 297 val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 298 (uint64_t)e1000g_ksp->Totl.value.ul; 299 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 300 e1000g_ksp->Totl.value.ul = (uint32_t)val; 301 e1000g_ksp->Toth.value.ul = (uint32_t)(val >> 32); 302 303 rw_exit(&Adapter->chip_lock); 304 305 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 306 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 307 308 return (0); 309 } 310 311 int 312 e1000g_m_stat(void *arg, uint_t stat, uint64_t *val) 313 { 314 struct e1000g *Adapter = (struct e1000g *)arg; 315 struct e1000_hw *hw = &Adapter->shared; 316 p_e1000g_stat_t e1000g_ksp; 317 uint32_t low_val, high_val; 318 319 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 320 321 rw_enter(&Adapter->chip_lock, RW_READER); 322 323 switch (stat) { 324 case MAC_STAT_IFSPEED: 325 *val = Adapter->link_speed * 1000000ull; 326 break; 327 328 case MAC_STAT_MULTIRCV: 329 e1000g_ksp->Mprc.value.ul += 330 E1000_READ_REG(hw, E1000_MPRC); 331 *val = e1000g_ksp->Mprc.value.ul; 332 break; 333 334 case MAC_STAT_BRDCSTRCV: 335 e1000g_ksp->Bprc.value.ul += 336 E1000_READ_REG(hw, E1000_BPRC); 337 *val = e1000g_ksp->Bprc.value.ul; 338 break; 339 340 case MAC_STAT_MULTIXMT: 341 e1000g_ksp->Mptc.value.ul += 342 E1000_READ_REG(hw, E1000_MPTC); 343 *val = e1000g_ksp->Mptc.value.ul; 344 break; 345 346 case MAC_STAT_BRDCSTXMT: 347 e1000g_ksp->Bptc.value.ul += 348 E1000_READ_REG(hw, E1000_BPTC); 349 *val = e1000g_ksp->Bptc.value.ul; 350 break; 351 352 case MAC_STAT_NORCVBUF: 353 e1000g_ksp->Rnbc.value.ul += 354 E1000_READ_REG(hw, E1000_RNBC); 355 *val = e1000g_ksp->Rnbc.value.ul; 356 break; 357 358 case MAC_STAT_IERRORS: 359 e1000g_ksp->Rxerrc.value.ul += 360 E1000_READ_REG(hw, E1000_RXERRC); 361 e1000g_ksp->Algnerrc.value.ul += 362 E1000_READ_REG(hw, E1000_ALGNERRC); 363 e1000g_ksp->Rlec.value.ul += 364 E1000_READ_REG(hw, E1000_RLEC); 365 e1000g_ksp->Crcerrs.value.ul += 366 E1000_READ_REG(hw, E1000_CRCERRS); 367 e1000g_ksp->Cexterr.value.ul += 368 E1000_READ_REG(hw, E1000_CEXTERR); 369 *val = e1000g_ksp->Rxerrc.value.ul + 370 e1000g_ksp->Algnerrc.value.ul + 371 e1000g_ksp->Rlec.value.ul + 372 e1000g_ksp->Crcerrs.value.ul + 373 e1000g_ksp->Cexterr.value.ul; 374 break; 375 376 case MAC_STAT_NOXMTBUF: 377 *val = Adapter->tx_ring->stat_no_desc; 378 break; 379 380 case MAC_STAT_OERRORS: 381 e1000g_ksp->Ecol.value.ul += 382 E1000_READ_REG(hw, E1000_ECOL); 383 *val = e1000g_ksp->Ecol.value.ul; 384 break; 385 386 case MAC_STAT_COLLISIONS: 387 e1000g_ksp->Colc.value.ul += 388 E1000_READ_REG(hw, E1000_COLC); 389 *val = e1000g_ksp->Colc.value.ul; 390 break; 391 392 case MAC_STAT_RBYTES: 393 /* 394 * The 64-bit register will reset whenever the upper 395 * 32 bits are read. So we need to read the lower 396 * 32 bits first, then read the upper 32 bits. 397 */ 398 low_val = E1000_READ_REG(hw, E1000_TORL); 399 high_val = E1000_READ_REG(hw, E1000_TORH); 400 *val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 401 (uint64_t)e1000g_ksp->Torl.value.ul; 402 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 403 404 e1000g_ksp->Torl.value.ul = (uint32_t)*val; 405 e1000g_ksp->Torh.value.ul = (uint32_t)(*val >> 32); 406 break; 407 408 case MAC_STAT_IPACKETS: 409 e1000g_ksp->Tpr.value.ul += 410 E1000_READ_REG(hw, E1000_TPR); 411 *val = e1000g_ksp->Tpr.value.ul; 412 break; 413 414 case MAC_STAT_OBYTES: 415 /* 416 * The 64-bit register will reset whenever the upper 417 * 32 bits are read. So we need to read the lower 418 * 32 bits first, then read the upper 32 bits. 419 */ 420 low_val = E1000_READ_REG(hw, E1000_TOTL); 421 high_val = E1000_READ_REG(hw, E1000_TOTH); 422 *val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 423 (uint64_t)e1000g_ksp->Totl.value.ul; 424 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 425 426 e1000g_ksp->Totl.value.ul = (uint32_t)*val; 427 e1000g_ksp->Toth.value.ul = (uint32_t)(*val >> 32); 428 break; 429 430 case MAC_STAT_OPACKETS: 431 e1000g_ksp->Tpt.value.ul += 432 E1000_READ_REG(hw, E1000_TPT); 433 *val = e1000g_ksp->Tpt.value.ul; 434 break; 435 436 case ETHER_STAT_ALIGN_ERRORS: 437 e1000g_ksp->Algnerrc.value.ul += 438 E1000_READ_REG(hw, E1000_ALGNERRC); 439 *val = e1000g_ksp->Algnerrc.value.ul; 440 break; 441 442 case ETHER_STAT_FCS_ERRORS: 443 e1000g_ksp->Crcerrs.value.ul += 444 E1000_READ_REG(hw, E1000_CRCERRS); 445 *val = e1000g_ksp->Crcerrs.value.ul; 446 break; 447 448 case ETHER_STAT_SQE_ERRORS: 449 e1000g_ksp->Sec.value.ul += 450 E1000_READ_REG(hw, E1000_SEC); 451 *val = e1000g_ksp->Sec.value.ul; 452 break; 453 454 case ETHER_STAT_CARRIER_ERRORS: 455 e1000g_ksp->Cexterr.value.ul += 456 E1000_READ_REG(hw, E1000_CEXTERR); 457 *val = e1000g_ksp->Cexterr.value.ul; 458 break; 459 460 case ETHER_STAT_EX_COLLISIONS: 461 e1000g_ksp->Ecol.value.ul += 462 E1000_READ_REG(hw, E1000_ECOL); 463 *val = e1000g_ksp->Ecol.value.ul; 464 break; 465 466 case ETHER_STAT_TX_LATE_COLLISIONS: 467 e1000g_ksp->Latecol.value.ul += 468 E1000_READ_REG(hw, E1000_LATECOL); 469 *val = e1000g_ksp->Latecol.value.ul; 470 break; 471 472 case ETHER_STAT_DEFER_XMTS: 473 e1000g_ksp->Dc.value.ul += 474 E1000_READ_REG(hw, E1000_DC); 475 *val = e1000g_ksp->Dc.value.ul; 476 break; 477 478 case ETHER_STAT_FIRST_COLLISIONS: 479 e1000g_ksp->Scc.value.ul += 480 E1000_READ_REG(hw, E1000_SCC); 481 *val = e1000g_ksp->Scc.value.ul; 482 break; 483 484 case ETHER_STAT_MULTI_COLLISIONS: 485 e1000g_ksp->Mcc.value.ul += 486 E1000_READ_REG(hw, E1000_MCC); 487 *val = e1000g_ksp->Mcc.value.ul; 488 break; 489 490 case ETHER_STAT_MACRCV_ERRORS: 491 e1000g_ksp->Rxerrc.value.ul += 492 E1000_READ_REG(hw, E1000_RXERRC); 493 *val = e1000g_ksp->Rxerrc.value.ul; 494 break; 495 496 case ETHER_STAT_MACXMT_ERRORS: 497 e1000g_ksp->Ecol.value.ul += 498 E1000_READ_REG(hw, E1000_ECOL); 499 *val = e1000g_ksp->Ecol.value.ul; 500 break; 501 502 case ETHER_STAT_TOOLONG_ERRORS: 503 e1000g_ksp->Roc.value.ul += 504 E1000_READ_REG(hw, E1000_ROC); 505 *val = e1000g_ksp->Roc.value.ul; 506 break; 507 508 case ETHER_STAT_XCVR_ADDR: 509 /* The Internal PHY's MDI address for each MAC is 1 */ 510 *val = 1; 511 break; 512 513 case ETHER_STAT_XCVR_ID: 514 *val = hw->phy.id | hw->phy.revision; 515 break; 516 517 case ETHER_STAT_XCVR_INUSE: 518 switch (Adapter->link_speed) { 519 case SPEED_1000: 520 *val = 521 (hw->media_type == e1000_media_type_copper) ? 522 XCVR_1000T : XCVR_1000X; 523 break; 524 case SPEED_100: 525 *val = 526 (hw->media_type == e1000_media_type_copper) ? 527 (Adapter->phy_status & MII_SR_100T4_CAPS) ? 528 XCVR_100T4 : XCVR_100T2 : XCVR_100X; 529 break; 530 case SPEED_10: 531 *val = XCVR_10; 532 break; 533 default: 534 *val = XCVR_NONE; 535 break; 536 } 537 break; 538 539 case ETHER_STAT_CAP_1000FDX: 540 *val = ((Adapter->phy_ext_status & IEEE_ESR_1000T_FD_CAPS) || 541 (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS)) ? 1 : 0; 542 break; 543 544 case ETHER_STAT_CAP_1000HDX: 545 *val = ((Adapter->phy_ext_status & IEEE_ESR_1000T_HD_CAPS) || 546 (Adapter->phy_ext_status & IEEE_ESR_1000X_HD_CAPS)) ? 1 : 0; 547 break; 548 549 case ETHER_STAT_CAP_100FDX: 550 *val = ((Adapter->phy_status & MII_SR_100X_FD_CAPS) || 551 (Adapter->phy_status & MII_SR_100T2_FD_CAPS)) ? 1 : 0; 552 break; 553 554 case ETHER_STAT_CAP_100HDX: 555 *val = ((Adapter->phy_status & MII_SR_100X_HD_CAPS) || 556 (Adapter->phy_status & MII_SR_100T2_HD_CAPS)) ? 1 : 0; 557 break; 558 559 case ETHER_STAT_CAP_10FDX: 560 *val = (Adapter->phy_status & MII_SR_10T_FD_CAPS) ? 1 : 0; 561 break; 562 563 case ETHER_STAT_CAP_10HDX: 564 *val = (Adapter->phy_status & MII_SR_10T_HD_CAPS) ? 1 : 0; 565 break; 566 567 case ETHER_STAT_CAP_ASMPAUSE: 568 *val = (Adapter->phy_an_adv & NWAY_AR_ASM_DIR) ? 1 : 0; 569 break; 570 571 case ETHER_STAT_CAP_PAUSE: 572 *val = (Adapter->phy_an_adv & NWAY_AR_PAUSE) ? 1 : 0; 573 break; 574 575 case ETHER_STAT_CAP_AUTONEG: 576 *val = (Adapter->phy_status & MII_SR_AUTONEG_CAPS) ? 1 : 0; 577 break; 578 579 case ETHER_STAT_ADV_CAP_1000FDX: 580 *val = (Adapter->phy_1000t_ctrl & CR_1000T_FD_CAPS) ? 1 : 0; 581 break; 582 583 case ETHER_STAT_ADV_CAP_1000HDX: 584 *val = (Adapter->phy_1000t_ctrl & CR_1000T_HD_CAPS) ? 1 : 0; 585 break; 586 587 case ETHER_STAT_ADV_CAP_100FDX: 588 *val = (Adapter->phy_an_adv & NWAY_AR_100TX_FD_CAPS) ? 1 : 0; 589 break; 590 591 case ETHER_STAT_ADV_CAP_100HDX: 592 *val = (Adapter->phy_an_adv & NWAY_AR_100TX_HD_CAPS) ? 1 : 0; 593 break; 594 595 case ETHER_STAT_ADV_CAP_10FDX: 596 *val = (Adapter->phy_an_adv & NWAY_AR_10T_FD_CAPS) ? 1 : 0; 597 break; 598 599 case ETHER_STAT_ADV_CAP_10HDX: 600 *val = (Adapter->phy_an_adv & NWAY_AR_10T_HD_CAPS) ? 1 : 0; 601 break; 602 603 case ETHER_STAT_ADV_CAP_ASMPAUSE: 604 *val = (Adapter->phy_an_adv & NWAY_AR_ASM_DIR) ? 1 : 0; 605 break; 606 607 case ETHER_STAT_ADV_CAP_PAUSE: 608 *val = (Adapter->phy_an_adv & NWAY_AR_PAUSE) ? 1 : 0; 609 break; 610 611 case ETHER_STAT_ADV_CAP_AUTONEG: 612 *val = hw->mac.autoneg; 613 break; 614 615 case ETHER_STAT_LP_CAP_1000FDX: 616 *val = 617 (Adapter->phy_1000t_status & SR_1000T_LP_FD_CAPS) ? 1 : 0; 618 break; 619 620 case ETHER_STAT_LP_CAP_1000HDX: 621 *val = 622 (Adapter->phy_1000t_status & SR_1000T_LP_HD_CAPS) ? 1 : 0; 623 break; 624 625 case ETHER_STAT_LP_CAP_100FDX: 626 *val = (Adapter->phy_lp_able & NWAY_LPAR_100TX_FD_CAPS) ? 1 : 0; 627 break; 628 629 case ETHER_STAT_LP_CAP_100HDX: 630 *val = (Adapter->phy_lp_able & NWAY_LPAR_100TX_HD_CAPS) ? 1 : 0; 631 break; 632 633 case ETHER_STAT_LP_CAP_10FDX: 634 *val = (Adapter->phy_lp_able & NWAY_LPAR_10T_FD_CAPS) ? 1 : 0; 635 break; 636 637 case ETHER_STAT_LP_CAP_10HDX: 638 *val = (Adapter->phy_lp_able & NWAY_LPAR_10T_HD_CAPS) ? 1 : 0; 639 break; 640 641 case ETHER_STAT_LP_CAP_ASMPAUSE: 642 *val = (Adapter->phy_lp_able & NWAY_LPAR_ASM_DIR) ? 1 : 0; 643 break; 644 645 case ETHER_STAT_LP_CAP_PAUSE: 646 *val = (Adapter->phy_lp_able & NWAY_LPAR_PAUSE) ? 1 : 0; 647 break; 648 649 case ETHER_STAT_LP_CAP_AUTONEG: 650 *val = (Adapter->phy_an_exp & NWAY_ER_LP_NWAY_CAPS) ? 1 : 0; 651 break; 652 653 case ETHER_STAT_LINK_ASMPAUSE: 654 *val = (Adapter->phy_an_adv & NWAY_AR_ASM_DIR) ? 1 : 0; 655 break; 656 657 case ETHER_STAT_LINK_PAUSE: 658 *val = (Adapter->phy_an_adv & NWAY_AR_PAUSE) ? 1 : 0; 659 break; 660 661 case ETHER_STAT_LINK_AUTONEG: 662 *val = (Adapter->phy_ctrl & MII_CR_AUTO_NEG_EN) ? 1 : 0; 663 break; 664 665 case ETHER_STAT_LINK_DUPLEX: 666 *val = (Adapter->link_duplex == FULL_DUPLEX) ? 667 LINK_DUPLEX_FULL : LINK_DUPLEX_HALF; 668 break; 669 670 default: 671 rw_exit(&Adapter->chip_lock); 672 return (ENOTSUP); 673 } 674 675 rw_exit(&Adapter->chip_lock); 676 677 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 678 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 679 680 return (0); 681 } 682 683 /* 684 * e1000g_init_stats - initialize kstat data structures 685 * 686 * This routine will create and initialize the driver private 687 * statistics counters. 688 */ 689 int 690 e1000g_init_stats(struct e1000g *Adapter) 691 { 692 kstat_t *ksp; 693 p_e1000g_stat_t e1000g_ksp; 694 695 /* 696 * Create and init kstat 697 */ 698 ksp = kstat_create(WSNAME, ddi_get_instance(Adapter->dip), 699 "statistics", "net", KSTAT_TYPE_NAMED, 700 sizeof (e1000g_stat_t) / sizeof (kstat_named_t), 0); 701 702 if (ksp == NULL) { 703 e1000g_log(Adapter, CE_WARN, 704 "Could not create kernel statistics\n"); 705 return (DDI_FAILURE); 706 } 707 708 Adapter->e1000g_ksp = ksp; /* Fill in the Adapters ksp */ 709 710 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 711 712 /* 713 * Initialize all the statistics 714 */ 715 kstat_named_init(&e1000g_ksp->link_speed, "link_speed", 716 KSTAT_DATA_ULONG); 717 kstat_named_init(&e1000g_ksp->reset_count, "Reset Count", 718 KSTAT_DATA_ULONG); 719 720 kstat_named_init(&e1000g_ksp->rx_error, "Rx Error", 721 KSTAT_DATA_ULONG); 722 kstat_named_init(&e1000g_ksp->rx_esballoc_fail, "Rx Desballoc Failure", 723 KSTAT_DATA_ULONG); 724 kstat_named_init(&e1000g_ksp->rx_exceed_pkt, "Rx Exceed Max Pkt Count", 725 KSTAT_DATA_ULONG); 726 kstat_named_init(&e1000g_ksp->rx_allocb_fail, "Rx Allocb Failure", 727 KSTAT_DATA_ULONG); 728 729 kstat_named_init(&e1000g_ksp->tx_no_desc, "Tx No Desc", 730 KSTAT_DATA_ULONG); 731 kstat_named_init(&e1000g_ksp->tx_no_swpkt, "Tx No Buffer", 732 KSTAT_DATA_ULONG); 733 kstat_named_init(&e1000g_ksp->tx_send_fail, "Tx Send Failure", 734 KSTAT_DATA_ULONG); 735 kstat_named_init(&e1000g_ksp->tx_over_size, "Tx Pkt Over Size", 736 KSTAT_DATA_ULONG); 737 kstat_named_init(&e1000g_ksp->tx_reschedule, "Tx Reschedule", 738 KSTAT_DATA_ULONG); 739 740 kstat_named_init(&e1000g_ksp->Mpc, "Recv_Missed_Packets", 741 KSTAT_DATA_ULONG); 742 kstat_named_init(&e1000g_ksp->Symerrs, "Recv_Symbol_Errors", 743 KSTAT_DATA_ULONG); 744 kstat_named_init(&e1000g_ksp->Rlec, "Recv_Length_Errors", 745 KSTAT_DATA_ULONG); 746 kstat_named_init(&e1000g_ksp->Xonrxc, "XONs_Recvd", 747 KSTAT_DATA_ULONG); 748 kstat_named_init(&e1000g_ksp->Xontxc, "XONs_Xmitd", 749 KSTAT_DATA_ULONG); 750 kstat_named_init(&e1000g_ksp->Xoffrxc, "XOFFs_Recvd", 751 KSTAT_DATA_ULONG); 752 kstat_named_init(&e1000g_ksp->Xofftxc, "XOFFs_Xmitd", 753 KSTAT_DATA_ULONG); 754 kstat_named_init(&e1000g_ksp->Fcruc, "Recv_Unsupport_FC_Pkts", 755 KSTAT_DATA_ULONG); 756 kstat_named_init(&e1000g_ksp->Prc64, "Pkts_Recvd_( 64b)", 757 KSTAT_DATA_ULONG); 758 kstat_named_init(&e1000g_ksp->Prc127, "Pkts_Recvd_( 65- 127b)", 759 KSTAT_DATA_ULONG); 760 kstat_named_init(&e1000g_ksp->Prc255, "Pkts_Recvd_( 127- 255b)", 761 KSTAT_DATA_ULONG); 762 kstat_named_init(&e1000g_ksp->Prc511, "Pkts_Recvd_( 256- 511b)", 763 KSTAT_DATA_ULONG); 764 kstat_named_init(&e1000g_ksp->Prc1023, "Pkts_Recvd_( 511-1023b)", 765 KSTAT_DATA_ULONG); 766 kstat_named_init(&e1000g_ksp->Prc1522, "Pkts_Recvd_(1024-1522b)", 767 KSTAT_DATA_ULONG); 768 kstat_named_init(&e1000g_ksp->Gprc, "Good_Pkts_Recvd", 769 KSTAT_DATA_ULONG); 770 kstat_named_init(&e1000g_ksp->Gptc, "Good_Pkts_Xmitd", 771 KSTAT_DATA_ULONG); 772 kstat_named_init(&e1000g_ksp->Gorl, "Good_Octets_Recvd_Lo", 773 KSTAT_DATA_ULONG); 774 kstat_named_init(&e1000g_ksp->Gorh, "Good_Octets_Recvd_Hi", 775 KSTAT_DATA_ULONG); 776 kstat_named_init(&e1000g_ksp->Gotl, "Good_Octets_Xmitd_Lo", 777 KSTAT_DATA_ULONG); 778 kstat_named_init(&e1000g_ksp->Goth, "Good_Octets_Xmitd_Hi", 779 KSTAT_DATA_ULONG); 780 kstat_named_init(&e1000g_ksp->Ruc, "Recv_Undersize", 781 KSTAT_DATA_ULONG); 782 kstat_named_init(&e1000g_ksp->Rfc, "Recv_Frag", 783 KSTAT_DATA_ULONG); 784 kstat_named_init(&e1000g_ksp->Roc, "Recv_Oversize", 785 KSTAT_DATA_ULONG); 786 kstat_named_init(&e1000g_ksp->Rjc, "Recv_Jabber", 787 KSTAT_DATA_ULONG); 788 kstat_named_init(&e1000g_ksp->Torl, "Total_Octets_Recvd_Lo", 789 KSTAT_DATA_ULONG); 790 kstat_named_init(&e1000g_ksp->Torh, "Total_Octets_Recvd_Hi", 791 KSTAT_DATA_ULONG); 792 kstat_named_init(&e1000g_ksp->Totl, "Total_Octets_Xmitd_Lo", 793 KSTAT_DATA_ULONG); 794 kstat_named_init(&e1000g_ksp->Toth, "Total_Octets_Xmitd_Hi", 795 KSTAT_DATA_ULONG); 796 kstat_named_init(&e1000g_ksp->Tpr, "Total_Packets_Recvd", 797 KSTAT_DATA_ULONG); 798 kstat_named_init(&e1000g_ksp->Tpt, "Total_Packets_Xmitd", 799 KSTAT_DATA_ULONG); 800 kstat_named_init(&e1000g_ksp->Ptc64, "Pkts_Xmitd_( 64b)", 801 KSTAT_DATA_ULONG); 802 kstat_named_init(&e1000g_ksp->Ptc127, "Pkts_Xmitd_( 65- 127b)", 803 KSTAT_DATA_ULONG); 804 kstat_named_init(&e1000g_ksp->Ptc255, "Pkts_Xmitd_( 128- 255b)", 805 KSTAT_DATA_ULONG); 806 kstat_named_init(&e1000g_ksp->Ptc511, "Pkts_Xmitd_( 255- 511b)", 807 KSTAT_DATA_ULONG); 808 kstat_named_init(&e1000g_ksp->Ptc1023, "Pkts_Xmitd_( 512-1023b)", 809 KSTAT_DATA_ULONG); 810 kstat_named_init(&e1000g_ksp->Ptc1522, "Pkts_Xmitd_(1024-1522b)", 811 KSTAT_DATA_ULONG); 812 kstat_named_init(&e1000g_ksp->Tncrs, "Xmit_with_No_CRS", 813 KSTAT_DATA_ULONG); 814 kstat_named_init(&e1000g_ksp->Tsctc, "Xmit_TCP_Seg_Contexts", 815 KSTAT_DATA_ULONG); 816 kstat_named_init(&e1000g_ksp->Tsctfc, "Xmit_TCP_Seg_Contexts_Fail", 817 KSTAT_DATA_ULONG); 818 819 #ifdef E1000G_DEBUG 820 kstat_named_init(&e1000g_ksp->rx_none, "Rx No Data", 821 KSTAT_DATA_ULONG); 822 kstat_named_init(&e1000g_ksp->rx_multi_desc, "Rx Span Multi Desc", 823 KSTAT_DATA_ULONG); 824 kstat_named_init(&e1000g_ksp->rx_no_freepkt, "Rx Freelist Empty", 825 KSTAT_DATA_ULONG); 826 kstat_named_init(&e1000g_ksp->rx_avail_freepkt, "Rx Freelist Avail", 827 KSTAT_DATA_ULONG); 828 829 kstat_named_init(&e1000g_ksp->tx_under_size, "Tx Pkt Under Size", 830 KSTAT_DATA_ULONG); 831 kstat_named_init(&e1000g_ksp->tx_exceed_frags, "Tx Exceed Max Frags", 832 KSTAT_DATA_ULONG); 833 kstat_named_init(&e1000g_ksp->tx_empty_frags, "Tx Empty Frags", 834 KSTAT_DATA_ULONG); 835 kstat_named_init(&e1000g_ksp->tx_recycle, "Tx Recycle", 836 KSTAT_DATA_ULONG); 837 kstat_named_init(&e1000g_ksp->tx_recycle_intr, "Tx Recycle Intr", 838 KSTAT_DATA_ULONG); 839 kstat_named_init(&e1000g_ksp->tx_recycle_retry, "Tx Recycle Retry", 840 KSTAT_DATA_ULONG); 841 kstat_named_init(&e1000g_ksp->tx_recycle_none, "Tx Recycled None", 842 KSTAT_DATA_ULONG); 843 kstat_named_init(&e1000g_ksp->tx_copy, "Tx Send Copy", 844 KSTAT_DATA_ULONG); 845 kstat_named_init(&e1000g_ksp->tx_bind, "Tx Send Bind", 846 KSTAT_DATA_ULONG); 847 kstat_named_init(&e1000g_ksp->tx_multi_copy, "Tx Copy Multi Frags", 848 KSTAT_DATA_ULONG); 849 kstat_named_init(&e1000g_ksp->tx_multi_cookie, "Tx Bind Multi Cookies", 850 KSTAT_DATA_ULONG); 851 kstat_named_init(&e1000g_ksp->tx_lack_desc, "Tx Desc Insufficient", 852 KSTAT_DATA_ULONG); 853 #endif 854 855 /* 856 * Function to provide kernel stat update on demand 857 */ 858 ksp->ks_update = e1000g_update_stats; 859 860 /* 861 * Pointer into provider's raw statistics 862 */ 863 ksp->ks_private = (void *)Adapter; 864 865 /* 866 * Add kstat to systems kstat chain 867 */ 868 kstat_install(ksp); 869 870 return (DDI_SUCCESS); 871 } 872