1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 2001 by Sun Microsystems, Inc. 24 * All rights reserved. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #include <sys/promif.h> 30 #include <sys/promimpl.h> 31 32 /* 33 * This file contains the implementations of all Starfire-specific 34 * promif routines. 35 */ 36 37 /* 38 * Probe all of the devices on a board. The board number is 39 * computed from cpuid. All of the cpus on the board are 40 * brought into OBP's slave idle loop but are not started. 41 * Returns zero for success and non-zero for failure. 42 */ 43 int 44 prom_starfire_add_brd(uint_t cpuid) 45 { 46 cell_t ci[5]; 47 int rv; 48 49 ci[0] = p1275_ptr2cell("SUNW,UE10000,add-brd"); /* name */ 50 ci[1] = (cell_t)1; /* #argument cells */ 51 ci[2] = (cell_t)1; /* #result cells */ 52 ci[3] = p1275_uint2cell(cpuid); 53 54 promif_preprom(); 55 rv = p1275_cif_handler(&ci); 56 promif_postprom(); 57 58 return ((rv) ? -1 : p1275_cell2int(ci[4])); 59 } 60 61 /* 62 * Prune the device tree nodes for all devices on the board 63 * represented by brdnum. Returns zero for success and non-zero 64 * for failure. 65 */ 66 int 67 prom_starfire_rm_brd(uint_t brdnum) 68 { 69 cell_t ci[5]; 70 int rv; 71 72 ci[0] = p1275_ptr2cell("SUNW,UE10000,rm-brd"); /* name */ 73 ci[1] = (cell_t)1; /* #argument cells */ 74 ci[2] = (cell_t)1; /* #result cells */ 75 ci[3] = p1275_uint2cell(brdnum); 76 77 promif_preprom(); 78 rv = p1275_cif_handler(&ci); 79 promif_postprom(); 80 81 return ((rv) ? -1 : p1275_cell2int(ci[4])); 82 } 83 84 /* 85 * Prepare firmware internal state for the inclusion of the 86 * cpu represented by cpuid. This operation has no effect on 87 * the cpu hardware or behavior in the client. 88 */ 89 void 90 prom_starfire_add_cpu(uint_t cpuid) 91 { 92 cell_t ci[4]; 93 94 ci[0] = p1275_ptr2cell("SUNW,UE10000,add-cpu"); /* name */ 95 ci[1] = (cell_t)1; /* #argument cells */ 96 ci[2] = (cell_t)0; /* #result cells */ 97 ci[3] = p1275_uint2cell(cpuid); 98 99 promif_preprom(); 100 (void) p1275_cif_handler(&ci); 101 promif_postprom(); 102 } 103 104 /* 105 * Prepare firmware internal state for the departure of the cpu 106 * represented by cpuid. 107 */ 108 void 109 prom_starfire_rm_cpu(uint_t cpuid) 110 { 111 cell_t ci[4]; 112 113 ci[0] = p1275_ptr2cell("SUNW,UE10000,rm-cpu"); /* name */ 114 ci[1] = (cell_t)1; /* #argument cells */ 115 ci[2] = (cell_t)0; /* #result cells */ 116 ci[3] = p1275_uint2cell(cpuid); 117 118 promif_preprom(); 119 (void) p1275_cif_handler(&ci); 120 promif_postprom(); 121 } 122 123 /* 124 * Mark the cpu represented by cpuid as cpu0. Returns zero for 125 * success and non-zero for failure. 126 */ 127 int 128 prom_starfire_move_cpu0(uint_t cpuid) 129 { 130 cell_t ci[5]; 131 int rv; 132 133 ci[0] = p1275_ptr2cell("SUNW,UE10000,move-cpu0"); /* name */ 134 ci[1] = (cell_t)1; /* #argument cells */ 135 ci[2] = (cell_t)1; /* #result cells */ 136 ci[3] = p1275_uint2cell(cpuid); 137 138 promif_preprom(); 139 rv = p1275_cif_handler(&ci); 140 promif_postprom(); 141 142 return ((rv) ? -1 : p1275_cell2int(ci[4])); 143 } 144 145 /* 146 * Perform initialization steps required for the console before 147 * moving cpu0. The console uses the bootbus SRAM of cpu0 for both 148 * input and output. The offsets of the console buffers are initialized 149 * for the bootbus SRAM of the new cpu0 represented by cpuid. 150 */ 151 void 152 prom_starfire_init_console(uint_t cpuid) 153 { 154 cell_t ci[4]; 155 156 ci[0] = p1275_ptr2cell("SUNW,UE10000,init-console"); /* name */ 157 ci[1] = (cell_t)1; /* #argument cells */ 158 ci[2] = (cell_t)0; /* #result cells */ 159 ci[3] = p1275_uint2cell(cpuid); 160 161 promif_preprom(); 162 (void) p1275_cif_handler(&ci); 163 promif_postprom(); 164 } 165