xref: /titanic_50/usr/src/uts/sun4v/sys/dr_cpu.h (revision 0c86d1bb954dd114dc697724f09481f790a39f71)
11ae08745Sheppo /*
21ae08745Sheppo  * CDDL HEADER START
31ae08745Sheppo  *
41ae08745Sheppo  * The contents of this file are subject to the terms of the
51ae08745Sheppo  * Common Development and Distribution License (the "License").
61ae08745Sheppo  * You may not use this file except in compliance with the License.
71ae08745Sheppo  *
81ae08745Sheppo  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
91ae08745Sheppo  * or http://www.opensolaris.org/os/licensing.
101ae08745Sheppo  * See the License for the specific language governing permissions
111ae08745Sheppo  * and limitations under the License.
121ae08745Sheppo  *
131ae08745Sheppo  * When distributing Covered Code, include this CDDL HEADER in each
141ae08745Sheppo  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
151ae08745Sheppo  * If applicable, add the following below this CDDL HEADER, with the
161ae08745Sheppo  * fields enclosed by brackets "[]" replaced with your own identifying
171ae08745Sheppo  * information: Portions Copyright [yyyy] [name of copyright owner]
181ae08745Sheppo  *
191ae08745Sheppo  * CDDL HEADER END
201ae08745Sheppo  */
211ae08745Sheppo 
221ae08745Sheppo /*
23*0c86d1bbSrsmaeda  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
241ae08745Sheppo  * Use is subject to license terms.
251ae08745Sheppo  */
261ae08745Sheppo 
271ae08745Sheppo #ifndef _DR_CPU_H
281ae08745Sheppo #define	_DR_CPU_H
291ae08745Sheppo 
301ae08745Sheppo #pragma ident	"%Z%%M%	%I%	%E% SMI"
311ae08745Sheppo 
321ae08745Sheppo /*
331ae08745Sheppo  * CPU DR Control Protocol
341ae08745Sheppo  */
351ae08745Sheppo 
361ae08745Sheppo #ifdef __cplusplus
371ae08745Sheppo extern "C" {
381ae08745Sheppo #endif
391ae08745Sheppo 
401ae08745Sheppo /*
411ae08745Sheppo  * CPU DR Message Header
421ae08745Sheppo  */
431ae08745Sheppo typedef struct {
441ae08745Sheppo 	uint64_t	req_num;	/* request number */
451ae08745Sheppo 	uint32_t	msg_type;	/* message type */
461ae08745Sheppo 	uint32_t	num_records;	/* number of records */
471ae08745Sheppo } dr_cpu_hdr_t;
481ae08745Sheppo 
491ae08745Sheppo /*
501ae08745Sheppo  * CPU command and response messages
511ae08745Sheppo  */
521ae08745Sheppo 
531ae08745Sheppo #define	DR_CPU_DS_ID		"dr-cpu"
541ae08745Sheppo 
551ae08745Sheppo #define	DR_CPU_CONFIGURE	('C')
561ae08745Sheppo #define	DR_CPU_UNCONFIGURE	('U')
571ae08745Sheppo #define	DR_CPU_FORCE_UNCONFIG	('F')
581ae08745Sheppo #define	DR_CPU_STATUS		('S')
591ae08745Sheppo 
601ae08745Sheppo #define	DR_CPU_OK		('o')
611ae08745Sheppo #define	DR_CPU_ERROR		('e')
621ae08745Sheppo 
631ae08745Sheppo /*
641ae08745Sheppo  * Response Message
651ae08745Sheppo  */
661ae08745Sheppo typedef struct {
671ae08745Sheppo 	uint32_t	cpuid;		/* virtual CPU ID */
681ae08745Sheppo 	uint32_t	result;		/* result of the operation */
691ae08745Sheppo 	uint32_t	status;		/* status of the CPU */
701ae08745Sheppo 	uint32_t	string_off;	/* informational string offset */
711ae08745Sheppo } dr_cpu_stat_t;
721ae08745Sheppo 
731ae08745Sheppo /*
741ae08745Sheppo  * Result Codes
751ae08745Sheppo  */
761ae08745Sheppo #define	DR_CPU_RES_OK			0x0	/* operation succeeded */
771ae08745Sheppo #define	DR_CPU_RES_FAILURE		0x1	/* operation failed */
781ae08745Sheppo #define	DR_CPU_RES_BLOCKED		0x2	/* operation was blocked */
791ae08745Sheppo #define	DR_CPU_RES_CPU_NOT_RESPONDING	0x3	/* CPU was not responding */
801ae08745Sheppo #define	DR_CPU_RES_NOT_IN_MD		0x4	/* CPU not defined in MD */
811ae08745Sheppo 
821ae08745Sheppo /*
831ae08745Sheppo  * Status Codes
841ae08745Sheppo  */
851ae08745Sheppo #define	DR_CPU_STAT_NOT_PRESENT		0x0	/* CPU ID not in MD */
861ae08745Sheppo #define	DR_CPU_STAT_UNCONFIGURED	0x1	/* CPU unconfigured */
871ae08745Sheppo #define	DR_CPU_STAT_CONFIGURED		0x2	/* CPU configured */
881ae08745Sheppo 
89*0c86d1bbSrsmaeda /*
90*0c86d1bbSrsmaeda  * Macros to access arrays that follow message header
91*0c86d1bbSrsmaeda  */
92*0c86d1bbSrsmaeda #define	DR_CPU_CMD_CPUIDS(_hdr)		((uint32_t *)((_hdr) + 1))
93*0c86d1bbSrsmaeda #define	DR_CPU_RESP_STATS(_hdr)		((dr_cpu_stat_t *)((_hdr) + 1))
94*0c86d1bbSrsmaeda 
951ae08745Sheppo #ifdef __cplusplus
961ae08745Sheppo }
971ae08745Sheppo #endif
981ae08745Sheppo 
991ae08745Sheppo #endif /* _DR_CPU_H */
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