1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_DRMACH_H_ 27 #define _SYS_DRMACH_H_ 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 #ifndef _ASM 36 #include <sys/types.h> 37 #include <sys/memlist.h> 38 #include <sys/processor.h> 39 #include <sys/cpuvar.h> 40 #include <sys/sbd_ioctl.h> 41 #include <sys/sysevent.h> 42 #include <sys/ddi.h> 43 #include <sys/sunddi.h> 44 #include <sys/sunndi.h> 45 #include <sys/ddi_impldefs.h> 46 #include <sys/pte.h> 47 #include <sys/opl.h> 48 #endif 49 50 51 #define MAX_BOARDS plat_max_boards() 52 #define MAX_CPU_UNITS_PER_BOARD plat_max_cpu_units_per_board() 53 #define MAX_MEM_UNITS_PER_BOARD plat_max_mem_units_per_board() 54 #define MAX_IO_UNITS_PER_BOARD plat_max_io_units_per_board() 55 #define MAX_CMP_UNITS_PER_BOARD plat_max_cmp_units_per_board() 56 /* 57 * DR uses MAX_CORES_PER_CMP as number of virtual CPU within a CMP 58 */ 59 #define MAX_CORES_PER_CMP OPL_MAX_CPU_PER_CMP 60 61 62 /* returned with drmach_board_find_devices callback */ 63 #define DRMACH_DEVTYPE_CPU "cpu" 64 #define DRMACH_DEVTYPE_MEM "memory" 65 #define DRMACH_DEVTYPE_PCI "pci" 66 67 #define FMEM_LOOP_START 1 68 #define FMEM_LOOP_COPY_READY 2 69 #define FMEM_LOOP_COPY_DONE 3 70 #define FMEM_LOOP_FMEM_READY 4 71 #define FMEM_LOOP_RENAME_DONE 5 72 #define FMEM_LOOP_DONE 6 73 #define FMEM_LOOP_EXIT 7 74 75 #define FMEM_NO_ERROR 0 76 #define FMEM_OBP_FAIL 1 77 #define FMEM_XC_TIMEOUT 2 78 #define FMEM_COPY_TIMEOUT 3 79 #define FMEM_SCF_BUSY 4 80 #define FMEM_RETRY_OUT 5 81 #define FMEM_TIMEOUT 6 82 #define FMEM_HW_ERROR 7 83 #define FMEM_TERMINATE 8 84 #define FMEM_COPY_ERROR 9 85 #define FMEM_SCF_ERR 10 86 87 #define SCF_CMD_BUSY 0x8000 88 #define SCF_STATUS_READY 0x8000 89 #define SCF_STATUS_SHUTDOWN 0x4000 90 #define SCF_STATUS_POFF 0x2000 91 #define SCF_STATUS_EVENT 0x1000 92 #define SCF_STATUS_TIMER_ADJUST 0x0800 93 #define SCF_STATUS_ALIVE 0x0400 94 #define SCF_STATUS_MODE_CHANGED 0x0200 95 #define SCF_STATUS_CMD_U_PARITY 0x0100 96 #define SCF_STATUS_CMD_RTN_CODE 0x00f0 97 #define SCF_STATUS_MODE_SWITCH 0x000c 98 #define SCF_STATUS_CMD_COMPLETE 0x0002 99 #define SCF_STATUS_CMD_L_PARITY 0x0001 100 101 #define SCF_RETRY_CNT 15 102 103 #ifndef _ASM 104 105 /* 106 * OPL platform specific routines currently only defined 107 * in opl.c and referenced by DR. 108 */ 109 110 typedef void *drmachid_t; 111 112 /* 113 * We have to split up the copy rename data structure 114 * into several pieces: 115 * 1. critical region that must be locked in TLB and must 116 * be physically contiguous/no ecache conflict. 117 * This region contains the assembly code that handles 118 * the rename programming, the slave code that loops 119 * until the master script completes and all data 120 * required to do the programming. 121 * 122 * It also contains the status of each CPU because the 123 * master must wait for all the slaves to get ready before 124 * it can program the SCF. 125 * 126 * We do not need the error code in the critical section. 127 * It is not set until the FMEM is done. 128 * 2. relocatable section that must be locked in TLB. All data 129 * referenced in this section must also be locked in TLB to 130 * avoid tlbmiss. 131 * 132 * We will also put everything else in this section even it 133 * does not need such protection. 134 */ 135 typedef struct { 136 int16_t scf_command; 137 int8_t scf_rsv1[2]; 138 int16_t scf_status; 139 int8_t scf_rsv2[2]; 140 int8_t scf_version; 141 int8_t scf_rsv3[3]; 142 int8_t scf_rsv4[4]; 143 uint8_t scf_tdata[16]; 144 uint8_t scf_rdata[16]; 145 } drmach_scf_regs_t; 146 147 148 149 typedef struct { 150 volatile uint_t stat; 151 volatile uint_t error; 152 int op; 153 #define OPL_FMEM_SCF_START 0x1 154 #define OPL_FMEM_MC_SUSPEND 0x2 155 } drmach_fmem_mbox_t; 156 157 typedef struct { 158 uint64_t scf_reg_base; 159 uint8_t scf_td[16]; 160 uint64_t save_log[8]; 161 uint64_t save_local[8]; 162 uint64_t pstate; 163 uint64_t delay; 164 int (*run)(void *arg, int cpuid); 165 int (*fmem)(void *arg, size_t sz); 166 int (*loop)(void *arg1, size_t sz, void *arg2); 167 void (*loop_rtn)(void *arg); 168 uint64_t inst_loop_ret; 169 int fmem_issued; 170 volatile uchar_t stat[NCPU]; 171 } drmach_copy_rename_critical_t; 172 173 typedef struct { 174 uint64_t s_copybasepa; 175 uint64_t t_copybasepa; 176 drmachid_t s_mem; 177 drmachid_t t_mem; 178 cpuset_t cpu_ready_set; 179 cpuset_t cpu_slave_set; 180 cpuset_t cpu_copy_set; 181 processorid_t cpuid; 182 drmach_fmem_mbox_t fmem_status; 183 volatile uchar_t error[NCPU]; 184 struct memlist *c_ml; 185 struct memlist *cpu_ml[NCPU]; 186 caddr_t locked_va; 187 tte_t locked_tte; 188 void (*mc_resume)(void); 189 int (*scf_fmem_end)(void); 190 int (*scf_fmem_cancel)(void); 191 uint64_t copy_delay; 192 uint64_t stick_freq; 193 uint64_t copy_wait_time; 194 processorid_t slowest_cpuid; 195 } drmach_copy_rename_data_t; 196 197 typedef struct { 198 uint64_t nbytes[NCPU]; 199 } drmach_cr_stat_t; 200 201 typedef struct { 202 drmach_copy_rename_critical_t *critical; 203 drmach_copy_rename_data_t *data; 204 caddr_t memlist_buffer; 205 struct memlist *free_mlist; 206 drmach_cr_stat_t *stat; 207 } drmach_copy_rename_program_t; 208 209 #define DRMACH_FMEM_LOCKED_PAGES 4 210 #define DRMACH_FMEM_DATA_PAGE 0 211 #define DRMACH_FMEM_CRITICAL_PAGE 1 212 #define DRMACH_FMEM_MLIST_PAGE 2 213 #define DRMACH_FMEM_STAT_PAGE 3 214 215 /* 216 * layout of the FMEM buffers: 217 * 1st 8k page 218 * +--------------------------------+ 219 * |drmach_copy_rename_program_t | 220 * +--------------------------------+ 221 * |drmach_copy_rename_data_t | 222 * | | 223 * +--------------------------------+ 224 * 225 * 2nd 8k page 226 * +--------------------------------+ 227 * |drmach_copy_rename_critical_t | 228 * | | 229 * +--------------------------------+ 230 * |run (drmach_copy_rename_prog__relocatable) 231 * |(roundup boundary to 1K) | 232 * +--------------------------------+ 233 * | fmem_script | 234 * |(roundup boundary to 1K) | 235 * +--------------------------------+ 236 * |loop_script | 237 * | | 238 * +--------------------------------+ 239 * |at least 1K NOP/0's | 240 * | | 241 * +--------------------------------+ 242 * 243 * 3rd 8k page 244 * +--------------------------------+ 245 * |memlist_buffer (free_mlist) | 246 * | | 247 * +--------------------------------+ 248 * 249 * 4th 8k page - drmach_cr_stat_t. 250 * 251 */ 252 253 typedef struct { 254 boolean_t assigned; 255 boolean_t powered; 256 boolean_t configured; 257 boolean_t busy; 258 boolean_t empty; 259 sbd_cond_t cond; 260 char type[MAXNAMELEN]; 261 char info[MAXPATHLEN]; /* TODO: what size? */ 262 } drmach_status_t; 263 264 typedef struct { 265 int size; 266 char *copts; 267 } drmach_opts_t; 268 269 typedef struct { 270 uint64_t mi_basepa; 271 uint64_t mi_size; 272 uint64_t mi_slice_size; 273 uint64_t mi_alignment_mask; 274 } drmach_mem_info_t; 275 276 extern sbd_error_t *drmach_mem_get_info(drmachid_t, drmach_mem_info_t *); 277 extern int drmach_board_is_floating(drmachid_t); 278 279 extern sbd_error_t *drmach_copy_rename_init( 280 drmachid_t dst_id, 281 drmachid_t src_id, struct memlist *src_copy_ml, 282 drmachid_t *pgm_id); 283 extern sbd_error_t *drmach_copy_rename_fini(drmachid_t id); 284 extern void drmach_copy_rename(drmachid_t id); 285 286 extern sbd_error_t *drmach_pre_op(int cmd, drmachid_t id, 287 drmach_opts_t *opts); 288 extern sbd_error_t *drmach_post_op(int cmd, drmachid_t id, 289 drmach_opts_t *opts); 290 291 extern sbd_error_t *drmach_board_assign(int bnum, drmachid_t *id); 292 extern sbd_error_t *drmach_board_connect(drmachid_t id, 293 drmach_opts_t *opts); 294 extern sbd_error_t *drmach_board_deprobe(drmachid_t id); 295 extern sbd_error_t *drmach_board_disconnect(drmachid_t id, 296 drmach_opts_t *opts); 297 extern sbd_error_t *drmach_board_find_devices(drmachid_t id, void *a, 298 sbd_error_t *(*found)(void *a, const char *, int, drmachid_t)); 299 extern int drmach_board_lookup(int bnum, drmachid_t *id); 300 extern sbd_error_t *drmach_passthru(drmachid_t id, 301 drmach_opts_t *opts); 302 303 extern sbd_error_t *drmach_board_name(int bnum, char *buf, int buflen); 304 305 extern sbd_error_t *drmach_board_poweroff(drmachid_t id); 306 extern sbd_error_t *drmach_board_poweron(drmachid_t id); 307 extern sbd_error_t *drmach_board_test(drmachid_t id, drmach_opts_t *opts, 308 int force); 309 310 extern sbd_error_t *drmach_board_unassign(drmachid_t id); 311 312 extern sbd_error_t *drmach_configure(drmachid_t id, int flags); 313 314 extern sbd_error_t *drmach_cpu_disconnect(drmachid_t id); 315 extern sbd_error_t *drmach_cpu_get_id(drmachid_t id, processorid_t *cpuid); 316 extern sbd_error_t *drmach_cpu_get_impl(drmachid_t id, int *ip); 317 extern void drmach_cpu_flush_ecache_sync(void); 318 319 extern sbd_error_t *drmach_get_dip(drmachid_t id, dev_info_t **dip); 320 321 extern sbd_error_t *drmach_io_is_attached(drmachid_t id, int *yes); 322 extern sbd_error_t *drmach_io_post_attach(drmachid_t id); 323 extern sbd_error_t *drmach_io_post_release(drmachid_t id); 324 extern sbd_error_t *drmach_io_pre_release(drmachid_t id); 325 extern sbd_error_t *drmach_io_unrelease(drmachid_t id); 326 327 extern sbd_error_t *drmach_mem_add_span(drmachid_t id, 328 uint64_t basepa, uint64_t size); 329 extern sbd_error_t *drmach_mem_del_span(drmachid_t id, 330 uint64_t basepa, uint64_t size); 331 extern sbd_error_t *drmach_mem_disable(drmachid_t id); 332 extern sbd_error_t *drmach_mem_enable(drmachid_t id); 333 extern sbd_error_t *drmach_mem_get_base_physaddr(drmachid_t id, 334 uint64_t *pa); 335 extern sbd_error_t *drmach_mem_get_memlist(drmachid_t id, 336 struct memlist **ml); 337 extern sbd_error_t *drmach_mem_get_slice_size(drmachid_t, uint64_t *); 338 339 extern sbd_error_t *drmach_release(drmachid_t id); 340 extern sbd_error_t *drmach_status(drmachid_t id, drmach_status_t *stat); 341 extern sbd_error_t *drmach_unconfigure(drmachid_t id, int flags); 342 extern int drmach_log_sysevent(int board, char *hint, int flag, 343 int verbose); 344 345 extern int drmach_verify_sr(dev_info_t *dip, int sflag); 346 extern void drmach_suspend_last(); 347 extern void drmach_resume_first(); 348 349 #endif 350 351 #ifdef __cplusplus 352 } 353 #endif 354 355 #endif /* _SYS_DRMACH_H_ */ 356