1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 1996-1998 by Sun Microsystems, Inc. 24 * All rights reserved. 25 */ 26 27 #ifndef _SYS_PROCFS_ISA_H 28 #define _SYS_PROCFS_ISA_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 /* 33 * Instruction Set Architecture specific component of <sys/procfs.h> 34 * sparc v8/v9 version 35 */ 36 37 #include <sys/regset.h> 38 39 #ifdef __cplusplus 40 extern "C" { 41 #endif 42 43 /* 44 * Possible values of pr_dmodel. 45 * This isn't isa-specific, but it needs to be defined here for other reasons. 46 */ 47 #define PR_MODEL_UNKNOWN 0 48 #define PR_MODEL_ILP32 1 /* process data model is ILP32 */ 49 #define PR_MODEL_LP64 2 /* process data model is LP64 */ 50 51 /* 52 * To determine whether application is running native. 53 */ 54 #if defined(_LP64) 55 #define PR_MODEL_NATIVE PR_MODEL_LP64 56 #elif defined(_ILP32) 57 #define PR_MODEL_NATIVE PR_MODEL_ILP32 58 #else 59 #error "No DATAMODEL_NATIVE specified" 60 #endif /* _LP64 || _ILP32 */ 61 62 /* 63 * Holds one sparc instruction, for both ILP32 and LP64. 64 */ 65 typedef uint32_t instr_t; 66 67 /* 68 * General register access (sparc). 69 * Don't confuse definitions here with definitions in <sys/regset.h>. 70 * Registers are 32 bits for ILP32, 64 bits for LP64. 71 */ 72 #define NPRGREG 38 73 #if defined(_LP64) || defined(_I32LPx) 74 typedef long prgreg_t; 75 #else 76 typedef int prgreg_t; 77 #endif 78 typedef prgreg_t prgregset_t[NPRGREG]; 79 80 #define R_G0 0 81 #define R_G1 1 82 #define R_G2 2 83 #define R_G3 3 84 #define R_G4 4 85 #define R_G5 5 86 #define R_G6 6 87 #define R_G7 7 88 #define R_O0 8 89 #define R_O1 9 90 #define R_O2 10 91 #define R_O3 11 92 #define R_O4 12 93 #define R_O5 13 94 #define R_O6 14 95 #define R_O7 15 96 #define R_L0 16 97 #define R_L1 17 98 #define R_L2 18 99 #define R_L3 19 100 #define R_L4 20 101 #define R_L5 21 102 #define R_L6 22 103 #define R_L7 23 104 #define R_I0 24 105 #define R_I1 25 106 #define R_I2 26 107 #define R_I3 27 108 #define R_I4 28 109 #define R_I5 29 110 #define R_I6 30 111 #define R_I7 31 112 113 #ifdef __sparcv9 114 #define R_CCR 32 /* v9 condition code register */ 115 #else 116 #define R_PSR 32 /* v7/v8 processor status register */ 117 #endif 118 119 #define R_PC 33 120 #define R_nPC 34 121 #define R_Y 35 122 123 #ifdef __sparcv9 124 #define R_ASI 36 125 #define R_FPRS 37 126 #else 127 #define R_WIM 36 128 #define R_TBR 37 129 #endif 130 131 /* 132 * The following defines are for portability. 133 */ 134 #ifdef __sparcv9 135 #define R_PS R_CCR 136 #else 137 #define R_PS R_PSR 138 #endif 139 #define R_SP R_O6 140 #define R_FP R_I6 141 #define R_R0 R_O0 142 #define R_R1 R_O1 143 144 #if defined(_SYSCALL32) 145 /* 146 * kernel view of the _ILP32 register set 147 */ 148 typedef int32_t prgreg32_t; 149 typedef prgreg32_t prgregset32_t[NPRGREG]; 150 #define R_PSR 32 151 #define R_WIM 36 152 #define R_TBR 37 153 #endif 154 155 /* 156 * Floating-point register access (sparc FPU). 157 * See <sys/regset.h> for details of interpretation. 158 */ 159 #ifdef __sparcv9 160 typedef struct prfpregset { 161 union { /* FPU floating point regs */ 162 uint32_t pr_regs[32]; /* 32 singles */ 163 double pr_dregs[32]; /* 32 doubles */ 164 long double pr_qregs[16]; /* 16 quads */ 165 } pr_fr; 166 uint64_t pr_filler; 167 uint64_t pr_fsr; /* FPU status register */ 168 uint8_t pr_qcnt; /* # of entries in saved FQ */ 169 uint8_t pr_q_entrysize; /* # of bytes per FQ entry */ 170 uint8_t pr_en; /* flag signifying fpu in use */ 171 char pr_pad[13]; /* ensure sizeof(prfpregset)%16 == 0 */ 172 struct fq pr_q[16]; /* contains the FQ array */ 173 } prfpregset_t; 174 #else 175 typedef struct prfpregset { 176 union { /* FPU floating point regs */ 177 uint32_t pr_regs[32]; /* 32 singles */ 178 double pr_dregs[16]; /* 16 doubles */ 179 } pr_fr; 180 uint32_t pr_filler; 181 uint32_t pr_fsr; /* FPU status register */ 182 uint8_t pr_qcnt; /* # of entries in saved FQ */ 183 uint8_t pr_q_entrysize; /* # of bytes per FQ entry */ 184 uint8_t pr_en; /* flag signifying fpu in use */ 185 struct fq pr_q[32]; /* contains the FQ array */ 186 } prfpregset_t; 187 #endif /* __sparcv9 */ 188 189 #if defined(_SYSCALL32) 190 /* 191 * kernel view of the _ILP32 floating point register set 192 */ 193 typedef struct prfpregset32 { 194 union { /* FPU floating point regs */ 195 uint32_t pr_regs[32]; /* 32 singles */ 196 double pr_dregs[16]; /* 16 doubles */ 197 } pr_fr; 198 uint32_t pr_filler; 199 uint32_t pr_fsr; /* FPU status register */ 200 uint8_t pr_qcnt; /* # of entries in saved FQ */ 201 uint8_t pr_q_entrysize; /* # of bytes per FQ entry */ 202 uint8_t pr_en; /* flag signifying fpu in use */ 203 struct fq32 pr_q[32]; /* contains the FQ array */ 204 } prfpregset32_t; 205 #endif /* _SYSCALL32 */ 206 207 /* 208 * Extra register access 209 */ 210 211 #define XR_G0 0 212 #define XR_G1 1 213 #define XR_G2 2 214 #define XR_G3 3 215 #define XR_G4 4 216 #define XR_G5 5 217 #define XR_G6 6 218 #define XR_G7 7 219 #define NPRXGREG 8 220 221 #define XR_O0 0 222 #define XR_O1 1 223 #define XR_O2 2 224 #define XR_O3 3 225 #define XR_O4 4 226 #define XR_O5 5 227 #define XR_O6 6 228 #define XR_O7 7 229 #define NPRXOREG 8 230 231 #define NPRXFILLER 8 232 233 #define XR_TYPE_V8P 1 /* interpret union as pr_v8p */ 234 235 typedef struct prxregset { 236 uint32_t pr_type; /* how to interpret union */ 237 uint32_t pr_align; /* alignment for the union */ 238 union { 239 struct pr_v8p { 240 union { /* extra FP registers */ 241 uint32_t pr_regs[32]; 242 double pr_dregs[16]; 243 #ifndef __sparcv9 /* 32-bit alignment problem */ 244 long double pr_qregs[8]; 245 #endif 246 } pr_xfr; 247 uint32_t pr_xfsr; /* upper 32bits, FP state reg */ 248 uint32_t pr_fprs; /* FP registers state */ 249 uint32_t pr_xg[NPRXGREG]; /* upper 32bits, G registers */ 250 uint32_t pr_xo[NPRXOREG]; /* upper 32bits, O registers */ 251 uint64_t pr_tstate; /* TSTATE register */ 252 uint32_t pr_filler[NPRXFILLER]; 253 } pr_v8p; 254 } pr_un; 255 } prxregset_t; 256 257 /* 258 * Given a pointer to a prxregset structure, this macro yields the value 259 * of the %gsr embedded in the structure. It is an lvalue, so it can 260 * be used to assign the value of the %gsr into the structure. 261 * (Please don't ask why this is done this way.) 262 */ 263 #define PRXREG_GSR(xrp) (*(uint64_t *)((xrp)->pr_un.pr_v8p.pr_filler)) 264 265 #ifdef __cplusplus 266 } 267 #endif 268 269 #endif /* _SYS_PROCFS_ISA_H */ 270