xref: /titanic_50/usr/src/uts/common/io/rtw/si4136reg.h (revision 275c9da86e89f8abf71135cf63d9fc23671b2e60)
1 /*
2  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  */
5 
6 /*
7  * Copyright (c) 2005 David Young.  All rights reserved.
8  *
9  * This code was written by David Young.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the author nor the names of any co-contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
25  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
26  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL David
27  * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
28  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
29  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
34  * OF SUCH DAMAGE.
35  */
36 
37 #pragma ident	"%Z%%M%	%I%	%E% SMI"
38 
39 #ifndef _SI4136REG_H_
40 #define	_SI4136REG_H_
41 
42 /*
43  * Serial bus format for Silicon Laboratories Si4126/Si4136 RF synthesizer.
44  */
45 #define	SI4126_TWI_DATA_MASK	BITS(21, 4)
46 #define	SI4126_TWI_ADDR_MASK	BITS(3, 0)
47 
48 /*
49  * Registers for Silicon Laboratories Si4126/Si4136 RF synthesizer.
50  */
51 #define	SI4126_MAIN	0	/* main configuration */
52 #define	SI4126_MAIN_AUXSEL_MASK	BITS(13, 12)	/* aux. output pin function */
53 /*
54  * reserved
55  */
56 #define	SI4126_MAIN_AUXSEL_RSVD		LSHIFT(0x0, SI4126_MAIN_AUXSEL_MASK)
57 /*
58  * force low
59  */
60 #define	SI4126_MAIN_AUXSEL_FRCLOW	LSHIFT(0x1, SI4126_MAIN_AUXSEL_MASK)
61 /*
62  * Lock Detect (LDETB)
63  */
64 #define	SI4126_MAIN_AUXSEL_LDETB	LSHIFT(0x3, SI4126_MAIN_AUXSEL_MASK)
65 
66 /*
67  * IFOUT = IFVCO  frequency / 2**IFDIV.
68  */
69 #define	SI4126_MAIN_IFDIV_MASK	BITS(11, 10)
70 
71 #define	SI4126_MAIN_XINDIV2	BIT(6)	/* 1: divide crystal input (XIN) by 2 */
72 #define	SI4126_MAIN_LPWR	BIT(5)	/* 1: low-power mode */
73 
74 /*
75  * 1: equivalent to  reg[SI4126_POWER] <- SI4126_POWER_PDIB | SI4126_POWER_PDRB.
76  * 0: power-down under control of reg[SI4126_POWER].
77  */
78 #define	SI4126_MAIN_AUTOPDB	BIT(3)
79 #define	SI4126_GAIN	1		/* phase detector gain */
80 #define	SI4126_GAIN_KPI_MASK	BITS(5, 4)	/* IF phase detector gain */
81 #define	SI4126_GAIN_KP2_MASK	BITS(3, 2)	/* RF2 phase detector gain */
82 #define	SI4126_GAIN_KP1_MASK	BITS(1, 0)	/* RF1 phase detector gain */
83 
84 #define	SI4126_POWER	2		/* powerdown */
85 #define	SI4126_POWER_PDIB	BIT(1)	/* 1: IF synthesizer on */
86 #define	SI4126_POWER_PDRB	BIT(0)	/* 1: RF synthesizer on */
87 
88 #define	SI4126_RF1N	3		/* RF1 N divider */
89 #define	SI4126_RF2N	4		/* RF2 N divider */
90 #define	SI4126_IFN	5		/* IF N divider */
91 #define	SI4126_RF1R	6		/* RF1 R divider */
92 #define	SI4126_RF2R	7		/* RF2 R divider */
93 #define	SI4126_IFR	8		/* IF R divider */
94 
95 #endif /* _SI4136REG_H_ */
96