1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #include <npi_fflp.h> 29 #include <nxge_defs.h> 30 #include <nxge_fflp.h> 31 #include <nxge_flow.h> 32 #include <nxge_impl.h> 33 #include <nxge_common.h> 34 35 /* 36 * Globals: tunable parameters (/etc/system or adb) 37 * 38 */ 39 int nxge_tcam_class_enable = 0; 40 int nxge_tcam_lookup_enable = 0; 41 int nxge_flow_dist_enable = NXGE_CLASS_FLOW_USE_DST_PORT | 42 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 43 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 44 NXGE_CLASS_FLOW_USE_PORTNUM; 45 46 /* 47 * Bit mapped 48 * 0x80000000: Drop 49 * 0x0000: NO TCAM Lookup Needed 50 * 0x0001: TCAM Lookup Needed with Dest Addr (IPv6) 51 * 0x0003: TCAM Lookup Needed with SRC Addr (IPv6) 52 * 0x0010: use MAC Port 53 * 0x0020: use L2DA 54 * 0x0040: use VLAN 55 * 0x0080: use proto 56 * 0x0100: use IP src addr 57 * 0x0200: use IP dest addr 58 * 0x0400: use Src Port 59 * 0x0800: use Dest Port 60 * 0x0fff: enable all options for IPv6 (with src addr) 61 * 0x0ffd: enable all options for IPv6 (with dest addr) 62 * 0x0fff: enable all options for IPv4 63 * 0x0ffd: enable all options for IPv4 64 * 65 */ 66 67 /* 68 * the default is to distribute as function of: 69 * protocol 70 * ip src address 71 * ip dest address 72 * src port 73 * dest port 74 * 75 * 0x0f80 76 * 77 */ 78 79 int nxge_tcp4_class = NXGE_CLASS_FLOW_USE_DST_PORT | 80 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 81 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 82 NXGE_CLASS_FLOW_USE_PORTNUM; 83 84 int nxge_udp4_class = NXGE_CLASS_FLOW_USE_DST_PORT | 85 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 86 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 87 NXGE_CLASS_FLOW_USE_PORTNUM; 88 89 int nxge_ah4_class = NXGE_CLASS_FLOW_USE_DST_PORT | 90 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 91 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 92 NXGE_CLASS_FLOW_USE_PORTNUM; 93 int nxge_sctp4_class = NXGE_CLASS_FLOW_USE_DST_PORT | 94 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 95 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 96 NXGE_CLASS_FLOW_USE_PORTNUM; 97 98 int nxge_tcp6_class = NXGE_CLASS_FLOW_USE_DST_PORT | 99 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 100 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 101 NXGE_CLASS_FLOW_USE_PORTNUM; 102 103 int nxge_udp6_class = NXGE_CLASS_FLOW_USE_DST_PORT | 104 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 105 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 106 NXGE_CLASS_FLOW_USE_PORTNUM; 107 108 int nxge_ah6_class = NXGE_CLASS_FLOW_USE_DST_PORT | 109 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 110 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 111 NXGE_CLASS_FLOW_USE_PORTNUM; 112 113 int nxge_sctp6_class = NXGE_CLASS_FLOW_USE_DST_PORT | 114 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 115 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 116 NXGE_CLASS_FLOW_USE_PORTNUM; 117 118 uint32_t nxge_fflp_init_h1 = 0xffffffff; 119 uint32_t nxge_fflp_init_h2 = 0xffff; 120 121 uint64_t class_quick_config_distribute[NXGE_CLASS_CONFIG_PARAMS] = { 122 0xffffffffULL, /* h1_init */ 123 0xffffULL, /* h2_init */ 124 0x0, /* cfg_ether_usr1 */ 125 0x0, /* cfg_ether_usr2 */ 126 0x0, /* cfg_ip_usr4 */ 127 0x0, /* cfg_ip_usr5 */ 128 0x0, /* cfg_ip_usr6 */ 129 0x0, /* cfg_ip_usr7 */ 130 0x0, /* opt_ip_usr4 */ 131 0x0, /* opt_ip_usr5 */ 132 0x0, /* opt_ip_usr6 */ 133 0x0, /* opt_ip_usr7 */ 134 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_tcp */ 135 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_udp */ 136 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_ah */ 137 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_sctp */ 138 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_tcp */ 139 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_udp */ 140 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_ah */ 141 NXGE_CLASS_FLOW_GEN_SERVER /* opt_ipv6_sctp */ 142 }; 143 144 uint64_t class_quick_config_web_server[NXGE_CLASS_CONFIG_PARAMS] = { 145 0xffffffffULL, /* h1_init */ 146 0xffffULL, /* h2_init */ 147 0x0, /* cfg_ether_usr1 */ 148 0x0, /* cfg_ether_usr2 */ 149 0x0, /* cfg_ip_usr4 */ 150 0x0, /* cfg_ip_usr5 */ 151 0x0, /* cfg_ip_usr6 */ 152 0x0, /* cfg_ip_usr7 */ 153 0x0, /* opt_ip_usr4 */ 154 0x0, /* opt_ip_usr5 */ 155 0x0, /* opt_ip_usr6 */ 156 0x0, /* opt_ip_usr7 */ 157 NXGE_CLASS_FLOW_WEB_SERVER, /* opt_ipv4_tcp */ 158 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_udp */ 159 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_ah */ 160 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_sctp */ 161 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_tcp */ 162 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_udp */ 163 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_ah */ 164 NXGE_CLASS_FLOW_GEN_SERVER /* opt_ipv6_sctp */ 165 }; 166 167 nxge_status_t 168 nxge_classify_init(p_nxge_t nxgep) 169 { 170 nxge_status_t status = NXGE_OK; 171 172 status = nxge_classify_init_sw(nxgep); 173 if (status != NXGE_OK) 174 return (status); 175 status = nxge_set_hw_classify_config(nxgep); 176 if (status != NXGE_OK) 177 return (status); 178 179 status = nxge_classify_init_hw(nxgep); 180 if (status != NXGE_OK) 181 return (status); 182 183 return (NXGE_OK); 184 } 185 186 nxge_status_t 187 nxge_classify_uninit(p_nxge_t nxgep) 188 { 189 nxge_status_t status = NXGE_OK; 190 191 status = nxge_classify_exit_sw(nxgep); 192 if (status != NXGE_OK) { 193 return (status); 194 } 195 return (NXGE_OK); 196 } 197 198 /* ARGSUSED */ 199 uint64_t 200 nxge_classify_get_cfg_value(p_nxge_t nxgep, uint8_t cfg_type, uint8_t cfg_param) 201 { 202 uint64_t cfg_value; 203 204 if (cfg_param >= NXGE_CLASS_CONFIG_PARAMS) 205 return (-1); 206 switch (cfg_type) { 207 case CFG_L3_WEB: 208 cfg_value = class_quick_config_web_server[cfg_param]; 209 break; 210 case CFG_L3_DISTRIBUTE: 211 default: 212 cfg_value = class_quick_config_distribute[cfg_param]; 213 break; 214 } 215 return (cfg_value); 216 } 217 218 nxge_status_t 219 nxge_set_hw_classify_config(p_nxge_t nxgep) 220 { 221 p_nxge_dma_pt_cfg_t p_all_cfgp; 222 p_nxge_hw_pt_cfg_t p_cfgp; 223 224 NXGE_DEBUG_MSG((nxgep, OBP_CTL, "==> nxge_get_hw_classify_config")); 225 226 /* Get mac rdc table info from HW/Prom/.conf etc ...... */ 227 /* for now, get it from dma configs */ 228 p_all_cfgp = (p_nxge_dma_pt_cfg_t)&nxgep->pt_config; 229 p_cfgp = (p_nxge_hw_pt_cfg_t)&p_all_cfgp->hw_config; 230 231 /* 232 * classify_init needs to call first. 233 */ 234 nxgep->class_config.mac_rdcgrp = p_cfgp->def_mac_rxdma_grpid; 235 nxgep->class_config.mcast_rdcgrp = p_cfgp->def_mac_rxdma_grpid; 236 NXGE_DEBUG_MSG((nxgep, OBP_CTL, "<== nxge_get_hw_classify_config")); 237 238 return (NXGE_OK); 239 } 240