1 /* 2 * Sun elects to have this file available under and governed by the BSD license 3 * (see below for full license text). However, the following notice 4 * accompanied the original version of this file: 5 */ 6 7 /* 8 * Copyright (c) 2009, Intel Corporation 9 * All rights reserved. 10 */ 11 12 /* 13 * This file is provided under a dual BSD/GPLv2 license. When using or 14 * redistributing this file, you may do so under either license. 15 * 16 * GPL LICENSE SUMMARY 17 * 18 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 19 * 20 * This program is free software; you can redistribute it and/or modify 21 * it under the terms of version 2 of the GNU General Public License as 22 * published by the Free Software Foundation. 23 * 24 * This program is distributed in the hope that it will be useful, but 25 * WITHOUT ANY WARRANTY; without even the implied warranty of 26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 27 * General Public License for more details. 28 * 29 * You should have received a copy of the GNU General Public License 30 * along with this program; if not, write to the Free Software 31 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 32 * USA 33 * 34 * The full GNU General Public License is included in this distribution 35 * in the file called LICENSE.GPL. 36 * 37 * Contact Information: 38 * James P. Ketrenos <ipw2100-admin@linux.intel.com> 39 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 40 * 41 * BSD LICENSE 42 * 43 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 44 * All rights reserved. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 50 * * Redistributions of source code must retain the above copyright 51 * notice, this list of conditions and the following disclaimer. 52 * * Redistributions in binary form must reproduce the above copyright 53 * notice, this list of conditions and the following disclaimer in 54 * the documentation and/or other materials provided with the 55 * distribution. 56 * * Neither the name Intel Corporation nor the names of its 57 * contributors may be used to endorse or promote products derived 58 * from this software without specific prior written permission. 59 * 60 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 61 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 62 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 63 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 64 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 65 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 66 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 67 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 68 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 69 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 70 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 71 */ 72 73 74 #ifndef _IWP_CALIBRATION_H 75 #define _IWP_CALIBRATION_H 76 77 #define EEP_TX_POWER_TX_CHAINS (3) 78 #define EEP_RXIQ_CAL_CHANNELS (7) 79 #define EEP_CAL_CHANNEL_GROUP (7) 80 #define EEP_RXIQ_DRIVER_MODES (12) 81 82 struct tx_pow_calib_hdr { 83 uint8_t calib_version; 84 uint8_t pa_type; 85 uint16_t voltage_reading; 86 }; 87 88 struct iwp_eep_txpower_sample { 89 uint8_t gain_index; /* index to power setup table */ 90 int8_t power; /* power level for this channel group */ 91 uint8_t v_det; /* PA output voltage */ 92 uint8_t temp_reading; 93 }; 94 95 struct iwp_eep_txpower_cal { 96 struct iwp_eep_txpower_sample samples[6]; /* 6 power level */ 97 /* highest power possible by hardware in this band */ 98 uint8_t saturation_power; 99 /* "representative" channel number in this band */ 100 uint8_t group_channel; 101 int8_t t_pa_det; 102 int8_t t_actual_power; 103 }; 104 105 struct rx_iq_cal { 106 int16_t ars; 107 int16_t arc; 108 }; 109 110 struct iwp_eep_calibration { 111 struct tx_pow_calib_hdr tx_pow_calib_hdr; 112 struct iwp_eep_txpower_cal txpow_group 113 [EEP_TX_POWER_TX_CHAINS][EEP_CAL_CHANNEL_GROUP]; 114 uint16_t xtal_calib[2]; 115 int16_t temp_calib_temp; 116 int16_t temp_calib_volt; 117 uint8_t rx_iBB_filter; 118 uint8_t reserved; 119 struct rx_iq_cal rx_iq_cal 120 [EEP_RXIQ_CAL_CHANNELS][EEP_RXIQ_DRIVER_MODES]; 121 }; 122 123 #endif /* _IWP_CALIBRATION_H */ 124