xref: /titanic_50/usr/src/uts/common/io/cpudrv.c (revision 3e5bc1d795e8c41f3680a71e3954e72d079ee46d)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 /*
27  * CPU Device driver. The driver is not DDI-compliant.
28  *
29  * The driver supports following features:
30  *	- Power management.
31  */
32 
33 #include <sys/types.h>
34 #include <sys/param.h>
35 #include <sys/errno.h>
36 #include <sys/modctl.h>
37 #include <sys/kmem.h>
38 #include <sys/conf.h>
39 #include <sys/cmn_err.h>
40 #include <sys/stat.h>
41 #include <sys/debug.h>
42 #include <sys/systm.h>
43 #include <sys/ddi.h>
44 #include <sys/sunddi.h>
45 #include <sys/sdt.h>
46 
47 #include <sys/machsystm.h>
48 #include <sys/x_call.h>
49 #include <sys/cpudrv_mach.h>
50 #include <sys/msacct.h>
51 
52 /*
53  * CPU power management
54  *
55  * The supported power saving model is to slow down the CPU (on SPARC by
56  * dividing the CPU clock and on x86 by dropping down a P-state).
57  * Periodically we determine the amount of time the CPU is running
58  * idle thread and threads in user mode during the last quantum.  If the idle
59  * thread was running less than its low water mark for current speed for
60  * number of consecutive sampling periods, or number of running threads in
61  * user mode are above its high water mark, we arrange to go to the higher
62  * speed.  If the idle thread was running more than its high water mark without
63  * dropping a number of consecutive times below the mark, and number of threads
64  * running in user mode are below its low water mark, we arrange to go to the
65  * next lower speed.  While going down, we go through all the speeds.  While
66  * going up we go to the maximum speed to minimize impact on the user, but have
67  * provisions in the driver to go to other speeds.
68  *
69  * The driver does not have knowledge of a particular implementation of this
70  * scheme and will work with all CPUs supporting this model. On SPARC, the
71  * driver determines supported speeds by looking at 'clock-divisors' property
72  * created by OBP. On x86, the driver retrieves the supported speeds from
73  * ACPI.
74  */
75 
76 /*
77  * Configuration function prototypes and data structures
78  */
79 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
80 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
81 static int cpudrv_power(dev_info_t *dip, int comp, int level);
82 
83 struct dev_ops cpudrv_ops = {
84 	DEVO_REV,		/* rev */
85 	0,			/* refcnt */
86 	nodev,			/* getinfo */
87 	nulldev,		/* identify */
88 	nulldev,		/* probe */
89 	cpudrv_attach,		/* attach */
90 	cpudrv_detach,		/* detach */
91 	nodev,			/* reset */
92 	(struct cb_ops *)NULL,	/* cb_ops */
93 	(struct bus_ops *)NULL,	/* bus_ops */
94 	cpudrv_power,		/* power */
95 	ddi_quiesce_not_needed,		/* quiesce */
96 };
97 
98 static struct modldrv modldrv = {
99 	&mod_driverops,			/* modops */
100 	"CPU Driver",			/* linkinfo */
101 	&cpudrv_ops,			/* dev_ops */
102 };
103 
104 static struct modlinkage modlinkage = {
105 	MODREV_1,		/* rev */
106 	&modldrv,		/* linkage */
107 	NULL
108 };
109 
110 /*
111  * Function prototypes
112  */
113 static int cpudrv_pm_init_power(cpudrv_devstate_t *cpudsp);
114 static void cpudrv_pm_free(cpudrv_devstate_t *cpudsp);
115 static int cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp);
116 static void cpudrv_pm_monitor_disp(void *arg);
117 static void cpudrv_pm_monitor(void *arg);
118 
119 /*
120  * Driver global variables
121  */
122 uint_t cpudrv_debug = 0;
123 void *cpudrv_state;
124 static uint_t cpudrv_pm_idle_hwm = CPUDRV_PM_IDLE_HWM;
125 static uint_t cpudrv_pm_idle_lwm = CPUDRV_PM_IDLE_LWM;
126 static uint_t cpudrv_pm_idle_buf_zone = CPUDRV_PM_IDLE_BUF_ZONE;
127 static uint_t cpudrv_pm_idle_bhwm_cnt_max = CPUDRV_PM_IDLE_BHWM_CNT_MAX;
128 static uint_t cpudrv_pm_idle_blwm_cnt_max = CPUDRV_PM_IDLE_BLWM_CNT_MAX;
129 static uint_t cpudrv_pm_user_hwm = CPUDRV_PM_USER_HWM;
130 
131 /*
132  * cpudrv_direct_pm allows user applications to directly control the
133  * power state transitions (direct pm) without following the normal
134  * direct pm protocol. This is needed because the normal protocol
135  * requires that a device only be lowered when it is idle, and be
136  * brought up when it request to do so by calling pm_raise_power().
137  * Ignoring this protocol is harmless for CPU (other than speed).
138  * Moreover it might be the case that CPU is never idle or wants
139  * to be at higher speed because of the addition CPU cycles required
140  * to run the user application.
141  *
142  * The driver will still report idle/busy status to the framework. Although
143  * framework will ignore this information for direct pm devices and not
144  * try to bring them down when idle, user applications can still use this
145  * information if they wants.
146  *
147  * In the future, provide an ioctl to control setting of this mode. In
148  * that case, this variable should move to the state structure and
149  * be protected by the lock in the state structure.
150  */
151 int cpudrv_direct_pm = 0;
152 
153 /*
154  * Arranges for the handler function to be called at the interval suitable
155  * for current speed.
156  */
157 #define	CPUDRV_PM_MONITOR_INIT(cpudsp) { \
158 	if (CPUDRV_PM_POWER_ENABLED(cpudsp)) { \
159 		ASSERT(mutex_owned(&(cpudsp)->lock)); \
160 		(cpudsp)->cpudrv_pm.timeout_id = \
161 		    timeout(cpudrv_pm_monitor_disp, \
162 		    (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \
163 		    CPUDRV_PM_QUANT_CNT_OTHR : \
164 		    (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \
165 	} \
166 }
167 
168 /*
169  * Arranges for the handler function not to be called back.
170  */
171 #define	CPUDRV_PM_MONITOR_FINI(cpudsp) { \
172 	timeout_id_t tmp_tid; \
173 	ASSERT(mutex_owned(&(cpudsp)->lock)); \
174 	tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \
175 	(cpudsp)->cpudrv_pm.timeout_id = 0; \
176 	mutex_exit(&(cpudsp)->lock); \
177 	if (tmp_tid != 0) { \
178 		(void) untimeout(tmp_tid); \
179 		mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \
180 		while ((cpudsp)->cpudrv_pm.timeout_count != 0) \
181 			cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \
182 			    &(cpudsp)->cpudrv_pm.timeout_lock); \
183 		mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \
184 	} \
185 	mutex_enter(&(cpudsp)->lock); \
186 }
187 
188 int
189 _init(void)
190 {
191 	int	error;
192 
193 	DPRINTF(D_INIT, (" _init: function called\n"));
194 	if ((error = ddi_soft_state_init(&cpudrv_state,
195 	    sizeof (cpudrv_devstate_t), 0)) != 0) {
196 		return (error);
197 	}
198 
199 	if ((error = mod_install(&modlinkage)) != 0)  {
200 		ddi_soft_state_fini(&cpudrv_state);
201 	}
202 
203 	/*
204 	 * Callbacks used by the PPM driver.
205 	 */
206 	CPUDRV_PM_SET_PPM_CALLBACKS();
207 	return (error);
208 }
209 
210 int
211 _fini(void)
212 {
213 	int	error;
214 
215 	DPRINTF(D_FINI, (" _fini: function called\n"));
216 	if ((error = mod_remove(&modlinkage)) == 0) {
217 		ddi_soft_state_fini(&cpudrv_state);
218 	}
219 
220 	return (error);
221 }
222 
223 int
224 _info(struct modinfo *modinfop)
225 {
226 	return (mod_info(&modlinkage, modinfop));
227 }
228 
229 /*
230  * Driver attach(9e) entry point.
231  */
232 static int
233 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
234 {
235 	int			instance;
236 	cpudrv_devstate_t	*cpudsp;
237 	extern pri_t		maxclsyspri;
238 
239 	instance = ddi_get_instance(dip);
240 
241 	switch (cmd) {
242 	case DDI_ATTACH:
243 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
244 		    "DDI_ATTACH called\n", instance));
245 		if (CPUDRV_PM_DISABLED())
246 			return (DDI_FAILURE);
247 		if (ddi_soft_state_zalloc(cpudrv_state, instance) !=
248 		    DDI_SUCCESS) {
249 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
250 			    "can't allocate state", instance);
251 			CPUDRV_PM_DISABLE();
252 			return (DDI_FAILURE);
253 		}
254 		if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) ==
255 		    NULL) {
256 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
257 			    "can't get state", instance);
258 			ddi_soft_state_free(cpudrv_state, instance);
259 			CPUDRV_PM_DISABLE();
260 			return (DDI_FAILURE);
261 		}
262 		cpudsp->dip = dip;
263 
264 		/*
265 		 * Find CPU number for this dev_info node.
266 		 */
267 		if (!cpudrv_pm_get_cpu_id(dip, &(cpudsp->cpu_id))) {
268 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
269 			    "can't convert dip to cpu_id", instance);
270 			ddi_soft_state_free(cpudrv_state, instance);
271 			CPUDRV_PM_DISABLE();
272 			return (DDI_FAILURE);
273 		}
274 		if (!cpudrv_mach_pm_init(cpudsp)) {
275 			ddi_soft_state_free(cpudrv_state, instance);
276 			CPUDRV_PM_DISABLE();
277 			return (DDI_FAILURE);
278 		}
279 		mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL);
280 		if (CPUDRV_PM_POWER_ENABLED(cpudsp)) {
281 			if (cpudrv_pm_init_power(cpudsp) != DDI_SUCCESS) {
282 				CPUDRV_PM_DISABLE();
283 				cpudrv_pm_free(cpudsp);
284 				ddi_soft_state_free(cpudrv_state, instance);
285 				return (DDI_FAILURE);
286 			}
287 			if (cpudrv_pm_comp_create(cpudsp) != DDI_SUCCESS) {
288 				CPUDRV_PM_DISABLE();
289 				cpudrv_pm_free(cpudsp);
290 				ddi_soft_state_free(cpudrv_state, instance);
291 				return (DDI_FAILURE);
292 			}
293 			if (ddi_prop_update_string(DDI_DEV_T_NONE,
294 			    dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) {
295 				CPUDRV_PM_DISABLE();
296 				cpudrv_pm_free(cpudsp);
297 				ddi_soft_state_free(cpudrv_state, instance);
298 				return (DDI_FAILURE);
299 			}
300 
301 			/*
302 			 * Taskq is used to dispatch routine to monitor CPU
303 			 * activities.
304 			 */
305 			cpudsp->cpudrv_pm.tq = taskq_create_instance(
306 			    "cpudrv_pm_monitor",
307 			    ddi_get_instance(dip), CPUDRV_PM_TASKQ_THREADS,
308 			    (maxclsyspri - 1), CPUDRV_PM_TASKQ_MIN,
309 			    CPUDRV_PM_TASKQ_MAX,
310 			    TASKQ_PREPOPULATE|TASKQ_CPR_SAFE);
311 
312 			mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL,
313 			    MUTEX_DRIVER, NULL);
314 			cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL,
315 			    CV_DEFAULT, NULL);
316 
317 			/*
318 			 * Driver needs to assume that CPU is running at
319 			 * unknown speed at DDI_ATTACH and switch it to the
320 			 * needed speed. We assume that initial needed speed
321 			 * is full speed for us.
322 			 */
323 			/*
324 			 * We need to take the lock because cpudrv_pm_monitor()
325 			 * will start running in parallel with attach().
326 			 */
327 			mutex_enter(&cpudsp->lock);
328 			cpudsp->cpudrv_pm.cur_spd = NULL;
329 			cpudsp->cpudrv_pm.pm_started = B_FALSE;
330 			/*
331 			 * We don't call pm_raise_power() directly from attach
332 			 * because driver attach for a slave CPU node can
333 			 * happen before the CPU is even initialized. We just
334 			 * start the monitoring system which understands
335 			 * unknown speed and moves CPU to top speed when it
336 			 * has been initialized.
337 			 */
338 			CPUDRV_PM_MONITOR_INIT(cpudsp);
339 			mutex_exit(&cpudsp->lock);
340 
341 		}
342 
343 		CPUDRV_PM_INSTALL_MAX_CHANGE_HANDLER(cpudsp, dip);
344 
345 		ddi_report_dev(dip);
346 		return (DDI_SUCCESS);
347 
348 	case DDI_RESUME:
349 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
350 		    "DDI_RESUME called\n", instance));
351 
352 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
353 		ASSERT(cpudsp != NULL);
354 
355 		/*
356 		 * Nothing to do for resume, if not doing active PM.
357 		 */
358 		if (!CPUDRV_PM_POWER_ENABLED(cpudsp))
359 			return (DDI_SUCCESS);
360 
361 		mutex_enter(&cpudsp->lock);
362 		/*
363 		 * Driver needs to assume that CPU is running at unknown speed
364 		 * at DDI_RESUME and switch it to the needed speed. We assume
365 		 * that the needed speed is full speed for us.
366 		 */
367 		cpudsp->cpudrv_pm.cur_spd = NULL;
368 		CPUDRV_PM_MONITOR_INIT(cpudsp);
369 		mutex_exit(&cpudsp->lock);
370 		CPUDRV_PM_REDEFINE_TOPSPEED(dip);
371 		return (DDI_SUCCESS);
372 
373 	default:
374 		return (DDI_FAILURE);
375 	}
376 }
377 
378 /*
379  * Driver detach(9e) entry point.
380  */
381 static int
382 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
383 {
384 	int			instance;
385 	cpudrv_devstate_t	*cpudsp;
386 	cpudrv_pm_t		*cpupm;
387 
388 	instance = ddi_get_instance(dip);
389 
390 	switch (cmd) {
391 	case DDI_DETACH:
392 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
393 		    "DDI_DETACH called\n", instance));
394 		/*
395 		 * If the only thing supported by the driver is power
396 		 * management, we can in future enhance the driver and
397 		 * framework that loads it to unload the driver when
398 		 * user has disabled CPU power management.
399 		 */
400 		return (DDI_FAILURE);
401 
402 	case DDI_SUSPEND:
403 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
404 		    "DDI_SUSPEND called\n", instance));
405 
406 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
407 		ASSERT(cpudsp != NULL);
408 
409 		/*
410 		 * Nothing to do for suspend, if not doing active PM.
411 		 */
412 		if (!CPUDRV_PM_POWER_ENABLED(cpudsp))
413 			return (DDI_SUCCESS);
414 
415 		/*
416 		 * During a checkpoint-resume sequence, framework will
417 		 * stop interrupts to quiesce kernel activity. This will
418 		 * leave our monitoring system ineffective. Handle this
419 		 * by stopping our monitoring system and bringing CPU
420 		 * to full speed. In case we are in special direct pm
421 		 * mode, we leave the CPU at whatever speed it is. This
422 		 * is harmless other than speed.
423 		 */
424 		mutex_enter(&cpudsp->lock);
425 		cpupm = &(cpudsp->cpudrv_pm);
426 
427 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - "
428 		    "cur_spd %d, topspeed %d\n", instance,
429 		    cpupm->cur_spd->pm_level,
430 		    CPUDRV_PM_TOPSPEED(cpupm)->pm_level));
431 
432 		CPUDRV_PM_MONITOR_FINI(cpudsp);
433 
434 		if (!cpudrv_direct_pm && (cpupm->cur_spd !=
435 		    CPUDRV_PM_TOPSPEED(cpupm))) {
436 			if (cpupm->pm_busycnt < 1) {
437 				if ((pm_busy_component(dip, CPUDRV_PM_COMP_NUM)
438 				    == DDI_SUCCESS)) {
439 					cpupm->pm_busycnt++;
440 				} else {
441 					CPUDRV_PM_MONITOR_INIT(cpudsp);
442 					mutex_exit(&cpudsp->lock);
443 					cmn_err(CE_WARN, "cpudrv_detach: "
444 					    "instance %d: can't busy CPU "
445 					    "component", instance);
446 					return (DDI_FAILURE);
447 				}
448 			}
449 			mutex_exit(&cpudsp->lock);
450 			if (pm_raise_power(dip, CPUDRV_PM_COMP_NUM,
451 			    CPUDRV_PM_TOPSPEED(cpupm)->pm_level) !=
452 			    DDI_SUCCESS) {
453 				mutex_enter(&cpudsp->lock);
454 				CPUDRV_PM_MONITOR_INIT(cpudsp);
455 				mutex_exit(&cpudsp->lock);
456 				cmn_err(CE_WARN, "cpudrv_detach: instance %d: "
457 				    "can't raise CPU power level to %d",
458 				    instance,
459 				    CPUDRV_PM_TOPSPEED(cpupm)->pm_level);
460 				return (DDI_FAILURE);
461 			} else {
462 				return (DDI_SUCCESS);
463 			}
464 		} else {
465 			mutex_exit(&cpudsp->lock);
466 			return (DDI_SUCCESS);
467 		}
468 
469 	default:
470 		return (DDI_FAILURE);
471 	}
472 }
473 
474 /*
475  * Driver power(9e) entry point.
476  *
477  * Driver's notion of current power is set *only* in power(9e) entry point
478  * after actual power change operation has been successfully completed.
479  */
480 /* ARGSUSED */
481 static int
482 cpudrv_power(dev_info_t *dip, int comp, int level)
483 {
484 	int			instance;
485 	cpudrv_devstate_t	*cpudsp;
486 	cpudrv_pm_t 		*cpupm;
487 	cpudrv_pm_spd_t		*new_spd;
488 	boolean_t		is_ready;
489 	int			ret;
490 
491 	instance = ddi_get_instance(dip);
492 
493 	DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n",
494 	    instance, level));
495 	if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) {
496 		cmn_err(CE_WARN, "cpudrv_power: instance %d: can't get state",
497 		    instance);
498 		return (DDI_FAILURE);
499 	}
500 
501 	mutex_enter(&cpudsp->lock);
502 	cpupm = &(cpudsp->cpudrv_pm);
503 
504 	/*
505 	 * In normal operation, we fail if we are busy and request is
506 	 * to lower the power level. We let this go through if the driver
507 	 * is in special direct pm mode. On x86, we also let this through
508 	 * if the change is due to a request to govern the max speed.
509 	 */
510 	if (!cpudrv_direct_pm && (cpupm->pm_busycnt >= 1) &&
511 	    !cpudrv_pm_is_governor_thread(cpupm)) {
512 		if ((cpupm->cur_spd != NULL) &&
513 		    (level < cpupm->cur_spd->pm_level)) {
514 			mutex_exit(&cpudsp->lock);
515 			return (DDI_FAILURE);
516 		}
517 	}
518 
519 	for (new_spd = cpupm->head_spd; new_spd; new_spd = new_spd->down_spd) {
520 		if (new_spd->pm_level == level)
521 			break;
522 	}
523 	if (!new_spd) {
524 		CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm);
525 		mutex_exit(&cpudsp->lock);
526 		cmn_err(CE_WARN, "cpudrv_power: instance %d: "
527 		    "can't locate new CPU speed", instance);
528 		return (DDI_FAILURE);
529 	}
530 
531 	/*
532 	 * We currently refuse to power manage if the CPU is not ready to
533 	 * take cross calls (cross calls fail silently if CPU is not ready
534 	 * for it).
535 	 *
536 	 * Additionally, for x86 platforms we cannot power manage
537 	 * any one instance, until all instances have been initialized.
538 	 * That's because we don't know what the CPU domains look like
539 	 * until all instances have been initialized.
540 	 */
541 	is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id);
542 	if (!is_ready) {
543 		DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
544 		    "CPU not ready for x-calls\n", instance));
545 	} else if (!(is_ready = cpudrv_pm_power_ready())) {
546 		DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
547 		    "waiting for all CPUs to be power manageable\n", instance));
548 	}
549 	if (!is_ready) {
550 		CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm);
551 		mutex_exit(&cpudsp->lock);
552 		return (DDI_FAILURE);
553 	}
554 
555 	/*
556 	 * Execute CPU specific routine on the requested CPU to change its
557 	 * speed to normal-speed/divisor.
558 	 */
559 	if ((ret = cpudrv_pm_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) {
560 		cmn_err(CE_WARN, "cpudrv_power: cpudrv_pm_change_speed() "
561 		    "return = %d", ret);
562 		mutex_exit(&cpudsp->lock);
563 		return (DDI_FAILURE);
564 	}
565 
566 	/*
567 	 * DTrace probe point for CPU speed change transition
568 	 */
569 	DTRACE_PROBE3(cpu__change__speed, cpudrv_devstate_t *, cpudsp,
570 	    cpudrv_pm_t *, cpupm, cpudrv_pm_spd_t *, new_spd);
571 
572 	/*
573 	 * Reset idle threshold time for the new power level.
574 	 */
575 	if ((cpupm->cur_spd != NULL) && (level < cpupm->cur_spd->pm_level)) {
576 		if (pm_idle_component(dip, CPUDRV_PM_COMP_NUM) ==
577 		    DDI_SUCCESS) {
578 			if (cpupm->pm_busycnt >= 1)
579 				cpupm->pm_busycnt--;
580 		} else
581 			cmn_err(CE_WARN, "cpudrv_power: instance %d: can't "
582 			    "idle CPU component", ddi_get_instance(dip));
583 	}
584 	/*
585 	 * Reset various parameters because we are now running at new speed.
586 	 */
587 	cpupm->lastquan_mstate[CMS_IDLE] = 0;
588 	cpupm->lastquan_mstate[CMS_SYSTEM] = 0;
589 	cpupm->lastquan_mstate[CMS_USER] = 0;
590 	cpupm->lastquan_lbolt = 0;
591 	cpupm->cur_spd = new_spd;
592 	CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm);
593 	mutex_exit(&cpudsp->lock);
594 
595 	return (DDI_SUCCESS);
596 }
597 
598 /*
599  * Initialize the field that will be used for reporting
600  * the supported_frequencies_Hz cpu_info kstat.
601  */
602 static void
603 set_supp_freqs(cpu_t *cp, cpudrv_pm_t *cpupm)
604 {
605 	char		*supp_freqs;
606 	char		*sfptr;
607 	uint64_t	*speeds;
608 	cpudrv_pm_spd_t	*spd;
609 	int		i;
610 #define	UINT64_MAX_STRING (sizeof ("18446744073709551615"))
611 
612 	speeds = kmem_zalloc(cpupm->num_spd * sizeof (uint64_t), KM_SLEEP);
613 	for (i = cpupm->num_spd - 1, spd = cpupm->head_spd; spd;
614 	    i--, spd = spd->down_spd) {
615 		speeds[i] =
616 		    CPUDRV_PM_SPEED_HZ(cp->cpu_type_info.pi_clock, spd->speed);
617 	}
618 
619 	supp_freqs = kmem_zalloc((UINT64_MAX_STRING * cpupm->num_spd),
620 	    KM_SLEEP);
621 	sfptr = supp_freqs;
622 	for (i = 0; i < cpupm->num_spd; i++) {
623 		if (i == cpupm->num_spd - 1) {
624 			(void) sprintf(sfptr, "%"PRIu64, speeds[i]);
625 		} else {
626 			(void) sprintf(sfptr, "%"PRIu64":", speeds[i]);
627 			sfptr = supp_freqs + strlen(supp_freqs);
628 		}
629 	}
630 	cpu_set_supp_freqs(cp, supp_freqs);
631 	kmem_free(supp_freqs, (UINT64_MAX_STRING * cpupm->num_spd));
632 	kmem_free(speeds, cpupm->num_spd * sizeof (uint64_t));
633 }
634 
635 /*
636  * Initialize power management data.
637  */
638 static int
639 cpudrv_pm_init_power(cpudrv_devstate_t *cpudsp)
640 {
641 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
642 	cpudrv_pm_spd_t	*cur_spd;
643 	cpudrv_pm_spd_t	*prev_spd = NULL;
644 	int		*speeds;
645 	uint_t		nspeeds;
646 	int		idle_cnt_percent;
647 	int		user_cnt_percent;
648 	int		i;
649 
650 	CPUDRV_PM_GET_SPEEDS(cpudsp, speeds, nspeeds);
651 	if (nspeeds < 2) {
652 		/* Need at least two speeds to power manage */
653 		CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds);
654 		return (DDI_FAILURE);
655 	}
656 	cpupm->num_spd = nspeeds;
657 
658 	/*
659 	 * Calculate the watermarks and other parameters based on the
660 	 * supplied speeds.
661 	 *
662 	 * One of the basic assumption is that for X amount of CPU work,
663 	 * if CPU is slowed down by a factor of N, the time it takes to
664 	 * do the same work will be N * X.
665 	 *
666 	 * The driver declares that a CPU is idle and ready for slowed down,
667 	 * if amount of idle thread is more than the current speed idle_hwm
668 	 * without dropping below idle_hwm a number of consecutive sampling
669 	 * intervals and number of running threads in user mode are below
670 	 * user_lwm.  We want to set the current user_lwm such that if we
671 	 * just switched to the next slower speed with no change in real work
672 	 * load, the amount of user threads at the slower speed will be such
673 	 * that it falls below the slower speed's user_hwm.  If we didn't do
674 	 * that then we will just come back to the higher speed as soon as we
675 	 * go down even with no change in work load.
676 	 * The user_hwm is a fixed precentage and not calculated dynamically.
677 	 *
678 	 * We bring the CPU up if idle thread at current speed is less than
679 	 * the current speed idle_lwm for a number of consecutive sampling
680 	 * intervals or user threads are above the user_hwm for the current
681 	 * speed.
682 	 */
683 	for (i = 0; i < nspeeds; i++) {
684 		cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP);
685 		cur_spd->speed = speeds[i];
686 		if (i == 0) {	/* normal speed */
687 			cpupm->head_spd = cur_spd;
688 			CPUDRV_PM_TOPSPEED(cpupm) = cur_spd;
689 			cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_NORMAL;
690 			cur_spd->idle_hwm =
691 			    (cpudrv_pm_idle_hwm * cur_spd->quant_cnt) / 100;
692 			/* can't speed anymore */
693 			cur_spd->idle_lwm = 0;
694 			cur_spd->user_hwm = UINT_MAX;
695 		} else {
696 			cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_OTHR;
697 			ASSERT(prev_spd != NULL);
698 			prev_spd->down_spd = cur_spd;
699 			cur_spd->up_spd = cpupm->head_spd;
700 
701 			/*
702 			 * Let's assume CPU is considered idle at full speed
703 			 * when it is spending I% of time in running the idle
704 			 * thread.  At full speed, CPU will be busy (100 - I) %
705 			 * of times.  This % of busyness increases by factor of
706 			 * N as CPU slows down.  CPU that is idle I% of times
707 			 * in full speed, it is idle (100 - ((100 - I) * N)) %
708 			 * of times in N speed.  The idle_lwm is a fixed
709 			 * percentage.  A large value of N may result in
710 			 * idle_hwm to go below idle_lwm.  We need to make sure
711 			 * that there is at least a buffer zone seperation
712 			 * between the idle_lwm and idle_hwm values.
713 			 */
714 			idle_cnt_percent = CPUDRV_PM_IDLE_CNT_PERCENT(
715 			    cpudrv_pm_idle_hwm, speeds, i);
716 			idle_cnt_percent = max(idle_cnt_percent,
717 			    (cpudrv_pm_idle_lwm + cpudrv_pm_idle_buf_zone));
718 			cur_spd->idle_hwm =
719 			    (idle_cnt_percent * cur_spd->quant_cnt) / 100;
720 			cur_spd->idle_lwm =
721 			    (cpudrv_pm_idle_lwm * cur_spd->quant_cnt) / 100;
722 
723 			/*
724 			 * The lwm for user threads are determined such that
725 			 * if CPU slows down, the load of work in the
726 			 * new speed would still keep the CPU at or below the
727 			 * user_hwm in the new speed.  This is to prevent
728 			 * the quick jump back up to higher speed.
729 			 */
730 			cur_spd->user_hwm = (cpudrv_pm_user_hwm *
731 			    cur_spd->quant_cnt) / 100;
732 			user_cnt_percent = CPUDRV_PM_USER_CNT_PERCENT(
733 			    cpudrv_pm_user_hwm, speeds, i);
734 			prev_spd->user_lwm =
735 			    (user_cnt_percent * prev_spd->quant_cnt) / 100;
736 		}
737 		prev_spd = cur_spd;
738 	}
739 	/* Slowest speed. Can't slow down anymore */
740 	cur_spd->idle_hwm = UINT_MAX;
741 	cur_spd->user_lwm = -1;
742 #ifdef	DEBUG
743 	DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: head_spd spd %d, "
744 	    "num_spd %d\n", ddi_get_instance(cpudsp->dip),
745 	    cpupm->head_spd->speed, cpupm->num_spd));
746 	for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) {
747 		DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: speed %d, "
748 		    "down_spd spd %d, idle_hwm %d, user_lwm %d, "
749 		    "up_spd spd %d, idle_lwm %d, user_hwm %d, "
750 		    "quant_cnt %d\n", ddi_get_instance(cpudsp->dip),
751 		    cur_spd->speed,
752 		    (cur_spd->down_spd ? cur_spd->down_spd->speed : 0),
753 		    cur_spd->idle_hwm, cur_spd->user_lwm,
754 		    (cur_spd->up_spd ? cur_spd->up_spd->speed : 0),
755 		    cur_spd->idle_lwm, cur_spd->user_hwm,
756 		    cur_spd->quant_cnt));
757 	}
758 #endif	/* DEBUG */
759 	CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds);
760 	return (DDI_SUCCESS);
761 }
762 
763 /*
764  * Free CPU power management data.
765  */
766 static void
767 cpudrv_pm_free(cpudrv_devstate_t *cpudsp)
768 {
769 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
770 	cpudrv_pm_spd_t	*cur_spd, *next_spd;
771 
772 	cur_spd = cpupm->head_spd;
773 	while (cur_spd) {
774 		next_spd = cur_spd->down_spd;
775 		kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t));
776 		cur_spd = next_spd;
777 	}
778 	bzero(cpupm, sizeof (cpudrv_pm_t));
779 	cpudrv_mach_pm_free(cpudsp);
780 }
781 
782 /*
783  * Create pm-components property.
784  */
785 static int
786 cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp)
787 {
788 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
789 	cpudrv_pm_spd_t	*cur_spd;
790 	char		**pmc;
791 	int		size;
792 	char		name[] = "NAME=CPU Speed";
793 	int		i, j;
794 	uint_t		comp_spd;
795 	int		result = DDI_FAILURE;
796 
797 	pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP);
798 	size = CPUDRV_PM_COMP_SIZE();
799 	if (cpupm->num_spd > CPUDRV_PM_COMP_MAX_VAL) {
800 		cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: "
801 		    "number of speeds exceeded limits",
802 		    ddi_get_instance(cpudsp->dip));
803 		kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
804 		return (result);
805 	}
806 
807 	for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0;
808 	    i--, cur_spd = cur_spd->down_spd) {
809 		cur_spd->pm_level = i;
810 		pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP);
811 		comp_spd = CPUDRV_PM_COMP_SPEED(cpupm, cur_spd);
812 		if (comp_spd > CPUDRV_PM_COMP_MAX_VAL) {
813 			cmn_err(CE_WARN, "cpudrv_pm_comp_create: "
814 			    "instance %d: speed exceeded limits",
815 			    ddi_get_instance(cpudsp->dip));
816 			for (j = cpupm->num_spd; j >= i; j--) {
817 				kmem_free(pmc[j], size * sizeof (char));
818 			}
819 			kmem_free(pmc, (cpupm->num_spd + 1) *
820 			    sizeof (char *));
821 			return (result);
822 		}
823 		CPUDRV_PM_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd)
824 		DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: "
825 		    "instance %d: pm-components power level %d string '%s'\n",
826 		    ddi_get_instance(cpudsp->dip), i, pmc[i]));
827 	}
828 	pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP);
829 	(void) strcat(pmc[0], name);
830 	DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: instance %d: "
831 	    "pm-components component name '%s'\n",
832 	    ddi_get_instance(cpudsp->dip), pmc[0]));
833 
834 	if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip,
835 	    "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) {
836 		result = DDI_SUCCESS;
837 	} else {
838 		cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: "
839 		    "can't create pm-components property",
840 		    ddi_get_instance(cpudsp->dip));
841 	}
842 
843 	for (i = cpupm->num_spd; i > 0; i--) {
844 		kmem_free(pmc[i], size * sizeof (char));
845 	}
846 	kmem_free(pmc[0], sizeof (name));
847 	kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
848 	return (result);
849 }
850 
851 /*
852  * Mark a component idle.
853  */
854 #define	CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm) { \
855 	if ((cpupm)->pm_busycnt >= 1) { \
856 		if (pm_idle_component((dip), CPUDRV_PM_COMP_NUM) == \
857 		    DDI_SUCCESS) { \
858 			DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \
859 			    "instance %d: pm_idle_component called\n", \
860 			    ddi_get_instance((dip)))); \
861 			(cpupm)->pm_busycnt--; \
862 		} else { \
863 			cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \
864 			    "can't idle CPU component", \
865 			    ddi_get_instance((dip))); \
866 		} \
867 	} \
868 }
869 
870 /*
871  * Marks a component busy in both PM framework and driver state structure.
872  */
873 #define	CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm) { \
874 	if ((cpupm)->pm_busycnt < 1) { \
875 		if (pm_busy_component((dip), CPUDRV_PM_COMP_NUM) == \
876 		    DDI_SUCCESS) { \
877 			DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \
878 			    "instance %d: pm_busy_component called\n", \
879 			    ddi_get_instance((dip)))); \
880 			(cpupm)->pm_busycnt++; \
881 		} else { \
882 			cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \
883 			    "can't busy CPU component", \
884 			    ddi_get_instance((dip))); \
885 		} \
886 	} \
887 }
888 
889 /*
890  * Marks a component busy and calls pm_raise_power().
891  */
892 #define	CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_level) { \
893 	/* \
894 	 * Mark driver and PM framework busy first so framework doesn't try \
895 	 * to bring CPU to lower speed when we need to be at higher speed. \
896 	 */ \
897 	CPUDRV_PM_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \
898 	mutex_exit(&(cpudsp)->lock); \
899 	DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " \
900 	    "pm_raise_power called to %d\n", ddi_get_instance((dip)), \
901 		(new_level))); \
902 	if (pm_raise_power((dip), CPUDRV_PM_COMP_NUM, (new_level)) != \
903 	    DDI_SUCCESS) { \
904 		cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't " \
905 		    "raise CPU power level", ddi_get_instance((dip))); \
906 	} \
907 	mutex_enter(&(cpudsp)->lock); \
908 }
909 
910 /*
911  * In order to monitor a CPU, we need to hold cpu_lock to access CPU
912  * statistics. Holding cpu_lock is not allowed from a callout routine.
913  * We dispatch a taskq to do that job.
914  */
915 static void
916 cpudrv_pm_monitor_disp(void *arg)
917 {
918 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
919 
920 	/*
921 	 * We are here because the last task has scheduled a timeout.
922 	 * The queue should be empty at this time.
923 	 */
924 	mutex_enter(&cpudsp->cpudrv_pm.timeout_lock);
925 	if (!taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_pm_monitor, arg,
926 	    TQ_NOSLEEP)) {
927 		mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
928 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor_disp: failed to "
929 		    "dispatch the cpudrv_pm_monitor taskq\n"));
930 		mutex_enter(&cpudsp->lock);
931 		CPUDRV_PM_MONITOR_INIT(cpudsp);
932 		mutex_exit(&cpudsp->lock);
933 		return;
934 	}
935 	cpudsp->cpudrv_pm.timeout_count++;
936 	mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
937 }
938 
939 /*
940  * Monitors each CPU for the amount of time idle thread was running in the
941  * last quantum and arranges for the CPU to go to the lower or higher speed.
942  * Called at the time interval appropriate for the current speed. The
943  * time interval for normal speed is CPUDRV_PM_QUANT_CNT_NORMAL. The time
944  * interval for other speeds (including unknown speed) is
945  * CPUDRV_PM_QUANT_CNT_OTHR.
946  */
947 static void
948 cpudrv_pm_monitor(void *arg)
949 {
950 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
951 	cpudrv_pm_t		*cpupm;
952 	cpudrv_pm_spd_t		*cur_spd, *new_spd;
953 	cpu_t			*cp;
954 	dev_info_t		*dip;
955 	uint_t			idle_cnt, user_cnt, system_cnt;
956 	clock_t			lbolt_cnt;
957 	hrtime_t		msnsecs[NCMSTATES];
958 	boolean_t		is_ready;
959 
960 #define	GET_CPU_MSTATE_CNT(state, cnt) \
961 	msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \
962 	if (cpupm->lastquan_mstate[state] > msnsecs[state]) \
963 		msnsecs[state] = cpupm->lastquan_mstate[state]; \
964 	cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \
965 	cpupm->lastquan_mstate[state] = msnsecs[state]
966 
967 	mutex_enter(&cpudsp->lock);
968 	cpupm = &(cpudsp->cpudrv_pm);
969 	if (cpupm->timeout_id == 0) {
970 		mutex_exit(&cpudsp->lock);
971 		goto do_return;
972 	}
973 	cur_spd = cpupm->cur_spd;
974 	dip = cpudsp->dip;
975 
976 	/*
977 	 * We assume that a CPU is initialized and has a valid cpu_t
978 	 * structure, if it is ready for cross calls. If this changes,
979 	 * additional checks might be needed.
980 	 *
981 	 * Additionally, for x86 platforms we cannot power manage
982 	 * any one instance, until all instances have been initialized.
983 	 * That's because we don't know what the CPU domains look like
984 	 * until all instances have been initialized.
985 	 */
986 	is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id);
987 	if (!is_ready) {
988 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: "
989 		    "CPU not ready for x-calls\n", ddi_get_instance(dip)));
990 	} else if (!(is_ready = cpudrv_pm_power_ready())) {
991 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: "
992 		    "waiting for all CPUs to be power manageable\n",
993 		    ddi_get_instance(dip)));
994 	}
995 	if (!is_ready) {
996 		/*
997 		 * Make sure that we are busy so that framework doesn't
998 		 * try to bring us down in this situation.
999 		 */
1000 		CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm);
1001 		CPUDRV_PM_MONITOR_INIT(cpudsp);
1002 		mutex_exit(&cpudsp->lock);
1003 		goto do_return;
1004 	}
1005 
1006 	/*
1007 	 * Make sure that we are still not at unknown power level.
1008 	 */
1009 	if (cur_spd == NULL) {
1010 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: "
1011 		    "cur_spd is unknown\n", ddi_get_instance(dip)));
1012 		CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
1013 		    CPUDRV_PM_TOPSPEED(cpupm)->pm_level);
1014 		/*
1015 		 * We just changed the speed. Wait till at least next
1016 		 * call to this routine before proceeding ahead.
1017 		 */
1018 		CPUDRV_PM_MONITOR_INIT(cpudsp);
1019 		mutex_exit(&cpudsp->lock);
1020 		goto do_return;
1021 	}
1022 
1023 	mutex_enter(&cpu_lock);
1024 	if ((cp = cpu_get(cpudsp->cpu_id)) == NULL) {
1025 		mutex_exit(&cpu_lock);
1026 		CPUDRV_PM_MONITOR_INIT(cpudsp);
1027 		mutex_exit(&cpudsp->lock);
1028 		cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't get "
1029 		    "cpu_t", ddi_get_instance(dip));
1030 		goto do_return;
1031 	}
1032 
1033 	if (!cpupm->pm_started) {
1034 		cpupm->pm_started = B_TRUE;
1035 		set_supp_freqs(cp, cpupm);
1036 	}
1037 
1038 	get_cpu_mstate(cp, msnsecs);
1039 	GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt);
1040 	GET_CPU_MSTATE_CNT(CMS_USER, user_cnt);
1041 	GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt);
1042 
1043 	/*
1044 	 * We can't do anything when we have just switched to a state
1045 	 * because there is no valid timestamp.
1046 	 */
1047 	if (cpupm->lastquan_lbolt == 0) {
1048 		cpupm->lastquan_lbolt = lbolt;
1049 		mutex_exit(&cpu_lock);
1050 		CPUDRV_PM_MONITOR_INIT(cpudsp);
1051 		mutex_exit(&cpudsp->lock);
1052 		goto do_return;
1053 	}
1054 
1055 	/*
1056 	 * Various watermarks are based on this routine being called back
1057 	 * exactly at the requested period. This is not guaranteed
1058 	 * because this routine is called from a taskq that is dispatched
1059 	 * from a timeout routine.  Handle this by finding out how many
1060 	 * ticks have elapsed since the last call (lbolt_cnt) and adjusting
1061 	 * the idle_cnt based on the delay added to the requested period
1062 	 * by timeout and taskq.
1063 	 */
1064 	lbolt_cnt = lbolt - cpupm->lastquan_lbolt;
1065 	cpupm->lastquan_lbolt = lbolt;
1066 	mutex_exit(&cpu_lock);
1067 	/*
1068 	 * Time taken between recording the current counts and
1069 	 * arranging the next call of this routine is an error in our
1070 	 * calculation. We minimize the error by calling
1071 	 * CPUDRV_PM_MONITOR_INIT() here instead of end of this routine.
1072 	 */
1073 	CPUDRV_PM_MONITOR_INIT(cpudsp);
1074 	DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_pm_monitor: instance %d: "
1075 	    "idle count %d, user count %d, system count %d, pm_level %d, "
1076 	    "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt,
1077 	    system_cnt, cur_spd->pm_level, cpupm->pm_busycnt));
1078 
1079 #ifdef	DEBUG
1080 	/*
1081 	 * Notify that timeout and taskq has caused delays and we need to
1082 	 * scale our parameters accordingly.
1083 	 *
1084 	 * To get accurate result, don't turn on other DPRINTFs with
1085 	 * the following DPRINTF. PROM calls generated by other
1086 	 * DPRINTFs changes the timing.
1087 	 */
1088 	if (lbolt_cnt > cur_spd->quant_cnt) {
1089 		DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_pm_monitor: instance %d: "
1090 		    "lbolt count %ld > quantum_count %u\n",
1091 		    ddi_get_instance(dip), lbolt_cnt, cur_spd->quant_cnt));
1092 	}
1093 #endif	/* DEBUG */
1094 
1095 	/*
1096 	 * Adjust counts based on the delay added by timeout and taskq.
1097 	 */
1098 	idle_cnt = (idle_cnt * cur_spd->quant_cnt) / lbolt_cnt;
1099 	user_cnt = (user_cnt * cur_spd->quant_cnt) / lbolt_cnt;
1100 	if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm &&
1101 	    cur_spd->idle_blwm_cnt >= cpudrv_pm_idle_blwm_cnt_max)) {
1102 		cur_spd->idle_blwm_cnt = 0;
1103 		cur_spd->idle_bhwm_cnt = 0;
1104 		/*
1105 		 * In normal situation, arrange to go to next higher speed.
1106 		 * If we are running in special direct pm mode, we just stay
1107 		 * at the current speed.
1108 		 */
1109 		if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) {
1110 			CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm);
1111 		} else {
1112 			new_spd = cur_spd->up_spd;
1113 			CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
1114 			    new_spd->pm_level);
1115 		}
1116 	} else if ((user_cnt <= cur_spd->user_lwm) &&
1117 	    (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cp)) {
1118 		cur_spd->idle_blwm_cnt = 0;
1119 		cur_spd->idle_bhwm_cnt = 0;
1120 		/*
1121 		 * Arrange to go to next lower speed by informing our idle
1122 		 * status to the power management framework.
1123 		 */
1124 		CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm);
1125 	} else {
1126 		/*
1127 		 * If we are between the idle water marks and have not
1128 		 * been here enough consecutive times to be considered
1129 		 * busy, just increment the count and return.
1130 		 */
1131 		if ((idle_cnt < cur_spd->idle_hwm) &&
1132 		    (idle_cnt >= cur_spd->idle_lwm) &&
1133 		    (cur_spd->idle_bhwm_cnt < cpudrv_pm_idle_bhwm_cnt_max)) {
1134 			cur_spd->idle_blwm_cnt = 0;
1135 			cur_spd->idle_bhwm_cnt++;
1136 			mutex_exit(&cpudsp->lock);
1137 			goto do_return;
1138 		}
1139 		if (idle_cnt < cur_spd->idle_lwm) {
1140 			cur_spd->idle_blwm_cnt++;
1141 			cur_spd->idle_bhwm_cnt = 0;
1142 		}
1143 		/*
1144 		 * Arranges to stay at the current speed.
1145 		 */
1146 		CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm);
1147 	}
1148 	mutex_exit(&cpudsp->lock);
1149 do_return:
1150 	mutex_enter(&cpupm->timeout_lock);
1151 	ASSERT(cpupm->timeout_count > 0);
1152 	cpupm->timeout_count--;
1153 	cv_signal(&cpupm->timeout_cv);
1154 	mutex_exit(&cpupm->timeout_lock);
1155 }
1156