xref: /titanic_44/usr/src/uts/sun4v/os/mach_cpu_states.c (revision 0400f3c0732a5d19212a4bdd9fedd71f69d3cd51)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include <sys/types.h>
30 #include <sys/systm.h>
31 #include <sys/archsystm.h>
32 #include <sys/t_lock.h>
33 #include <sys/uadmin.h>
34 #include <sys/panic.h>
35 #include <sys/reboot.h>
36 #include <sys/autoconf.h>
37 #include <sys/machsystm.h>
38 #include <sys/promif.h>
39 #include <sys/membar.h>
40 #include <vm/hat_sfmmu.h>
41 #include <sys/cpu_module.h>
42 #include <sys/cpu_sgnblk_defs.h>
43 #include <sys/intreg.h>
44 #include <sys/consdev.h>
45 #include <sys/kdi_impl.h>
46 #include <sys/traptrace.h>
47 #include <sys/hypervisor_api.h>
48 #include <sys/vmsystm.h>
49 #include <sys/dtrace.h>
50 #include <sys/xc_impl.h>
51 #include <sys/callb.h>
52 
53 /*
54  * hvdump_buf_va is a pointer to the currently-configured hvdump_buf.
55  * A value of NULL indicates that this area is not configured.
56  * hvdump_buf_sz is tunable but will be clamped to HVDUMP_SIZE_MAX.
57  */
58 
59 caddr_t hvdump_buf_va;
60 uint64_t hvdump_buf_sz = HVDUMP_SIZE_DEFAULT;
61 static uint64_t hvdump_buf_pa;
62 
63 u_longlong_t panic_tick;
64 
65 extern u_longlong_t gettick();
66 static void reboot_machine(char *);
67 static void update_hvdump_buffer(void);
68 
69 /*
70  * For xt_sync synchronization.
71  */
72 extern uint64_t xc_tick_limit;
73 extern uint64_t xc_tick_jump_limit;
74 
75 /*
76  * We keep our own copies, used for cache flushing, because we can be called
77  * before cpu_fiximpl().
78  */
79 static int kdi_dcache_size;
80 static int kdi_dcache_linesize;
81 static int kdi_icache_size;
82 static int kdi_icache_linesize;
83 
84 /*
85  * Assembly support for generic modules in sun4v/ml/mach_xc.s
86  */
87 extern void init_mondo_nocheck(xcfunc_t *func, uint64_t arg1, uint64_t arg2);
88 extern void kdi_flush_idcache(int, int, int, int);
89 extern uint64_t get_cpuaddr(uint64_t, uint64_t);
90 
91 /*
92  * Machine dependent code to reboot.
93  * "mdep" is interpreted as a character pointer; if non-null, it is a pointer
94  * to a string to be used as the argument string when rebooting.
95  *
96  * "invoke_cb" is a boolean. It is set to true when mdboot() can safely
97  * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when
98  * we are in a normal shutdown sequence (interrupts are not blocked, the
99  * system is not panic'ing or being suspended).
100  */
101 /*ARGSUSED*/
102 void
103 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb)
104 {
105 	extern void pm_cfb_check_and_powerup(void);
106 
107 	/*
108 	 * XXX - rconsvp is set to NULL to ensure that output messages
109 	 * are sent to the underlying "hardware" device using the
110 	 * monitor's printf routine since we are in the process of
111 	 * either rebooting or halting the machine.
112 	 */
113 	rconsvp = NULL;
114 
115 	/*
116 	 * At a high interrupt level we can't:
117 	 *	1) bring up the console
118 	 * or
119 	 *	2) wait for pending interrupts prior to redistribution
120 	 *	   to the current CPU
121 	 *
122 	 * so we do them now.
123 	 */
124 	pm_cfb_check_and_powerup();
125 
126 	/* make sure there are no more changes to the device tree */
127 	devtree_freeze();
128 
129 	if (invoke_cb)
130 		(void) callb_execute_class(CB_CL_MDBOOT, NULL);
131 
132 	/*
133 	 * Clear any unresolved UEs from memory.
134 	 */
135 	if (memsegs != NULL)
136 		page_retire_hunt(page_retire_mdboot_cb);
137 
138 	/*
139 	 * stop other cpus which also raise our priority. since there is only
140 	 * one active cpu after this, and our priority will be too high
141 	 * for us to be preempted, we're essentially single threaded
142 	 * from here on out.
143 	 */
144 	stop_other_cpus();
145 
146 	/*
147 	 * try and reset leaf devices.  reset_leaves() should only
148 	 * be called when there are no other threads that could be
149 	 * accessing devices
150 	 */
151 	reset_leaves();
152 
153 	if (fcn == AD_HALT) {
154 		halt((char *)NULL);
155 	} else if (fcn == AD_POWEROFF) {
156 		power_down(NULL);
157 	} else {
158 		if (bootstr == NULL) {
159 			switch (fcn) {
160 
161 			case AD_BOOT:
162 				bootstr = "";
163 				break;
164 
165 			case AD_IBOOT:
166 				bootstr = "-a";
167 				break;
168 
169 			case AD_SBOOT:
170 				bootstr = "-s";
171 				break;
172 
173 			case AD_SIBOOT:
174 				bootstr = "-sa";
175 				break;
176 			default:
177 				cmn_err(CE_WARN,
178 				    "mdboot: invalid function %d", fcn);
179 				bootstr = "";
180 				break;
181 			}
182 		}
183 		reboot_machine(bootstr);
184 	}
185 	/* MAYBE REACHED */
186 }
187 
188 /* mdpreboot - may be called prior to mdboot while root fs still mounted */
189 /*ARGSUSED*/
190 void
191 mdpreboot(int cmd, int fcn, char *bootstr)
192 {
193 }
194 
195 /*
196  * Halt the machine and then reboot with the device
197  * and arguments specified in bootstr.
198  */
199 static void
200 reboot_machine(char *bootstr)
201 {
202 	flush_windows();
203 	stop_other_cpus();		/* send stop signal to other CPUs */
204 	prom_printf("rebooting...\n");
205 	/*
206 	 * For platforms that use CPU signatures, we
207 	 * need to set the signature block to OS and
208 	 * the state to exiting for all the processors.
209 	 */
210 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1);
211 	prom_reboot(bootstr);
212 	/*NOTREACHED*/
213 }
214 
215 /*
216  * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs.
217  * Once in panic_idle() they raise spl, record their location, and spin.
218  */
219 static void
220 panic_idle(void)
221 {
222 	(void) spl7();
223 
224 	debug_flush_windows();
225 	(void) setjmp(&curthread->t_pcb);
226 
227 	CPU->cpu_m.in_prom = 1;
228 	membar_stld();
229 
230 	for (;;);
231 }
232 
233 /*
234  * Force the other CPUs to trap into panic_idle(), and then remove them
235  * from the cpu_ready_set so they will no longer receive cross-calls.
236  */
237 /*ARGSUSED*/
238 void
239 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl)
240 {
241 	cpuset_t cps;
242 	int i;
243 
244 	(void) splzs();
245 	CPUSET_ALL_BUT(cps, cp->cpu_id);
246 	xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL);
247 
248 	for (i = 0; i < NCPU; i++) {
249 		if (i != cp->cpu_id && CPU_XCALL_READY(i)) {
250 			int ntries = 0x10000;
251 
252 			while (!cpu[i]->cpu_m.in_prom && ntries) {
253 				DELAY(50);
254 				ntries--;
255 			}
256 
257 			if (!cpu[i]->cpu_m.in_prom)
258 				printf("panic: failed to stop cpu%d\n", i);
259 
260 			cpu[i]->cpu_flags &= ~CPU_READY;
261 			cpu[i]->cpu_flags |= CPU_QUIESCED;
262 			CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id);
263 		}
264 	}
265 }
266 
267 /*
268  * Platform callback following each entry to panicsys().  If we've panicked at
269  * level 14, we examine t_panic_trap to see if a fatal trap occurred.  If so,
270  * we disable further %tick_cmpr interrupts.  If not, an explicit call to panic
271  * was made and so we re-enqueue an interrupt request structure to allow
272  * further level 14 interrupts to be processed once we lower PIL.  This allows
273  * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic.
274  */
275 void
276 panic_enter_hw(int spl)
277 {
278 	if (!panic_tick) {
279 		panic_tick = gettick();
280 		if (mach_htraptrace_enable) {
281 			uint64_t prev_freeze;
282 
283 			/*  there are no possible error codes for this hcall */
284 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
285 			    &prev_freeze);
286 		}
287 #ifdef TRAPTRACE
288 		TRAPTRACE_FREEZE;
289 #endif
290 	}
291 	if (spl == ipltospl(PIL_14)) {
292 		uint_t opstate = disable_vec_intr();
293 
294 		if (curthread->t_panic_trap != NULL) {
295 			tickcmpr_disable();
296 			intr_dequeue_req(PIL_14, cbe_level14_inum);
297 		} else {
298 			if (!tickcmpr_disabled())
299 				intr_enqueue_req(PIL_14, cbe_level14_inum);
300 			/*
301 			 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT)
302 			 * and SOFTINT<16> (STICK_INT) to indicate
303 			 * that the current level 14 has been serviced.
304 			 */
305 			wr_clr_softint((1 << PIL_14) |
306 				TICK_INT_MASK | STICK_INT_MASK);
307 		}
308 
309 		enable_vec_intr(opstate);
310 	}
311 }
312 
313 /*
314  * Miscellaneous hardware-specific code to execute after panicstr is set
315  * by the panic code: we also print and record PTL1 panic information here.
316  */
317 /*ARGSUSED*/
318 void
319 panic_quiesce_hw(panic_data_t *pdp)
320 {
321 	extern uint_t getpstate(void);
322 	extern void setpstate(uint_t);
323 
324 	/*
325 	 * Turn off TRAPTRACE and save the current %tick value in panic_tick.
326 	 */
327 	if (!panic_tick) {
328 		panic_tick = gettick();
329 		if (mach_htraptrace_enable) {
330 			uint64_t prev_freeze;
331 
332 			/*  there are no possible error codes for this hcall */
333 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
334 			    &prev_freeze);
335 		}
336 #ifdef TRAPTRACE
337 		TRAPTRACE_FREEZE;
338 #endif
339 	}
340 	/*
341 	 * For Platforms that use CPU signatures, we
342 	 * need to set the signature block to OS, the state to
343 	 * exiting, and the substate to panic for all the processors.
344 	 */
345 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1);
346 
347 	update_hvdump_buffer();
348 
349 	/*
350 	 * Disable further ECC errors from the bus nexus.
351 	 */
352 	(void) bus_func_invoke(BF_TYPE_ERRDIS);
353 
354 	/*
355 	 * Redirect all interrupts to the current CPU.
356 	 */
357 	intr_redist_all_cpus_shutdown();
358 
359 	/*
360 	 * This call exists solely to support dumps to network
361 	 * devices after sync from OBP.
362 	 *
363 	 * If we came here via the sync callback, then on some
364 	 * platforms, interrupts may have arrived while we were
365 	 * stopped in OBP.  OBP will arrange for those interrupts to
366 	 * be redelivered if you say "go", but not if you invoke a
367 	 * client callback like 'sync'.	 For some dump devices
368 	 * (network swap devices), we need interrupts to be
369 	 * delivered in order to dump, so we have to call the bus
370 	 * nexus driver to reset the interrupt state machines.
371 	 */
372 	(void) bus_func_invoke(BF_TYPE_RESINTR);
373 
374 	setpstate(getpstate() | PSTATE_IE);
375 }
376 
377 /*
378  * Platforms that use CPU signatures need to set the signature block to OS and
379  * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to
380  * write the crash dump, which tells the SSP/SMS to begin a timeout routine to
381  * reboot the machine if the dump never completes.
382  */
383 /*ARGSUSED*/
384 void
385 panic_dump_hw(int spl)
386 {
387 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1);
388 }
389 
390 /*
391  * for ptl1_panic
392  */
393 void
394 ptl1_init_cpu(struct cpu *cpu)
395 {
396 	ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state;
397 
398 	/*CONSTCOND*/
399 	if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) {
400 		panic("ptl1_init_cpu: not enough space left for ptl1_panic "
401 		    "stack, sizeof (struct cpu) = %lu",
402 		    (unsigned long)sizeof (struct cpu));
403 	}
404 
405 	pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE;
406 	cpu_pa[cpu->cpu_id] = va_to_pa(cpu);
407 }
408 
409 void
410 ptl1_panic_handler(ptl1_state_t *pstate)
411 {
412 	static const char *ptl1_reasons[] = {
413 #ifdef	PTL1_PANIC_DEBUG
414 		"trap for debug purpose",	/* PTL1_BAD_DEBUG */
415 #else
416 		"unknown trap",			/* PTL1_BAD_DEBUG */
417 #endif
418 		"register window trap",		/* PTL1_BAD_WTRAP */
419 		"kernel MMU miss",		/* PTL1_BAD_KMISS */
420 		"kernel protection fault",	/* PTL1_BAD_KPROT_FAULT */
421 		"ISM MMU miss",			/* PTL1_BAD_ISM */
422 		"kernel MMU trap",		/* PTL1_BAD_MMUTRAP */
423 		"kernel trap handler state",	/* PTL1_BAD_TRAP */
424 		"floating point trap",		/* PTL1_BAD_FPTRAP */
425 #ifdef	DEBUG
426 		"pointer to intr_req",		/* PTL1_BAD_INTR_REQ */
427 #else
428 		"unknown trap",			/* PTL1_BAD_INTR_REQ */
429 #endif
430 #ifdef	TRAPTRACE
431 		"TRACE_PTR state",		/* PTL1_BAD_TRACE_PTR */
432 #else
433 		"unknown trap",			/* PTL1_BAD_TRACE_PTR */
434 #endif
435 		"stack overflow",		/* PTL1_BAD_STACK */
436 		"DTrace flags",			/* PTL1_BAD_DTRACE_FLAGS */
437 		"attempt to steal locked ctx",  /* PTL1_BAD_CTX_STEAL */
438 		"CPU ECC error loop",		/* PTL1_BAD_ECC */
439 		"unexpected error from hypervisor call", /* PTL1_BAD_HCALL */
440 		"unexpected global level(%gl)", /* PTL1_BAD_GL */
441 	};
442 
443 	uint_t reason = pstate->ptl1_regs.ptl1_gregs[0].ptl1_g1;
444 	uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl;
445 	struct trap_info ti = { 0 };
446 
447 	/*
448 	 * Use trap_info for a place holder to call panic_savetrap() and
449 	 * panic_showtrap() to save and print out ptl1_panic information.
450 	 */
451 	if (curthread->t_panic_trap == NULL)
452 		curthread->t_panic_trap = &ti;
453 
454 	if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0]))
455 		panic("bad %s at TL %u", ptl1_reasons[reason], tl);
456 	else
457 		panic("ptl1_panic reason 0x%x at TL %u", reason, tl);
458 }
459 
460 void
461 clear_watchdog_on_exit(void)
462 {
463 }
464 
465 void
466 clear_watchdog_timer(void)
467 {
468 }
469 
470 int
471 kdi_watchdog_disable(void)
472 {
473 	return (0);	/* sun4v has no watchdog */
474 }
475 
476 void
477 kdi_watchdog_restore(void)
478 {
479 	/* nothing to do -- no watchdog to re-enable */
480 }
481 
482 void
483 mach_dump_buffer_init(void)
484 {
485 	uint64_t  ret, minsize = 0;
486 
487 	if (hvdump_buf_sz > HVDUMP_SIZE_MAX)
488 		hvdump_buf_sz = HVDUMP_SIZE_MAX;
489 
490 	hvdump_buf_va = contig_mem_alloc_align(hvdump_buf_sz, PAGESIZE);
491 	if (hvdump_buf_va == NULL)
492 		return;
493 
494 	hvdump_buf_pa = va_to_pa(hvdump_buf_va);
495 
496 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
497 	    &minsize);
498 
499 	if (ret != H_EOK) {
500 		contig_mem_free(hvdump_buf_va, hvdump_buf_sz);
501 		hvdump_buf_va = NULL;
502 		cmn_err(CE_NOTE, "!Error in setting up hvstate"
503 		    "dump buffer. Error = 0x%lx, size = 0x%lx,"
504 		    "buf_pa = 0x%lx", ret, hvdump_buf_sz,
505 		    hvdump_buf_pa);
506 
507 		if (ret == H_EINVAL) {
508 			cmn_err(CE_NOTE, "!Buffer size too small."
509 			    "Available buffer size = 0x%lx,"
510 			    "Minimum buffer size required = 0x%lx",
511 			    hvdump_buf_sz, minsize);
512 		}
513 	}
514 }
515 
516 
517 static void
518 update_hvdump_buffer(void)
519 {
520 	uint64_t ret, dummy_val;
521 
522 	if (hvdump_buf_va == NULL)
523 		return;
524 
525 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
526 	    &dummy_val);
527 	if (ret != H_EOK) {
528 		cmn_err(CE_NOTE, "!Cannot update hvstate dump"
529 		    "buffer. Error = 0x%lx", ret);
530 	}
531 }
532 
533 
534 static int
535 getintprop(pnode_t node, char *name, int deflt)
536 {
537 	int	value;
538 
539 	switch (prom_getproplen(node, name)) {
540 	case 0:
541 		value = 1;	/* boolean properties */
542 		break;
543 
544 	case sizeof (int):
545 		(void) prom_getprop(node, name, (caddr_t)&value);
546 		break;
547 
548 	default:
549 		value = deflt;
550 		break;
551 	}
552 
553 	return (value);
554 }
555 
556 /*
557  * Called by setcpudelay
558  */
559 void
560 cpu_init_tick_freq(void)
561 {
562 	sys_tick_freq = cpunodes[CPU->cpu_id].clock_freq;
563 }
564 
565 int shipit(int n, uint64_t cpu_list_ra);
566 extern uint64_t xc_tick_limit;
567 extern uint64_t xc_tick_jump_limit;
568 
569 #ifdef DEBUG
570 #define	SEND_MONDO_STATS	1
571 #endif
572 
573 #ifdef SEND_MONDO_STATS
574 uint32_t x_one_stimes[64];
575 uint32_t x_one_ltimes[16];
576 uint32_t x_set_stimes[64];
577 uint32_t x_set_ltimes[16];
578 uint32_t x_set_cpus[NCPU];
579 #endif
580 
581 void
582 send_one_mondo(int cpuid)
583 {
584 	int retries, stat;
585 	uint64_t starttick, endtick, tick, lasttick;
586 	struct machcpu	*mcpup = &(CPU->cpu_m);
587 
588 	CPU_STATS_ADDQ(CPU, sys, xcalls, 1);
589 	starttick = lasttick = gettick();
590 	mcpup->cpu_list[0] = (uint16_t)cpuid;
591 	stat = shipit(1, mcpup->cpu_list_ra);
592 	endtick = starttick + xc_tick_limit;
593 	retries = 0;
594 	while (stat != 0) {
595 		ASSERT(stat == H_EWOULDBLOCK);
596 		tick = gettick();
597 		/*
598 		 * If there is a big jump between the current tick
599 		 * count and lasttick, we have probably hit a break
600 		 * point.  Adjust endtick accordingly to avoid panic.
601 		 */
602 		if (tick > (lasttick + xc_tick_jump_limit))
603 			endtick += (tick - lasttick);
604 		lasttick = tick;
605 		if (tick > endtick) {
606 			if (panic_quiesce)
607 				return;
608 			cmn_err(CE_PANIC, "send mondo timeout "
609 			    "(target 0x%x) [retries: 0x%x hvstat: 0x%x]",
610 			    cpuid, retries, stat);
611 		}
612 		drv_usecwait(1);
613 		stat = shipit(1, mcpup->cpu_list_ra);
614 		retries++;
615 	}
616 #ifdef SEND_MONDO_STATS
617 	{
618 		int n = gettick() - starttick;
619 		if (n < 8192)
620 			x_one_stimes[n >> 7]++;
621 		else if (n < 16*8192)
622 			x_one_ltimes[(n >> 13) & 0xf]++;
623 		else
624 			x_one_ltimes[0xf]++;
625 	}
626 #endif
627 }
628 
629 void
630 send_mondo_set(cpuset_t set)
631 {
632 	uint64_t starttick, endtick, tick, lasttick;
633 	int i, retries, stat, fcpuid, lcpuid;
634 	int ncpuids = 0;
635 	int shipped = 0;
636 	struct machcpu	*mcpup = &(CPU->cpu_m);
637 
638 	ASSERT(!CPUSET_ISNULL(set));
639 	starttick = lasttick = gettick();
640 	endtick = starttick + xc_tick_limit;
641 
642 	fcpuid = -1;
643 	for (i = 0; i < NCPU; i++) {
644 		if (CPU_IN_SET(set, i)) {
645 			ncpuids++;
646 			mcpup->cpu_list[0] = (uint16_t)i;
647 			stat = shipit(1, mcpup->cpu_list_ra);
648 			if (stat != 0) {
649 				ASSERT(stat == H_EWOULDBLOCK);
650 				if (fcpuid < 0)
651 					fcpuid = i;
652 				lcpuid = i;
653 				continue;
654 			}
655 			shipped++;
656 			CPUSET_DEL(set, i);
657 			if (CPUSET_ISNULL(set))
658 				break;
659 		}
660 	}
661 
662 	retries = 0;
663 	while (shipped < ncpuids) {
664 		ASSERT(fcpuid >= 0 && fcpuid <= lcpuid && lcpuid < NCPU);
665 		tick = gettick();
666 		/*
667 		 * If there is a big jump between the current tick
668 		 * count and lasttick, we have probably hit a break
669 		 * point.  Adjust endtick accordingly to avoid panic.
670 		 */
671 		if (tick > (lasttick + xc_tick_jump_limit))
672 			endtick += (tick - lasttick);
673 		lasttick = tick;
674 		if (tick > endtick) {
675 			if (panic_quiesce)
676 				return;
677 			cmn_err(CE_CONT, "send mondo timeout "
678 			    "[retries: 0x%x]  cpuids: ", retries);
679 			for (i = fcpuid; i <= lcpuid; i++) {
680 				if (CPU_IN_SET(set, i))
681 					cmn_err(CE_CONT, " 0x%x", i);
682 			}
683 			cmn_err(CE_CONT, "\n");
684 			cmn_err(CE_PANIC, "send_mondo_set: timeout");
685 		}
686 
687 		/* adjust fcpuid to the first CPU in set */
688 		for (; fcpuid <= lcpuid; fcpuid++)
689 			if (CPU_IN_SET(set, fcpuid))
690 				break;
691 
692 		/* adjust lcpuid to the last CPU in set */
693 		for (; lcpuid >= fcpuid; lcpuid--)
694 			if (CPU_IN_SET(set, lcpuid))
695 				break;
696 
697 		/* resend undelivered mondo */
698 		for (i = fcpuid; i <= lcpuid; i++) {
699 			if (CPU_IN_SET(set, i)) {
700 				mcpup->cpu_list[0] = (uint16_t)i;
701 				stat = shipit(1, mcpup->cpu_list_ra);
702 				if (stat != 0) {
703 					ASSERT(stat == H_EWOULDBLOCK);
704 					continue;
705 				}
706 				shipped++;
707 				CPUSET_DEL(set, i);
708 				if (shipped == ncpuids)
709 					break;
710 			}
711 		}
712 		if (shipped == ncpuids)
713 			break;
714 
715 		while (gettick() < (tick + sys_clock_mhz))
716 			;
717 		retries++;
718 	}
719 
720 #ifdef SEND_MONDO_STATS
721 	{
722 		int n = gettick() - starttick;
723 		if (n < 8192)
724 			x_set_stimes[n >> 7]++;
725 		else if (n < 16*8192)
726 			x_set_ltimes[(n >> 13) & 0xf]++;
727 		else
728 			x_set_ltimes[0xf]++;
729 	}
730 	x_set_cpus[shipped]++;
731 #endif
732 }
733 
734 void
735 syncfpu(void)
736 {
737 }
738 
739 void
740 cpu_flush_ecache(void)
741 {
742 }
743 
744 void
745 sticksync_slave(void)
746 {}
747 
748 void
749 sticksync_master(void)
750 {}
751 
752 void
753 cpu_init_cache_scrub(void)
754 {}
755 
756 int
757 dtrace_blksuword32_err(uintptr_t addr, uint32_t *data)
758 {
759 	int ret, watched;
760 
761 	watched = watch_disable_addr((void *)addr, 4, S_WRITE);
762 	ret = dtrace_blksuword32(addr, data, 0);
763 	if (watched)
764 		watch_enable_addr((void *)addr, 4, S_WRITE);
765 
766 	return (ret);
767 }
768 
769 int
770 dtrace_blksuword32(uintptr_t addr, uint32_t *data, int tryagain)
771 {
772 	if (suword32((void *)addr, *data) == -1)
773 		return (tryagain ? dtrace_blksuword32_err(addr, data) : -1);
774 	dtrace_flush_sec(addr);
775 
776 	return (0);
777 }
778 
779 /*ARGSUSED*/
780 void
781 cpu_faulted_enter(struct cpu *cp)
782 {
783 }
784 
785 /*ARGSUSED*/
786 void
787 cpu_faulted_exit(struct cpu *cp)
788 {
789 }
790 
791 static int
792 kdi_cpu_ready_iter(int (*cb)(int, void *), void *arg)
793 {
794 	int rc, i;
795 
796 	for (rc = 0, i = 0; i < NCPU; i++) {
797 		if (CPU_IN_SET(cpu_ready_set, i))
798 			rc += cb(i, arg);
799 	}
800 
801 	return (rc);
802 }
803 
804 /*
805  * Sends a cross-call to a specified processor.  The caller assumes
806  * responsibility for repetition of cross-calls, as appropriate (MARSA for
807  * debugging).
808  */
809 static int
810 kdi_xc_one(int cpuid, void (*func)(uintptr_t, uintptr_t), uintptr_t arg1,
811     uintptr_t arg2)
812 {
813 	int stat;
814 	struct machcpu	*mcpup;
815 	uint64_t cpuaddr_reg = 0, cpuaddr_scr = 0;
816 
817 	mcpup = &(((cpu_t *)get_cpuaddr(cpuaddr_reg, cpuaddr_scr))->cpu_m);
818 
819 	/*
820 	 * if (idsr_busy())
821 	 *	return (KDI_XC_RES_ERR);
822 	 */
823 
824 	init_mondo_nocheck((xcfunc_t *)func, arg1, arg2);
825 
826 	mcpup->cpu_list[0] = (uint16_t)cpuid;
827 	stat = shipit(1, mcpup->cpu_list_ra);
828 
829 	if (stat == 0)
830 		return (KDI_XC_RES_OK);
831 	else
832 		return (KDI_XC_RES_NACK);
833 }
834 
835 static void
836 kdi_tickwait(clock_t nticks)
837 {
838 	clock_t endtick = gettick() + nticks;
839 
840 	while (gettick() < endtick);
841 }
842 
843 static void
844 kdi_cpu_init(int dcache_size, int dcache_linesize, int icache_size,
845     int icache_linesize)
846 {
847 	kdi_dcache_size = dcache_size;
848 	kdi_dcache_linesize = dcache_linesize;
849 	kdi_icache_size = icache_size;
850 	kdi_icache_linesize = icache_linesize;
851 }
852 
853 /* used directly by kdi_read/write_phys */
854 void
855 kdi_flush_caches(void)
856 {
857 	/* Not required on sun4v architecture. */
858 }
859 
860 /*ARGSUSED*/
861 int
862 kdi_get_stick(uint64_t *stickp)
863 {
864 	return (-1);
865 }
866 
867 void
868 cpu_kdi_init(kdi_t *kdi)
869 {
870 	kdi->kdi_flush_caches = kdi_flush_caches;
871 	kdi->mkdi_cpu_init = kdi_cpu_init;
872 	kdi->mkdi_cpu_ready_iter = kdi_cpu_ready_iter;
873 	kdi->mkdi_xc_one = kdi_xc_one;
874 	kdi->mkdi_tickwait = kdi_tickwait;
875 	kdi->mkdi_get_stick = kdi_get_stick;
876 }
877 
878 /*
879  * Routine to return memory information associated
880  * with a physical address and syndrome.
881  */
882 /* ARGSUSED */
883 int
884 cpu_get_mem_info(uint64_t synd, uint64_t afar,
885     uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep,
886     int *segsp, int *banksp, int *mcidp)
887 {
888 	return (ENOTSUP);
889 }
890 
891 /*
892  * This routine returns the size of the kernel's FRU name buffer.
893  */
894 size_t
895 cpu_get_name_bufsize()
896 {
897 	return (UNUM_NAMLEN);
898 }
899 
900 /*
901  * This routine is a more generic interface to cpu_get_mem_unum(),
902  * that may be used by other modules (e.g. mm).
903  */
904 /* ARGSUSED */
905 int
906 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar,
907     char *buf, int buflen, int *lenp)
908 {
909 	return (ENOTSUP);
910 }
911 
912 /*
913  * xt_sync - wait for previous x-traps to finish
914  */
915 void
916 xt_sync(cpuset_t cpuset)
917 {
918 	union {
919 		uint8_t volatile byte[NCPU];
920 		uint64_t volatile xword[NCPU / 8];
921 	} cpu_sync;
922 	uint64_t starttick, endtick, tick, lasttick;
923 	int i;
924 
925 	kpreempt_disable();
926 	CPUSET_DEL(cpuset, CPU->cpu_id);
927 	CPUSET_AND(cpuset, cpu_ready_set);
928 
929 	/*
930 	 * Sun4v uses a queue for receiving mondos. Successful
931 	 * transmission of a mondo only indicates that the mondo
932 	 * has been written into the queue.
933 	 *
934 	 * We use an array of bytes to let each cpu to signal back
935 	 * to the cross trap sender that the cross trap has been
936 	 * executed. Set the byte to 1 before sending the cross trap
937 	 * and wait until other cpus reset it to 0.
938 	 */
939 	bzero((void *)&cpu_sync, NCPU);
940 	for (i = 0; i < NCPU; i++)
941 		if (CPU_IN_SET(cpuset, i))
942 			cpu_sync.byte[i] = 1;
943 
944 	xt_some(cpuset, (xcfunc_t *)xt_sync_tl1,
945 	    (uint64_t)cpu_sync.byte, 0);
946 
947 	starttick = lasttick = gettick();
948 	endtick = starttick + xc_tick_limit;
949 
950 	for (i = 0; i < (NCPU / 8); i ++) {
951 		while (cpu_sync.xword[i] != 0) {
952 			tick = gettick();
953 			/*
954 			 * If there is a big jump between the current tick
955 			 * count and lasttick, we have probably hit a break
956 			 * point. Adjust endtick accordingly to avoid panic.
957 			 */
958 			if (tick > (lasttick + xc_tick_jump_limit)) {
959 				endtick += (tick - lasttick);
960 			}
961 			lasttick = tick;
962 			if (tick > endtick) {
963 				if (panic_quiesce)
964 					goto out;
965 				cmn_err(CE_CONT, "Cross trap sync timeout "
966 				    "at cpu_sync.xword[%d]: 0x%lx\n",
967 				    i, cpu_sync.xword[i]);
968 				cmn_err(CE_PANIC, "xt_sync: timeout");
969 			}
970 		}
971 	}
972 
973 out:
974 	kpreempt_enable();
975 }
976