1 /* 2 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* BEGIN CSTYLED */ 7 8 /** 9 * \file drm.h 10 * Header for the Direct Rendering Manager 11 * 12 * \author Rickard E. (Rik) Faith <faith@valinux.com> 13 * 14 * \par Acknowledgments: 15 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. 16 */ 17 18 /* 19 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 20 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 21 * All rights reserved. 22 * 23 * Permission is hereby granted, free of charge, to any person obtaining a 24 * copy of this software and associated documentation files (the "Software"), 25 * to deal in the Software without restriction, including without limitation 26 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 27 * and/or sell copies of the Software, and to permit persons to whom the 28 * Software is furnished to do so, subject to the following conditions: 29 * 30 * The above copyright notice and this permission notice (including the next 31 * paragraph) shall be included in all copies or substantial portions of the 32 * Software. 33 * 34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 37 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 38 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43 /** 44 * \mainpage 45 * 46 * The Direct Rendering Manager (DRM) is a device-independent kernel-level 47 * device driver that provides support for the XFree86 Direct Rendering 48 * Infrastructure (DRI). 49 * 50 * The DRM supports the Direct Rendering Infrastructure (DRI) in four major 51 * ways: 52 * -# The DRM provides synchronized access to the graphics hardware via 53 * the use of an optimized two-tiered lock. 54 * -# The DRM enforces the DRI security policy for access to the graphics 55 * hardware by only allowing authenticated X11 clients access to 56 * restricted regions of memory. 57 * -# The DRM provides a generic DMA engine, complete with multiple 58 * queues and the ability to detect the need for an OpenGL context 59 * switch. 60 * -# The DRM is extensible via the use of small device-specific modules 61 * that rely extensively on the API exported by the DRM module. 62 * 63 */ 64 65 #ifndef _DRM_H_ 66 #define _DRM_H_ 67 68 #pragma ident "%Z%%M% %I% %E% SMI" 69 70 #include <sys/types32.h> 71 72 #ifndef __user 73 #define __user 74 #endif 75 76 #ifdef __GNUC__ 77 # define DEPRECATED __attribute__ ((deprecated)) 78 #else 79 # define DEPRECATED 80 # define __volatile__ volatile 81 #endif 82 83 #if defined(__linux__) 84 #if defined(__KERNEL__) 85 #include <linux/config.h> 86 #endif 87 #include <asm/ioctl.h> /* For _IO* macros */ 88 #define DRM_IOCTL_NR(n) _IOC_NR(n) 89 #define DRM_IOC_VOID _IOC_NONE 90 #define DRM_IOC_READ _IOC_READ 91 #define DRM_IOC_WRITE _IOC_WRITE 92 #define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 93 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 94 #elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) 95 #if defined(__FreeBSD__) && defined(IN_MODULE) 96 /* Prevent name collision when including sys/ioccom.h */ 97 #undef ioctl 98 #include <sys/ioccom.h> 99 #define ioctl(a,b,c) xf86ioctl(a,b,c) 100 #else 101 #include <sys/ioccom.h> 102 #endif /* __FreeBSD__ && xf86ioctl */ 103 #define DRM_IOCTL_NR(n) ((n) & 0xff) 104 #define DRM_IOC_VOID IOC_VOID 105 #define DRM_IOC_READ IOC_OUT 106 #define DRM_IOC_WRITE IOC_IN 107 #define DRM_IOC_READWRITE IOC_INOUT 108 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 109 #endif 110 111 /* Solaris-specific. */ 112 #if defined(__SOLARIS__) || defined(sun) 113 #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) 114 115 #define _IOC_NRBITS 8 116 #define _IOC_TYPEBITS 8 117 #define _IOC_SIZEBITS 14 118 #define _IOC_DIRBITS 2 119 120 #define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) 121 #define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) 122 #define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) 123 #define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) 124 125 #define _IOC_NRSHIFT 0 126 #define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS) 127 #define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS) 128 #define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS) 129 130 #define _IOC_NONE 0U 131 #define _IOC_WRITE 1U 132 #define _IOC_READ 2U 133 134 #define _IOC(dir, type, nr, size) \ 135 (((dir) << _IOC_DIRSHIFT) | \ 136 ((type) << _IOC_TYPESHIFT) | \ 137 ((nr) << _IOC_NRSHIFT) | \ 138 ((size) << _IOC_SIZESHIFT)) 139 140 /* used for X server compile */ 141 #if !defined(_KERNEL) 142 #define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0) 143 #define _IOR(type, nr, size) _IOC(_IOC_READ, (type), (nr), sizeof (size)) 144 #define _IOW(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), sizeof (size)) 145 #define _IOWR(type, nr, size) _IOC(_IOC_READ|_IOC_WRITE, \ 146 (type), (nr), sizeof (size)) 147 148 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) 149 #define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) 150 #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) 151 #define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) 152 153 #define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT) 154 #define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT) 155 #define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT) 156 #define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT) 157 #define IOCSIZE_SHIFT (_IOC_SIZESHIFT) 158 #endif /* _KERNEL */ 159 160 #define DRM_IOCTL_NR(n) _IOC_NR(n) 161 #define DRM_IOC_VOID IOC_VOID 162 #define DRM_IOC_READ IOC_OUT 163 #define DRM_IOC_WRITE IOC_IN 164 #define DRM_IOC_READWRITE IOC_INOUT 165 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 166 167 #endif /* __Solaris__ or sun */ 168 #define XFREE86_VERSION(major,minor,patch,snap) \ 169 ((major << 16) | (minor << 8) | patch) 170 171 #ifndef CONFIG_XFREE86_VERSION 172 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0) 173 #endif 174 175 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) 176 #define DRM_PROC_DEVICES "/proc/devices" 177 #define DRM_PROC_MISC "/proc/misc" 178 #define DRM_PROC_DRM "/proc/drm" 179 #define DRM_DEV_DRM "/dev/drm" 180 #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) 181 #define DRM_DEV_UID 0 182 #define DRM_DEV_GID 0 183 #endif 184 185 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0) 186 #ifdef __OpenBSD__ 187 #define DRM_MAJOR 81 188 #endif 189 #if defined(__linux__) || defined(__NetBSD__) 190 #define DRM_MAJOR 226 191 #endif 192 #define DRM_MAX_MINOR 255 193 #endif 194 #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ 195 #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ 196 #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ 197 #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ 198 199 #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 200 #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 201 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 202 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 203 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 204 205 #if defined(__linux__) 206 typedef unsigned int drm_handle_t; 207 #else 208 typedef unsigned long long drm_handle_t; /**< To mapped regions */ 209 #endif 210 typedef unsigned int drm_context_t; /**< GLXContext handle */ 211 typedef unsigned int drm_drawable_t; 212 typedef unsigned int drm_magic_t; /**< Magic for authentication */ 213 214 /** 215 * Cliprect. 216 * 217 * \warning If you change this structure, make sure you change 218 * XF86DRIClipRectRec in the server as well 219 * 220 * \note KW: Actually it's illegal to change either for 221 * backwards-compatibility reasons. 222 */ 223 typedef struct drm_clip_rect { 224 unsigned short x1; 225 unsigned short y1; 226 unsigned short x2; 227 unsigned short y2; 228 } drm_clip_rect_t; 229 230 /** 231 * Texture region, 232 */ 233 typedef struct drm_tex_region { 234 unsigned char next; 235 unsigned char prev; 236 unsigned char in_use; 237 unsigned char padding; 238 unsigned int age; 239 } drm_tex_region_t; 240 241 /** 242 * Hardware lock. 243 * 244 * The lock structure is a simple cache-line aligned integer. To avoid 245 * processor bus contention on a multiprocessor system, there should not be any 246 * other data stored in the same cache line. 247 */ 248 typedef struct drm_hw_lock { 249 __volatile__ unsigned int lock; /**< lock variable */ 250 char padding[60]; /**< Pad to cache line */ 251 } drm_hw_lock_t; 252 253 /* This is beyond ugly, and only works on GCC. However, it allows me to use 254 * drm.h in places (i.e., in the X-server) where I can't use size_t. The real 255 * fix is to use uint32_t instead of size_t, but that fix will break existing 256 * LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems. That *will* 257 * eventually happen, though. I chose 'unsigned long' to be the fallback type 258 * because that works on all the platforms I know about. Hopefully, the 259 * real fix will happen before that bites us. 260 */ 261 262 #ifdef __SIZE_TYPE__ 263 # define DRM_SIZE_T __SIZE_TYPE__ 264 #else 265 #if !defined(__SOLARIS__) && !defined(sun) 266 # warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!" 267 #endif 268 # define DRM_SIZE_T unsigned long 269 #endif 270 271 /** 272 * DRM_IOCTL_VERSION ioctl argument type. 273 * 274 * \sa drmGetVersion(). 275 */ 276 typedef struct drm_version { 277 int version_major; /**< Major version */ 278 int version_minor; /**< Minor version */ 279 int version_patchlevel; /**< Patch level */ 280 DRM_SIZE_T name_len; /**< Length of name buffer */ 281 char __user *name; /**< Name of driver */ 282 DRM_SIZE_T date_len; /**< Length of date buffer */ 283 char __user *date; /**< User-space buffer to hold date */ 284 DRM_SIZE_T desc_len; /**< Length of desc buffer */ 285 char __user *desc; /**< User-space buffer to hold desc */ 286 } drm_version_t; 287 288 #if defined(__sun) && defined(_KERNEL) 289 typedef struct drm_version32 { 290 int version_major; /* Major version */ 291 int version_minor; /* Minor version */ 292 int version_patchlevel; /* Patch level */ 293 uint32_t name_len; /* Length of name buffer */ 294 caddr32_t name; /* Name of driver */ 295 uint32_t date_len; /* Length of date buffer */ 296 caddr32_t date; /* User-space buffer to hold date */ 297 uint32_t desc_len; /* Length of desc buffer */ 298 caddr32_t desc; /* User-space buffer to hold desc */ 299 } drm_version32_t; 300 #endif 301 302 /** 303 * DRM_IOCTL_GET_UNIQUE ioctl argument type. 304 * 305 * \sa drmGetBusid() and drmSetBusId(). 306 */ 307 typedef struct drm_unique { 308 DRM_SIZE_T unique_len; /**< Length of unique */ 309 char __user *unique; /**< Unique name for driver instantiation */ 310 } drm_unique_t; 311 312 #if defined(__sun) && defined(_KERNEL) 313 typedef struct drm_unique32 { 314 uint32_t unique_len; /* Length of unique */ 315 caddr32_t unique; /* Unique name for driver instantiation */ 316 } drm_unique32_t; 317 #endif 318 319 #undef DRM_SIZE_T 320 321 typedef struct drm_list { 322 int count; /**< Length of user-space structures */ 323 drm_version_t __user *version; 324 } drm_list_t; 325 326 typedef struct drm_block { 327 int unused; 328 } drm_block_t; 329 330 /** 331 * DRM_IOCTL_CONTROL ioctl argument type. 332 * 333 * \sa drmCtlInstHandler() and drmCtlUninstHandler(). 334 */ 335 typedef struct drm_control { 336 enum { 337 DRM_ADD_COMMAND, 338 DRM_RM_COMMAND, 339 DRM_INST_HANDLER, 340 DRM_UNINST_HANDLER 341 } func; 342 int irq; 343 } drm_control_t; 344 345 /** 346 * Type of memory to map. 347 */ 348 typedef enum drm_map_type { 349 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ 350 _DRM_REGISTERS = 1, /**< no caching, no core dump */ 351 _DRM_SHM = 2, /**< shared, cached */ 352 _DRM_AGP = 3, /**< AGP/GART */ 353 _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ 354 _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ 355 _DRM_AGP_UMEM = 6 356 } drm_map_type_t; 357 358 /** 359 * Memory mapping flags. 360 */ 361 typedef enum drm_map_flags { 362 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ 363 _DRM_READ_ONLY = 0x02, 364 _DRM_LOCKED = 0x04, /**< shared, cached, locked */ 365 _DRM_KERNEL = 0x08, /**< kernel requires access */ 366 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ 367 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ 368 _DRM_REMOVABLE = 0x40 /**< Removable mapping */ 369 } drm_map_flags_t; 370 371 typedef struct drm_ctx_priv_map { 372 unsigned int ctx_id; /**< Context requesting private mapping */ 373 void *handle; /**< Handle of map */ 374 } drm_ctx_priv_map_t; 375 376 #if defined(__sun) && defined(_KERNEL) 377 typedef struct drm_ctx_priv_map32 { 378 unsigned int ctx_id; /* Context requesting private mapping */ 379 caddr32_t handle; /* Handle of map */ 380 } drm_ctx_priv_map32_t; 381 #endif 382 383 /** 384 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls 385 * argument type. 386 * 387 * \sa drmAddMap(). 388 */ 389 typedef struct drm_map { 390 unsigned long long offset; /**< Requested physical address (0 for SAREA)*/ 391 unsigned long long handle; 392 /**< User-space: "Handle" to pass to mmap() */ 393 /**< Kernel-space: kernel-virtual address */ 394 unsigned long size; /**< Requested physical size (bytes) */ 395 drm_map_type_t type; /**< Type of memory to map */ 396 drm_map_flags_t flags; /**< Flags */ 397 int mtrr; /**< MTRR slot used */ 398 /* Private data */ 399 } drm_map_t; 400 401 #if defined(__sun) && defined(_KERNEL) 402 typedef struct drm_map32 { 403 unsigned long long offset; 404 unsigned long long handle; 405 uint32_t size; 406 drm_map_type_t type; 407 drm_map_flags_t flags; 408 int mtrr; 409 } drm_map32_t; 410 #endif 411 412 /** 413 * DRM_IOCTL_GET_CLIENT ioctl argument type. 414 */ 415 typedef struct drm_client { 416 int idx; /**< Which client desired? */ 417 int auth; /**< Is client authenticated? */ 418 unsigned long pid; /**< Process ID */ 419 unsigned long uid; /**< User ID */ 420 unsigned long magic; /**< Magic */ 421 unsigned long iocs; /**< Ioctl count */ 422 } drm_client_t; 423 424 #if defined(__sun) && defined(_KERNEL) 425 typedef struct drm_client32 { 426 int idx; /**< Which client desired? */ 427 int auth; /**< Is client authenticated? */ 428 uint32_t pid; /**< Process ID */ 429 uint32_t uid; /**< User ID */ 430 uint32_t magic; /**< Magic */ 431 uint32_t iocs; /**< Ioctl count */ 432 } drm_client32_t; 433 #endif 434 435 typedef enum { 436 _DRM_STAT_LOCK, 437 _DRM_STAT_OPENS, 438 _DRM_STAT_CLOSES, 439 _DRM_STAT_IOCTLS, 440 _DRM_STAT_LOCKS, 441 _DRM_STAT_UNLOCKS, 442 _DRM_STAT_VALUE, /**< Generic value */ 443 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ 444 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ 445 446 _DRM_STAT_IRQ, /**< IRQ */ 447 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ 448 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ 449 _DRM_STAT_DMA, /**< DMA */ 450 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ 451 _DRM_STAT_MISSED /**< Missed DMA opportunity */ 452 /* Add to the *END* of the list */ 453 } drm_stat_type_t; 454 455 /** 456 * DRM_IOCTL_GET_STATS ioctl argument type. 457 */ 458 typedef struct drm_stats { 459 unsigned long count; 460 struct { 461 unsigned long value; 462 drm_stat_type_t type; 463 } data[15]; 464 } drm_stats_t; 465 466 #if defined(__sun) && defined(_KERNEL) 467 typedef struct drm_stats32 { 468 uint32_t count; 469 struct { 470 uint32_t value; 471 drm_stat_type_t type; 472 } data[15]; 473 } drm_stats32_t; 474 #endif 475 476 /** 477 * Hardware locking flags. 478 */ 479 typedef enum drm_lock_flags { 480 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 481 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 482 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 483 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 484 /* These *HALT* flags aren't supported yet 485 -- they will be used to support the 486 full-screen DGA-like mode. */ 487 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 488 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 489 } drm_lock_flags_t; 490 491 /** 492 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. 493 * 494 * \sa drmGetLock() and drmUnlock(). 495 */ 496 typedef struct drm_lock { 497 int context; 498 drm_lock_flags_t flags; 499 } drm_lock_t; 500 501 /** 502 * DMA flags 503 * 504 * \warning 505 * These values \e must match xf86drm.h. 506 * 507 * \sa drm_dma. 508 */ 509 typedef enum drm_dma_flags { 510 /* Flags for DMA buffer dispatch */ 511 _DRM_DMA_BLOCK = 0x01, /**< 512 * Block until buffer dispatched. 513 * 514 * \note The buffer may not yet have 515 * been processed by the hardware -- 516 * getting a hardware lock with the 517 * hardware quiescent will ensure 518 * that the buffer has been 519 * processed. 520 */ 521 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 522 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 523 524 /* Flags for DMA buffer request */ 525 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 526 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 527 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 528 } drm_dma_flags_t; 529 530 /** 531 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. 532 * 533 * \sa drmAddBufs(). 534 */ 535 typedef enum { 536 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ 537 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ 538 _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ 539 _DRM_FB_BUFFER = 0x08 /**< Buffer is in frame buffer */ 540 } drm_buf_flag; 541 typedef struct drm_buf_desc { 542 int count; /**< Number of buffers of this size */ 543 int size; /**< Size in bytes */ 544 int low_mark; /**< Low water mark */ 545 int high_mark; /**< High water mark */ 546 drm_buf_flag flags; 547 unsigned long agp_start; /**< 548 * Start address of where the AGP buffers are 549 * in the AGP aperture 550 */ 551 } drm_buf_desc_t; 552 553 #if defined(__sun) && defined(_KERNEL) 554 typedef struct drm_buf_desc32 { 555 int count; /**< Number of buffers of this size */ 556 int size; /**< Size in bytes */ 557 int low_mark; /**< Low water mark */ 558 int high_mark; /**< High water mark */ 559 drm_buf_flag flags; 560 uint32_t agp_start; /**< 561 * Start address of where the AGP buffers are 562 * in the AGP aperture 563 */ 564 } drm_buf_desc32_t; 565 #endif 566 567 /** 568 * DRM_IOCTL_INFO_BUFS ioctl argument type. 569 */ 570 typedef struct drm_buf_info { 571 int count; /**< Number of buffers described in list */ 572 drm_buf_desc_t __user *list; /**< List of buffer descriptions */ 573 } drm_buf_info_t; 574 575 /** 576 * DRM_IOCTL_FREE_BUFS ioctl argument type. 577 */ 578 typedef struct drm_buf_free { 579 int count; 580 int __user *list; 581 } drm_buf_free_t; 582 583 #if defined(__sun) && defined(_KERNEL) 584 typedef struct drm_buf_free32 { 585 int count; 586 caddr32_t list; 587 } drm_buf_free32_t; 588 #endif 589 590 /** 591 * Buffer information 592 * 593 * \sa drm_buf_map. 594 */ 595 typedef struct drm_buf_pub { 596 int idx; /**< Index into the master buffer list */ 597 int total; /**< Buffer size */ 598 int used; /**< Amount of buffer in use (for DMA) */ 599 void __user *address; /**< Address of buffer */ 600 } drm_buf_pub_t; 601 602 /** 603 * DRM_IOCTL_MAP_BUFS ioctl argument type. 604 */ 605 typedef struct drm_buf_map { 606 int count; /**< Length of the buffer list */ 607 #if defined(__cplusplus) 608 void __user *c_virtual; 609 #else 610 void __user *virtual; /**< Mmap'd area in user-virtual */ 611 #endif 612 drm_buf_pub_t __user *list; /**< Buffer information */ 613 } drm_buf_map_t; 614 615 #if defined(__sun) && defined(_KERNEL) 616 typedef struct drm_buf_map32 { 617 int count; /**< Length of the buffer list */ 618 #if defined(__cplusplus) 619 caddr32_t c_virtual; 620 #else 621 caddr32_t virtual; /**< Mmap'd area in user-virtual */ 622 #endif 623 caddr32_t list; /**< Buffer information */ 624 } drm_buf_map32_t; 625 #endif 626 627 /** 628 * DRM_IOCTL_DMA ioctl argument type. 629 * 630 * Indices here refer to the offset into the buffer list in drm_buf_get. 631 * 632 * \sa drmDMA(). 633 */ 634 typedef struct drm_dma { 635 int context; /**< Context handle */ 636 int send_count; /**< Number of buffers to send */ 637 int __user *send_indices; /**< List of handles to buffers */ 638 int __user *send_sizes; /**< Lengths of data to send */ 639 drm_dma_flags_t flags; /**< Flags */ 640 int request_count; /**< Number of buffers requested */ 641 int request_size; /**< Desired size for buffers */ 642 int __user *request_indices; /**< Buffer information */ 643 int __user *request_sizes; 644 int granted_count; /**< Number of buffers granted */ 645 } drm_dma_t; 646 647 typedef enum { 648 _DRM_CONTEXT_PRESERVED = 0x01, 649 _DRM_CONTEXT_2DONLY = 0x02 650 } drm_ctx_flags_t; 651 652 /** 653 * DRM_IOCTL_ADD_CTX ioctl argument type. 654 * 655 * \sa drmCreateContext() and drmDestroyContext(). 656 */ 657 typedef struct drm_ctx { 658 drm_context_t handle; 659 drm_ctx_flags_t flags; 660 } drm_ctx_t; 661 662 /** 663 * DRM_IOCTL_RES_CTX ioctl argument type. 664 */ 665 typedef struct drm_ctx_res { 666 int count; 667 drm_ctx_t __user *contexts; 668 } drm_ctx_res_t; 669 670 #if defined(__sun) && defined(_KERNEL) 671 typedef struct drm_ctx_res32 { 672 int count; 673 caddr32_t contexts; 674 } drm_ctx_res32_t; 675 #endif 676 677 /** 678 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. 679 */ 680 typedef struct drm_draw { 681 drm_drawable_t handle; 682 } drm_draw_t; 683 684 /** 685 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. 686 */ 687 typedef struct drm_auth { 688 drm_magic_t magic; 689 } drm_auth_t; 690 691 /** 692 * DRM_IOCTL_IRQ_BUSID ioctl argument type. 693 * 694 * \sa drmGetInterruptFromBusID(). 695 */ 696 typedef struct drm_irq_busid { 697 int irq; /**< IRQ number */ 698 int busnum; /**< bus number */ 699 int devnum; /**< device number */ 700 int funcnum; /**< function number */ 701 } drm_irq_busid_t; 702 703 typedef enum { 704 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 705 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 706 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */ 707 } drm_vblank_seq_type_t; 708 709 #define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL 710 711 struct drm_wait_vblank_request { 712 drm_vblank_seq_type_t type; 713 unsigned int sequence; 714 unsigned long signal; 715 }; 716 717 struct drm_wait_vblank_reply { 718 drm_vblank_seq_type_t type; 719 unsigned int sequence; 720 long tval_sec; 721 long tval_usec; 722 }; 723 724 /** 725 * DRM_IOCTL_WAIT_VBLANK ioctl argument type. 726 * 727 * \sa drmWaitVBlank(). 728 */ 729 typedef union drm_wait_vblank { 730 struct drm_wait_vblank_request request; 731 struct drm_wait_vblank_reply reply; 732 } drm_wait_vblank_t; 733 734 /** 735 * DRM_IOCTL_AGP_ENABLE ioctl argument type. 736 * 737 * \sa drmAgpEnable(). 738 */ 739 typedef struct drm_agp_mode { 740 unsigned long mode; /**< AGP mode */ 741 } drm_agp_mode_t; 742 743 #if defined(__sun) && defined(_KERNEL) 744 typedef struct drm_agp_mode32 { 745 uint32_t mode; /**< AGP mode */ 746 } drm_agp_mode32_t; 747 #endif 748 749 /** 750 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. 751 * 752 * \sa drmAgpAlloc() and drmAgpFree(). 753 */ 754 typedef struct drm_agp_buffer { 755 unsigned long size; /**< In bytes -- will round to page boundary */ 756 unsigned long handle; /**< Used for binding / unbinding */ 757 unsigned long type; /**< Type of memory to allocate */ 758 unsigned long physical; /**< Physical used by i810 */ 759 } drm_agp_buffer_t; 760 761 #if defined(__sun) && defined(_KERNEL) 762 typedef struct drm_agp_buffer32 { 763 uint32_t size; /**< In bytes -- will round to page boundary */ 764 uint32_t handle; /**< Used for binding / unbinding */ 765 uint32_t type; /**< Type of memory to allocate */ 766 uint32_t physical; /**< Physical used by i810 */ 767 } drm_agp_buffer32_t; 768 #endif 769 770 /** 771 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. 772 * 773 * \sa drmAgpBind() and drmAgpUnbind(). 774 */ 775 typedef struct drm_agp_binding { 776 unsigned long handle; /**< From drm_agp_buffer */ 777 unsigned long offset; /**< In bytes -- will round to page boundary */ 778 } drm_agp_binding_t; 779 780 #if defined(__sun) && defined(_KERNEL) 781 typedef struct drm_agp_binding32 { 782 uint32_t handle; /**< From drm_agp_buffer */ 783 uint32_t offset; /**< In bytes -- will round to page boundary */ 784 } drm_agp_binding32_t; 785 #endif 786 787 /** 788 * DRM_IOCTL_AGP_INFO ioctl argument type. 789 * 790 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), 791 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), 792 * drmAgpVendorId() and drmAgpDeviceId(). 793 */ 794 typedef struct drm_agp_info { 795 int agp_version_major; 796 int agp_version_minor; 797 unsigned long mode; 798 unsigned long aperture_base; /**< physical address */ 799 unsigned long aperture_size; /**< bytes */ 800 unsigned long memory_allowed; /**< bytes */ 801 unsigned long memory_used; 802 803 /** \name PCI information */ 804 /*@{ */ 805 unsigned short id_vendor; 806 unsigned short id_device; 807 /*@} */ 808 } drm_agp_info_t; 809 810 #if defined(__sun) && defined(_KERNEL) 811 typedef struct drm_agp_info32 { 812 int agp_version_major; 813 int agp_version_minor; 814 uint32_t mode; 815 uint32_t aperture_base; 816 uint32_t aperture_size; 817 uint32_t memory_allowed; 818 uint32_t memory_used; 819 unsigned short id_vendor; 820 unsigned short id_device; 821 } drm_agp_info32_t; 822 #endif 823 824 /** 825 * DRM_IOCTL_SG_ALLOC ioctl argument type. 826 */ 827 typedef struct drm_scatter_gather { 828 unsigned long size; /**< In bytes -- will round to page boundary */ 829 unsigned long handle; /**< Used for mapping / unmapping */ 830 } drm_scatter_gather_t; 831 832 #if defined(__sun) && defined(_KERNEL) 833 typedef struct drm_scatter_gather32 { 834 uint32_t size; /* In bytes -- will round to page boundary */ 835 uint32_t handle; /* Used for mapping / unmapping */ 836 } drm_scatter_gather32_t; 837 #endif 838 839 /** 840 * DRM_IOCTL_SET_VERSION ioctl argument type. 841 */ 842 typedef struct drm_set_version { 843 int drm_di_major; 844 int drm_di_minor; 845 int drm_dd_major; 846 int drm_dd_minor; 847 } drm_set_version_t; 848 849 /** 850 * \name Ioctls Definitions 851 */ 852 /*@{*/ 853 854 #define DRM_IOCTL_BASE 'd' 855 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 856 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 857 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 858 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 859 860 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t) 861 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t) 862 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t) 863 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t) 864 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t) 865 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t) 866 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t) 867 #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, drm_set_version_t) 868 869 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t) 870 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t) 871 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t) 872 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t) 873 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t) 874 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t) 875 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t) 876 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t) 877 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t) 878 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t) 879 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t) 880 881 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t) 882 883 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t) 884 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t) 885 886 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t) 887 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t) 888 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t) 889 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t) 890 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t) 891 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t) 892 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t) 893 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t) 894 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t) 895 #define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t) 896 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t) 897 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t) 898 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t) 899 900 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 901 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 902 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t) 903 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t) 904 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t) 905 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t) 906 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t) 907 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t) 908 909 #define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t) 910 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t) 911 912 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t) 913 914 /*@}*/ 915 916 /** 917 * Device specific ioctls should only be in their respective headers 918 * The device specific ioctl range is from 0x40 to 0x79. 919 * 920 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and 921 * drmCommandReadWrite(). 922 */ 923 #define DRM_COMMAND_BASE 0x40 924 925 #endif /* _DRM_H_ */ 926