1 /* 2 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 /* 6 * Portions Philip Brown phil@bolthole.com Dec 2001 7 */ 8 9 #pragma ident "%Z%%M% %I% %E% SMI" 10 11 /* 12 * agpgart driver 13 * 14 * This driver is primary targeted at providing memory support for INTEL 15 * AGP device, INTEL memory less video card, and AMD64 cpu GART devices. 16 * So there are four main architectures, ARC_IGD810, ARC_IGD830, ARC_INTELAGP, 17 * ARC_AMD64AGP to agpgart driver. However, the memory 18 * interfaces are the same for these architectures. The difference is how to 19 * manage the hardware GART table for them. 20 * 21 * For large memory allocation, this driver use direct mapping to userland 22 * application interface to save kernel virtual memory . 23 */ 24 25 #include <sys/types.h> 26 #include <sys/pci.h> 27 #include <sys/systm.h> 28 #include <sys/conf.h> 29 #include <sys/file.h> 30 #include <sys/kstat.h> 31 #include <sys/stat.h> 32 #include <sys/modctl.h> 33 #include <sys/ddi.h> 34 #include <sys/sunddi.h> 35 #include <sys/sunldi.h> 36 #include <sys/policy.h> 37 #include <sys/ddidevmap.h> 38 #include <vm/seg_dev.h> 39 #include <sys/pmem.h> 40 #include <sys/agpgart.h> 41 #include <sys/agp/agpdefs.h> 42 #include <sys/agp/agpgart_impl.h> 43 #include <sys/agp/agpamd64gart_io.h> 44 #include <sys/agp/agpmaster_io.h> 45 #include <sys/agp/agptarget_io.h> 46 47 /* Dynamic debug support */ 48 int agp_debug_var = 0; 49 #define AGPDB_PRINT1(fmt) if (agp_debug_var == 1) cmn_err fmt 50 #define AGPDB_PRINT2(fmt) if (agp_debug_var >= 1) cmn_err fmt 51 52 /* Driver global softstate handle */ 53 static void *agpgart_glob_soft_handle; 54 55 #define MAX_INSTNUM 16 56 57 #define AGP_DEV2INST(devt) (getminor((devt)) >> 4) 58 #define AGP_INST2MINOR(instance) ((instance) << 4) 59 #define IS_INTEL_830(type) ((type) == ARC_IGD830) 60 #define IS_TRUE_AGP(type) (((type) == ARC_INTELAGP) || \ 61 ((type) == ARC_AMD64AGP)) 62 63 #define agpinfo_default_to_32(v, v32) \ 64 { \ 65 (v32).agpi32_version = (v).agpi_version; \ 66 (v32).agpi32_devid = (v).agpi_devid; \ 67 (v32).agpi32_mode = (v).agpi_mode; \ 68 (v32).agpi32_aperbase = (v).agpi_aperbase; \ 69 (v32).agpi32_apersize = (v).agpi_apersize; \ 70 (v32).agpi32_pgtotal = (v).agpi_pgtotal; \ 71 (v32).agpi32_pgsystem = (v).agpi_pgsystem; \ 72 (v32).agpi32_pgused = (v).agpi_pgused; \ 73 } 74 75 static ddi_dma_attr_t agpgart_dma_attr = { 76 DMA_ATTR_V0, 77 0U, /* dma_attr_addr_lo */ 78 0xffffffffU, /* dma_attr_addr_hi */ 79 0xffffffffU, /* dma_attr_count_max */ 80 (uint64_t)AGP_PAGE_SIZE, /* dma_attr_align */ 81 1, /* dma_attr_burstsizes */ 82 1, /* dma_attr_minxfer */ 83 0xffffffffU, /* dma_attr_maxxfer */ 84 0xffffffffU, /* dma_attr_seg */ 85 1, /* dma_attr_sgllen, variable */ 86 4, /* dma_attr_granular */ 87 0 /* dma_attr_flags */ 88 }; 89 90 /* 91 * AMD64 supports gart table above 4G. See alloc_gart_table. 92 */ 93 static ddi_dma_attr_t garttable_dma_attr = { 94 DMA_ATTR_V0, 95 0U, /* dma_attr_addr_lo */ 96 0xffffffffU, /* dma_attr_addr_hi */ 97 0xffffffffU, /* dma_attr_count_max */ 98 (uint64_t)AGP_PAGE_SIZE, /* dma_attr_align */ 99 1, /* dma_attr_burstsizes */ 100 1, /* dma_attr_minxfer */ 101 0xffffffffU, /* dma_attr_maxxfer */ 102 0xffffffffU, /* dma_attr_seg */ 103 1, /* dma_attr_sgllen, variable */ 104 4, /* dma_attr_granular */ 105 0 /* dma_attr_flags */ 106 }; 107 108 /* 109 * AGPGART table need a physical contiguous memory. To assure that 110 * each access to gart table is strongly ordered and uncachable, 111 * we use DDI_STRICTORDER_ACC. 112 */ 113 static ddi_device_acc_attr_t gart_dev_acc_attr = { 114 DDI_DEVICE_ATTR_V0, 115 DDI_NEVERSWAP_ACC, 116 DDI_STRICTORDER_ACC /* must be DDI_STRICTORDER_ACC */ 117 }; 118 119 /* 120 * AGP memory is usually used as texture memory or for a framebuffer, so we 121 * can set the memory attribute to write combining. Video drivers will 122 * determine the frame buffer attributes, for example the memory is write 123 * combinging or non-cachable. However, the interface between Xorg and agpgart 124 * driver to support attribute selcetion doesn't exist yet. So we set agp memory 125 * to non-cachable by default now. This attribute might be overridden 126 * by MTTR in X86. 127 */ 128 static ddi_device_acc_attr_t mem_dev_acc_attr = { 129 DDI_DEVICE_ATTR_V0, 130 DDI_NEVERSWAP_ACC, 131 DDI_STRICTORDER_ACC /* Can be DDI_MERGING_OK_ACC */ 132 }; 133 134 static keytable_ent_t * 135 agp_find_bound_keyent(agpgart_softstate_t *softstate, uint32_t pg_offset); 136 static void 137 amd64_gart_unregister(amd64_garts_dev_t *cpu_garts); 138 139 140 static void 141 agp_devmap_unmap(devmap_cookie_t handle, void *devprivate, 142 offset_t off, size_t len, devmap_cookie_t new_handle1, 143 void **new_devprivate1, devmap_cookie_t new_handle2, 144 void **new_devprivate2) 145 { 146 147 struct keytable_ent *mementry; 148 agpgart_softstate_t *softstate; 149 agpgart_ctx_t *ctxp, *newctxp1, *newctxp2; 150 151 ASSERT(AGP_ALIGNED(len) && AGP_ALIGNED(off)); 152 ASSERT(devprivate); 153 ASSERT(handle); 154 155 ctxp = (agpgart_ctx_t *)devprivate; 156 softstate = ctxp->actx_sc; 157 ASSERT(softstate); 158 159 if (new_handle1 != NULL) { 160 newctxp1 = kmem_zalloc(sizeof (agpgart_ctx_t), KM_SLEEP); 161 newctxp1->actx_sc = softstate; 162 newctxp1->actx_off = ctxp->actx_off; 163 *new_devprivate1 = newctxp1; 164 } 165 166 if (new_handle2 != NULL) { 167 newctxp2 = kmem_zalloc(sizeof (agpgart_ctx_t), KM_SLEEP); 168 newctxp2->actx_sc = softstate; 169 newctxp2->actx_off = off + len; 170 *new_devprivate2 = newctxp2; 171 } 172 173 mutex_enter(&softstate->asoft_instmutex); 174 if ((new_handle1 == NULL) && (new_handle2 == NULL)) { 175 mementry = 176 agp_find_bound_keyent(softstate, AGP_BYTES2PAGES(off)); 177 ASSERT(mementry); 178 mementry->kte_refcnt--; 179 } else if ((new_handle1 != NULL) && (new_handle2 != NULL)) { 180 mementry = 181 agp_find_bound_keyent(softstate, AGP_BYTES2PAGES(off)); 182 ASSERT(mementry); 183 mementry->kte_refcnt++; 184 } 185 ASSERT(mementry->kte_refcnt >= 0); 186 mutex_exit(&softstate->asoft_instmutex); 187 kmem_free(ctxp, sizeof (struct agpgart_ctx)); 188 } 189 190 /*ARGSUSED*/ 191 static int 192 agp_devmap_map(devmap_cookie_t handle, dev_t dev, 193 uint_t flags, offset_t offset, size_t len, void **new_devprivate) 194 { 195 agpgart_softstate_t *softstate; 196 int instance; 197 struct keytable_ent *mementry; 198 agpgart_ctx_t *newctxp; 199 200 ASSERT(handle); 201 instance = AGP_DEV2INST(dev); 202 softstate = ddi_get_soft_state(agpgart_glob_soft_handle, instance); 203 if (softstate == NULL) { 204 AGPDB_PRINT2((CE_WARN, "agp_devmap_map: get soft state err")); 205 return (ENXIO); 206 } 207 208 ASSERT(softstate); 209 ASSERT(mutex_owned(&softstate->asoft_instmutex)); 210 ASSERT(len); 211 ASSERT(AGP_ALIGNED(offset) && AGP_ALIGNED(len)); 212 213 mementry = 214 agp_find_bound_keyent(softstate, AGP_BYTES2PAGES(offset)); 215 ASSERT(mementry); 216 mementry->kte_refcnt++; 217 ASSERT(mementry->kte_refcnt >= 0); 218 newctxp = kmem_zalloc(sizeof (agpgart_ctx_t), KM_SLEEP); 219 newctxp->actx_off = offset; 220 newctxp->actx_sc = softstate; 221 *new_devprivate = newctxp; 222 223 return (0); 224 } 225 226 /*ARGSUSED*/ 227 static int agp_devmap_dup(devmap_cookie_t handle, void *devprivate, 228 devmap_cookie_t new_handle, void **new_devprivate) 229 { 230 struct keytable_ent *mementry; 231 agpgart_ctx_t *newctxp, *ctxp; 232 agpgart_softstate_t *softstate; 233 234 ASSERT(devprivate); 235 ASSERT(handle && new_handle); 236 237 ctxp = (agpgart_ctx_t *)devprivate; 238 ASSERT(AGP_ALIGNED(ctxp->actx_off)); 239 240 newctxp = kmem_zalloc(sizeof (agpgart_ctx_t), KM_SLEEP); 241 newctxp->actx_off = ctxp->actx_off; 242 newctxp->actx_sc = ctxp->actx_sc; 243 softstate = (agpgart_softstate_t *)newctxp->actx_sc; 244 245 mutex_enter(&softstate->asoft_instmutex); 246 mementry = agp_find_bound_keyent(softstate, 247 AGP_BYTES2PAGES(newctxp->actx_off)); 248 mementry->kte_refcnt++; 249 ASSERT(mementry->kte_refcnt >= 0); 250 mutex_exit(&softstate->asoft_instmutex); 251 *new_devprivate = newctxp; 252 253 return (0); 254 } 255 256 struct devmap_callback_ctl agp_devmap_cb = { 257 DEVMAP_OPS_REV, /* rev */ 258 agp_devmap_map, /* map */ 259 NULL, /* access */ 260 agp_devmap_dup, /* dup */ 261 agp_devmap_unmap, /* unmap */ 262 }; 263 264 /* 265 * agp_master_regis_byname() 266 * 267 * Description: 268 * Open the AGP master device node by device path name and 269 * register the device handle for later operations. 270 * We check all possible driver instance from 0 271 * to MAX_INSTNUM because the master device could be 272 * at any instance number. Only one AGP master is supported. 273 * 274 * Arguments: 275 * master_hdlp AGP master device LDI handle pointer 276 * agpgart_l AGPGART driver LDI identifier 277 * 278 * Returns: 279 * -1 failed 280 * 0 success 281 */ 282 static int 283 agp_master_regis_byname(ldi_handle_t *master_hdlp, ldi_ident_t agpgart_li) 284 { 285 int i; 286 char buf[MAXPATHLEN]; 287 288 ASSERT(master_hdlp); 289 ASSERT(agpgart_li); 290 291 /* 292 * Search all possible instance numbers for the agp master device. 293 * Only one master device is supported now, so the search ends 294 * when one master device is found. 295 */ 296 for (i = 0; i < MAX_INSTNUM; i++) { 297 (void) snprintf(buf, MAXPATHLEN, "%s%d", AGPMASTER_DEVLINK, i); 298 if ((ldi_open_by_name(buf, 0, kcred, 299 master_hdlp, agpgart_li))) 300 continue; 301 AGPDB_PRINT1((CE_NOTE, 302 "master device found: instance number=%d", i)); 303 break; 304 305 } 306 307 /* AGP master device not found */ 308 if (i == MAX_INSTNUM) 309 return (-1); 310 311 return (0); 312 } 313 314 /* 315 * agp_target_regis_byname() 316 * 317 * Description: 318 * This function opens agp bridge device node by 319 * device path name and registers the device handle 320 * for later operations. 321 * We check driver instance from 0 to MAX_INSTNUM 322 * because the master device could be at any instance 323 * number. Only one agp target is supported. 324 * 325 * 326 * Arguments: 327 * target_hdlp AGP target device LDI handle pointer 328 * agpgart_l AGPGART driver LDI identifier 329 * 330 * Returns: 331 * -1 failed 332 * 0 success 333 */ 334 static int 335 agp_target_regis_byname(ldi_handle_t *target_hdlp, ldi_ident_t agpgart_li) 336 { 337 int i; 338 char buf[MAXPATHLEN]; 339 340 ASSERT(target_hdlp); 341 ASSERT(agpgart_li); 342 343 for (i = 0; i < MAX_INSTNUM; i++) { 344 (void) snprintf(buf, MAXPATHLEN, "%s%d", AGPTARGET_DEVLINK, i); 345 if ((ldi_open_by_name(buf, 0, kcred, 346 target_hdlp, agpgart_li))) 347 continue; 348 349 AGPDB_PRINT1((CE_NOTE, 350 "bridge device found: instance number=%d", i)); 351 break; 352 353 } 354 355 /* AGP bridge device not found */ 356 if (i == MAX_INSTNUM) { 357 AGPDB_PRINT2((CE_WARN, "bridge device not found")); 358 return (-1); 359 } 360 361 return (0); 362 } 363 364 /* 365 * amd64_gart_regis_byname() 366 * 367 * Description: 368 * Open all amd64 gart device nodes by deice path name and 369 * register the device handles for later operations. Each cpu 370 * has its own amd64 gart device. 371 * 372 * Arguments: 373 * cpu_garts cpu garts device list header 374 * agpgart_l AGPGART driver LDI identifier 375 * 376 * Returns: 377 * -1 failed 378 * 0 success 379 */ 380 static int 381 amd64_gart_regis_byname(amd64_garts_dev_t *cpu_garts, ldi_ident_t agpgart_li) 382 { 383 amd64_gart_dev_list_t *gart_list; 384 int i; 385 char buf[MAXPATHLEN]; 386 ldi_handle_t gart_hdl; 387 int ret; 388 389 ASSERT(cpu_garts); 390 ASSERT(agpgart_li); 391 392 /* 393 * Search all possible instance numbers for the gart devices. 394 * There can be multiple on-cpu gart devices for Opteron server. 395 */ 396 for (i = 0; i < MAX_INSTNUM; i++) { 397 (void) snprintf(buf, MAXPATHLEN, "%s%d", CPUGART_DEVLINK, i); 398 ret = ldi_open_by_name(buf, 0, kcred, 399 &gart_hdl, agpgart_li); 400 401 if (ret == ENODEV) 402 continue; 403 else if (ret != 0) { /* There was an error opening the device */ 404 amd64_gart_unregister(cpu_garts); 405 return (ret); 406 } 407 408 AGPDB_PRINT1((CE_NOTE, 409 "amd64 gart device found: instance number=%d", i)); 410 411 gart_list = (amd64_gart_dev_list_t *) 412 kmem_zalloc(sizeof (amd64_gart_dev_list_t), KM_SLEEP); 413 414 /* Add new item to the head of the gart device list */ 415 gart_list->gart_devhdl = gart_hdl; 416 gart_list->next = cpu_garts->gart_dev_list_head; 417 cpu_garts->gart_dev_list_head = gart_list; 418 cpu_garts->gart_device_num++; 419 } 420 421 if (cpu_garts->gart_device_num == 0) 422 return (ENODEV); 423 return (0); 424 } 425 426 /* 427 * Unregister agp master device handle 428 */ 429 static void 430 agp_master_unregister(ldi_handle_t *master_hdlp) 431 { 432 ASSERT(master_hdlp); 433 434 if (master_hdlp) { 435 (void) ldi_close(*master_hdlp, 0, kcred); 436 *master_hdlp = NULL; 437 } 438 } 439 440 /* 441 * Unregister agp bridge device handle 442 */ 443 static void 444 agp_target_unregister(ldi_handle_t *target_hdlp) 445 { 446 if (target_hdlp) { 447 (void) ldi_close(*target_hdlp, 0, kcred); 448 *target_hdlp = NULL; 449 } 450 } 451 452 /* 453 * Unregister all amd64 gart device handles 454 */ 455 static void 456 amd64_gart_unregister(amd64_garts_dev_t *cpu_garts) 457 { 458 amd64_gart_dev_list_t *gart_list; 459 amd64_gart_dev_list_t *next; 460 461 ASSERT(cpu_garts); 462 463 for (gart_list = cpu_garts->gart_dev_list_head; 464 gart_list; gart_list = next) { 465 466 ASSERT(gart_list->gart_devhdl); 467 (void) ldi_close(gart_list->gart_devhdl, 0, kcred); 468 next = gart_list->next; 469 /* Free allocated memory */ 470 kmem_free(gart_list, sizeof (amd64_gart_dev_list_t)); 471 } 472 cpu_garts->gart_dev_list_head = NULL; 473 cpu_garts->gart_device_num = 0; 474 } 475 476 /* 477 * lyr_detect_master_type() 478 * 479 * Description: 480 * This function gets agp master type by querying agp master device. 481 * 482 * Arguments: 483 * master_hdlp agp master device ldi handle pointer 484 * 485 * Returns: 486 * -1 unsupported device 487 * DEVICE_IS_I810 i810 series 488 * DEVICE_IS_I810 i830 series 489 * DEVICE_IS_AGP true agp master 490 */ 491 static int 492 lyr_detect_master_type(ldi_handle_t *master_hdlp) 493 { 494 int vtype; 495 int err; 496 497 ASSERT(master_hdlp); 498 499 /* ldi_ioctl(agpmaster) */ 500 err = ldi_ioctl(*master_hdlp, DEVICE_DETECT, 501 (intptr_t)&vtype, FKIOCTL, kcred, 0); 502 if (err) /* Unsupported graphics device */ 503 return (-1); 504 return (vtype); 505 } 506 507 /* 508 * devtect_target_type() 509 * 510 * Description: 511 * This function gets the host bridge chipset type by querying the agp 512 * target device. 513 * 514 * Arguments: 515 * target_hdlp agp target device LDI handle pointer 516 * 517 * Returns: 518 * CHIP_IS_INTEL Intel agp chipsets 519 * CHIP_IS_AMD AMD agp chipset 520 * -1 unsupported chipset 521 */ 522 static int 523 lyr_detect_target_type(ldi_handle_t *target_hdlp) 524 { 525 int btype; 526 int err; 527 528 ASSERT(target_hdlp); 529 530 err = ldi_ioctl(*target_hdlp, CHIP_DETECT, (intptr_t)&btype, 531 FKIOCTL, kcred, 0); 532 if (err) /* Unsupported bridge device */ 533 return (-1); 534 return (btype); 535 } 536 537 /* 538 * lyr_init() 539 * 540 * Description: 541 * This function detects the graphics system architecture and 542 * registers all relative device handles in a global structure 543 * "agp_regdev". Then it stores the system arc type in driver 544 * soft state. 545 * 546 * Arguments: 547 * agp_regdev AGP devices registration struct pointer 548 * agpgart_l AGPGART driver LDI identifier 549 * 550 * Returns: 551 * 0 System arc supported and agp devices registration successed. 552 * -1 System arc not supported or device registration failed. 553 */ 554 int 555 lyr_init(agp_registered_dev_t *agp_regdev, ldi_ident_t agpgart_li) 556 { 557 ldi_handle_t *master_hdlp; 558 ldi_handle_t *target_hdlp; 559 amd64_garts_dev_t *garts_dev; 560 int card_type, chip_type; 561 int ret; 562 563 ASSERT(agp_regdev); 564 565 bzero(agp_regdev, sizeof (agp_registered_dev_t)); 566 agp_regdev->agprd_arctype = ARC_UNKNOWN; 567 /* 568 * Register agp devices, assuming all instances attached, and 569 * detect which agp architucture this server belongs to. This 570 * must be done before the agpgart driver starts to use layered 571 * driver interfaces. 572 */ 573 master_hdlp = &agp_regdev->agprd_masterhdl; 574 target_hdlp = &agp_regdev->agprd_targethdl; 575 garts_dev = &agp_regdev->agprd_cpugarts; 576 577 /* Check whether the system is amd64 arc */ 578 if ((ret = amd64_gart_regis_byname(garts_dev, agpgart_li)) == ENODEV) { 579 /* No amd64 gart devices */ 580 AGPDB_PRINT1((CE_NOTE, 581 "lyr_init: this is not an amd64 system")); 582 if (agp_master_regis_byname(master_hdlp, agpgart_li)) { 583 AGPDB_PRINT2((CE_WARN, 584 "lyr_init: register master device unsuccessful")); 585 goto err1; 586 } 587 if (agp_target_regis_byname(target_hdlp, agpgart_li)) { 588 AGPDB_PRINT2((CE_WARN, 589 "lyr_init: register target device unsuccessful")); 590 goto err2; 591 } 592 card_type = lyr_detect_master_type(master_hdlp); 593 /* 594 * Detect system arc by master device. If it is a intel 595 * integrated device, finish the detection successfully. 596 */ 597 switch (card_type) { 598 case DEVICE_IS_I810: /* I810 likewise graphics */ 599 AGPDB_PRINT1((CE_NOTE, 600 "lyr_init: the system is Intel 810 arch")); 601 agp_regdev->agprd_arctype = ARC_IGD810; 602 return (0); 603 case DEVICE_IS_I830: /* I830 likewise graphics */ 604 AGPDB_PRINT1((CE_NOTE, 605 "lyr_init: the system is Intel 830 arch")); 606 agp_regdev->agprd_arctype = ARC_IGD830; 607 return (0); 608 case DEVICE_IS_AGP: /* AGP graphics */ 609 break; 610 default: /* Non IGD/AGP graphics */ 611 AGPDB_PRINT2((CE_WARN, 612 "lyr_init: non-supported master device")); 613 goto err3; 614 } 615 616 chip_type = lyr_detect_target_type(target_hdlp); 617 618 /* Continue to detect AGP arc by target device */ 619 switch (chip_type) { 620 case CHIP_IS_INTEL: /* Intel chipset */ 621 AGPDB_PRINT1((CE_NOTE, 622 "lyr_init: Intel AGP arch detected")); 623 agp_regdev->agprd_arctype = ARC_INTELAGP; 624 return (0); 625 case CHIP_IS_AMD: /* AMD chipset */ 626 AGPDB_PRINT2((CE_WARN, 627 "lyr_init: no cpu gart, but have AMD64 chipsets")); 628 goto err3; 629 default: /* Non supported chipset */ 630 AGPDB_PRINT2((CE_WARN, 631 "lyr_init: detection can not continue")); 632 goto err3; 633 } 634 635 } 636 637 if (ret) 638 return (-1); /* Errors in open amd64 cpu gart devices */ 639 640 /* 641 * AMD64 cpu gart device exsits, continue detection 642 */ 643 if (agp_master_regis_byname(master_hdlp, agpgart_li)) { 644 AGPDB_PRINT1((CE_NOTE, "lyr_init: no AGP master in amd64")); 645 goto err1; 646 } 647 648 if (agp_target_regis_byname(target_hdlp, agpgart_li)) { 649 AGPDB_PRINT1((CE_NOTE, 650 "lyr_init: no AGP bridge")); 651 goto err2; 652 } 653 654 AGPDB_PRINT1((CE_NOTE, 655 "lyr_init: the system is AMD64 AGP architecture")); 656 657 agp_regdev->agprd_arctype = ARC_AMD64AGP; 658 659 return (0); /* Finished successfully */ 660 661 err3: 662 agp_target_unregister(&agp_regdev->agprd_targethdl); 663 err2: 664 agp_master_unregister(&agp_regdev->agprd_masterhdl); 665 err1: 666 /* AMD64 CPU gart registered ? */ 667 if (ret == 0) { 668 amd64_gart_unregister(garts_dev); 669 } 670 agp_regdev->agprd_arctype = ARC_UNKNOWN; 671 return (-1); 672 } 673 674 void 675 lyr_end(agp_registered_dev_t *agp_regdev) 676 { 677 ASSERT(agp_regdev); 678 679 switch (agp_regdev->agprd_arctype) { 680 case ARC_IGD810: 681 case ARC_IGD830: 682 case ARC_INTELAGP: 683 agp_master_unregister(&agp_regdev->agprd_masterhdl); 684 agp_target_unregister(&agp_regdev->agprd_targethdl); 685 686 return; 687 case ARC_AMD64AGP: 688 agp_master_unregister(&agp_regdev->agprd_masterhdl); 689 agp_target_unregister(&agp_regdev->agprd_targethdl); 690 amd64_gart_unregister(&agp_regdev->agprd_cpugarts); 691 692 return; 693 default: 694 ASSERT(0); 695 return; 696 } 697 } 698 699 int 700 lyr_get_info(agp_kern_info_t *info, agp_registered_dev_t *agp_regdev) 701 { 702 ldi_handle_t hdl; 703 igd_info_t value1; 704 i_agp_info_t value2; 705 size_t prealloc_size; 706 int err; 707 708 ASSERT(info); 709 ASSERT(agp_regdev); 710 711 switch (agp_regdev->agprd_arctype) { 712 case ARC_IGD810: 713 hdl = agp_regdev->agprd_masterhdl; 714 err = ldi_ioctl(hdl, I8XX_GET_INFO, (intptr_t)&value1, 715 FKIOCTL, kcred, 0); 716 if (err) 717 return (-1); 718 info->agpki_mdevid = value1.igd_devid; 719 info->agpki_aperbase = value1.igd_aperbase; 720 info->agpki_apersize = value1.igd_apersize; 721 722 hdl = agp_regdev->agprd_targethdl; 723 err = ldi_ioctl(hdl, I8XX_GET_PREALLOC_SIZE, 724 (intptr_t)&prealloc_size, FKIOCTL, kcred, 0); 725 if (err) 726 return (-1); 727 info->agpki_presize = prealloc_size; 728 729 break; 730 731 case ARC_IGD830: 732 hdl = agp_regdev->agprd_masterhdl; 733 err = ldi_ioctl(hdl, I8XX_GET_INFO, (intptr_t)&value1, 734 FKIOCTL, kcred, 0); 735 if (err) 736 return (-1); 737 info->agpki_mdevid = value1.igd_devid; 738 info->agpki_aperbase = value1.igd_aperbase; 739 info->agpki_apersize = value1.igd_apersize; 740 741 hdl = agp_regdev->agprd_targethdl; 742 err = ldi_ioctl(hdl, I8XX_GET_PREALLOC_SIZE, 743 (intptr_t)&prealloc_size, FKIOCTL, kcred, 0); 744 if (err) 745 return (-1); 746 747 /* 748 * Assume all units are kilobytes unless explicitly 749 * stated below: 750 * preallocated GTT memory = preallocated memory - GTT size 751 * - scratch page size 752 * 753 * scratch page size = 4 754 * GTT size (KB) = aperture size (MB) 755 * this algorithm came from Xorg source code 756 */ 757 if (prealloc_size > (info->agpki_apersize + 4)) 758 prealloc_size = 759 prealloc_size - info->agpki_apersize - 4; 760 else { 761 AGPDB_PRINT2((CE_WARN, "lyr_get_info: " 762 "pre-allocated memory too small, setting to zero")); 763 prealloc_size = 0; 764 } 765 info->agpki_presize = prealloc_size; 766 AGPDB_PRINT2((CE_NOTE, 767 "lyr_get_info: prealloc_size = %ldKB, apersize = %dMB", 768 prealloc_size, info->agpki_apersize)); 769 break; 770 case ARC_INTELAGP: 771 case ARC_AMD64AGP: 772 /* AGP devices */ 773 hdl = agp_regdev->agprd_masterhdl; 774 err = ldi_ioctl(hdl, AGP_MASTER_GETINFO, 775 (intptr_t)&value2, FKIOCTL, kcred, 0); 776 if (err) 777 return (-1); 778 info->agpki_mdevid = value2.iagp_devid; 779 info->agpki_mver = value2.iagp_ver; 780 info->agpki_mstatus = value2.iagp_mode; 781 hdl = agp_regdev->agprd_targethdl; 782 err = ldi_ioctl(hdl, AGP_TARGET_GETINFO, 783 (intptr_t)&value2, FKIOCTL, kcred, 0); 784 if (err) 785 return (-1); 786 info->agpki_tdevid = value2.iagp_devid; 787 info->agpki_tver = value2.iagp_ver; 788 info->agpki_tstatus = value2.iagp_mode; 789 info->agpki_aperbase = value2.iagp_aperbase; 790 info->agpki_apersize = value2.iagp_apersize; 791 break; 792 default: 793 AGPDB_PRINT2((CE_WARN, 794 "lyr_get_info: function doesn't work for unknown arc")); 795 return (-1); 796 } 797 if ((info->agpki_apersize >= MAXAPERMEGAS) || 798 (info->agpki_apersize == 0) || 799 (info->agpki_aperbase == 0)) { 800 AGPDB_PRINT2((CE_WARN, 801 "lyr_get_info: aperture is not programmed correctly!")); 802 return (-1); 803 } 804 805 return (0); 806 } 807 808 /* 809 * lyr_i8xx_add_to_gtt() 810 * 811 * Description: 812 * This function sets up the integrated video device gtt table 813 * via an ioclt to the AGP master driver. 814 * 815 * Arguments: 816 * pg_offset The start entry to be setup 817 * keyent Keytable entity pointer 818 * agp_regdev AGP devices registration struct pointer 819 * 820 * Returns: 821 * 0 success 822 * -1 invalid operations 823 */ 824 int 825 lyr_i8xx_add_to_gtt(uint32_t pg_offset, keytable_ent_t *keyent, 826 agp_registered_dev_t *agp_regdev) 827 { 828 int err = 0; 829 int rval; 830 ldi_handle_t hdl; 831 igd_gtt_seg_t gttseg; 832 uint32_t *addrp, i; 833 uint32_t npages; 834 835 ASSERT(keyent); 836 ASSERT(agp_regdev); 837 gttseg.igs_pgstart = pg_offset; 838 npages = keyent->kte_pages; 839 gttseg.igs_npage = npages; 840 gttseg.igs_type = keyent->kte_type; 841 gttseg.igs_phyaddr = (uint32_t *)kmem_zalloc 842 (sizeof (uint32_t) * gttseg.igs_npage, KM_SLEEP); 843 844 addrp = gttseg.igs_phyaddr; 845 for (i = 0; i < npages; i++, addrp++) { 846 *addrp = 847 (uint32_t)((keyent->kte_pfnarray[i]) << GTT_PAGE_SHIFT); 848 } 849 850 hdl = agp_regdev->agprd_masterhdl; 851 if (ldi_ioctl(hdl, I8XX_ADD2GTT, (intptr_t)>tseg, FKIOCTL, 852 kcred, &rval)) { 853 AGPDB_PRINT2((CE_WARN, "lyr_i8xx_add_to_gtt: ldi_ioctl error")); 854 AGPDB_PRINT2((CE_WARN, "lyr_i8xx_add_to_gtt: pg_start=0x%x", 855 gttseg.igs_pgstart)); 856 AGPDB_PRINT2((CE_WARN, "lyr_i8xx_add_to_gtt: pages=0x%x", 857 gttseg.igs_npage)); 858 AGPDB_PRINT2((CE_WARN, "lyr_i8xx_add_to_gtt: type=0x%x", 859 gttseg.igs_type)); 860 err = -1; 861 } 862 kmem_free(gttseg.igs_phyaddr, sizeof (uint32_t) * gttseg.igs_npage); 863 return (err); 864 } 865 866 /* 867 * lyr_i8xx_remove_from_gtt() 868 * 869 * Description: 870 * This function clears the integrated video device gtt table via 871 * an ioctl to the agp master device. 872 * 873 * Arguments: 874 * pg_offset The starting entry to be cleared 875 * npage The number of entries to be cleared 876 * agp_regdev AGP devices struct pointer 877 * 878 * Returns: 879 * 0 success 880 * -1 invalid operations 881 */ 882 int 883 lyr_i8xx_remove_from_gtt(uint32_t pg_offset, uint32_t npage, 884 agp_registered_dev_t *agp_regdev) 885 { 886 int rval; 887 ldi_handle_t hdl; 888 igd_gtt_seg_t gttseg; 889 890 gttseg.igs_pgstart = pg_offset; 891 gttseg.igs_npage = npage; 892 893 hdl = agp_regdev->agprd_masterhdl; 894 if (ldi_ioctl(hdl, I8XX_REM_GTT, (intptr_t)>tseg, FKIOCTL, 895 kcred, &rval)) 896 return (-1); 897 898 return (0); 899 } 900 901 /* 902 * lyr_set_gart_addr() 903 * 904 * Description: 905 * This function puts the gart table physical address in the 906 * gart base register. 907 * Please refer to gart and gtt table base register format for 908 * gart base register format in agpdefs.h. 909 * 910 * Arguments: 911 * phy_base The base physical address of gart table 912 * agp_regdev AGP devices registration struct pointer 913 * 914 * Returns: 915 * 0 success 916 * -1 failed 917 * 918 */ 919 920 int 921 lyr_set_gart_addr(uint64_t phy_base, agp_registered_dev_t *agp_regdev) 922 { 923 amd64_gart_dev_list_t *gart_list; 924 ldi_handle_t hdl; 925 int err = 0; 926 927 ASSERT(agp_regdev); 928 switch (agp_regdev->agprd_arctype) { 929 case ARC_IGD810: 930 { 931 uint32_t base; 932 933 ASSERT((phy_base & I810_POINTER_MASK) == 0); 934 base = (uint32_t)phy_base; 935 936 hdl = agp_regdev->agprd_masterhdl; 937 err = ldi_ioctl(hdl, I810_SET_GTT_BASE, 938 (intptr_t)&base, FKIOCTL, kcred, 0); 939 break; 940 } 941 case ARC_INTELAGP: 942 { 943 uint32_t addr; 944 addr = (uint32_t)phy_base; 945 946 ASSERT((phy_base & GTT_POINTER_MASK) == 0); 947 hdl = agp_regdev->agprd_targethdl; 948 err = ldi_ioctl(hdl, AGP_TARGET_SET_GATTADDR, 949 (intptr_t)&addr, FKIOCTL, kcred, 0); 950 break; 951 } 952 case ARC_AMD64AGP: 953 { 954 uint32_t addr; 955 956 ASSERT((phy_base & AMD64_POINTER_MASK) == 0); 957 addr = (uint32_t)((phy_base >> AMD64_GARTBASE_SHIFT) 958 & AMD64_GARTBASE_MASK); 959 960 for (gart_list = agp_regdev->agprd_cpugarts.gart_dev_list_head; 961 gart_list; 962 gart_list = gart_list->next) { 963 hdl = gart_list->gart_devhdl; 964 if (ldi_ioctl(hdl, AMD64_SET_GART_ADDR, 965 (intptr_t)&addr, FKIOCTL, kcred, 0)) { 966 err = -1; 967 break; 968 } 969 } 970 break; 971 } 972 default: 973 err = -1; 974 } 975 976 if (err) 977 return (-1); 978 979 return (0); 980 } 981 982 int 983 lyr_set_agp_cmd(uint32_t cmd, agp_registered_dev_t *agp_regdev) 984 { 985 ldi_handle_t hdl; 986 uint32_t command; 987 988 ASSERT(agp_regdev); 989 command = cmd; 990 hdl = agp_regdev->agprd_targethdl; 991 if (ldi_ioctl(hdl, AGP_TARGET_SETCMD, 992 (intptr_t)&command, FKIOCTL, kcred, 0)) 993 return (-1); 994 hdl = agp_regdev->agprd_masterhdl; 995 if (ldi_ioctl(hdl, AGP_MASTER_SETCMD, 996 (intptr_t)&command, FKIOCTL, kcred, 0)) 997 return (-1); 998 999 return (0); 1000 } 1001 1002 int 1003 lyr_config_devices(agp_registered_dev_t *agp_regdev) 1004 { 1005 amd64_gart_dev_list_t *gart_list; 1006 ldi_handle_t hdl; 1007 int rc = 0; 1008 1009 ASSERT(agp_regdev); 1010 switch (agp_regdev->agprd_arctype) { 1011 case ARC_IGD830: 1012 case ARC_IGD810: 1013 break; 1014 case ARC_INTELAGP: 1015 { 1016 hdl = agp_regdev->agprd_targethdl; 1017 rc = ldi_ioctl(hdl, AGP_TARGET_CONFIGURE, 1018 0, FKIOCTL, kcred, 0); 1019 break; 1020 } 1021 case ARC_AMD64AGP: 1022 { 1023 /* 1024 * BIOS always shadow registers such like Aperture Base 1025 * register, Aperture Size Register from the AGP bridge 1026 * to the AMD64 CPU host bridge. If future BIOSes are broken 1027 * in this regard, we may need to shadow these registers 1028 * in driver. 1029 */ 1030 1031 for (gart_list = agp_regdev->agprd_cpugarts.gart_dev_list_head; 1032 gart_list; 1033 gart_list = gart_list->next) { 1034 hdl = gart_list->gart_devhdl; 1035 if (ldi_ioctl(hdl, AMD64_CONFIGURE, 1036 0, FKIOCTL, kcred, 0)) { 1037 rc = -1; 1038 break; 1039 } 1040 } 1041 break; 1042 } 1043 default: 1044 rc = -1; 1045 } 1046 1047 if (rc) 1048 return (-1); 1049 1050 return (0); 1051 } 1052 1053 int 1054 lyr_unconfig_devices(agp_registered_dev_t *agp_regdev) 1055 { 1056 amd64_gart_dev_list_t *gart_list; 1057 ldi_handle_t hdl; 1058 int rc = 0; 1059 1060 ASSERT(agp_regdev); 1061 switch (agp_regdev->agprd_arctype) { 1062 case ARC_IGD830: 1063 case ARC_IGD810: 1064 { 1065 hdl = agp_regdev->agprd_masterhdl; 1066 rc = ldi_ioctl(hdl, I8XX_UNCONFIG, 0, FKIOCTL, kcred, 0); 1067 break; 1068 } 1069 case ARC_INTELAGP: 1070 { 1071 hdl = agp_regdev->agprd_targethdl; 1072 rc = ldi_ioctl(hdl, AGP_TARGET_UNCONFIG, 1073 0, FKIOCTL, kcred, 0); 1074 break; 1075 } 1076 case ARC_AMD64AGP: 1077 { 1078 for (gart_list = agp_regdev->agprd_cpugarts.gart_dev_list_head; 1079 gart_list; gart_list = gart_list->next) { 1080 hdl = gart_list->gart_devhdl; 1081 if (ldi_ioctl(hdl, AMD64_UNCONFIG, 1082 0, FKIOCTL, kcred, 0)) { 1083 rc = -1; 1084 break; 1085 } 1086 } 1087 break; 1088 } 1089 default: 1090 rc = -1; 1091 } 1092 1093 if (rc) 1094 return (-1); 1095 1096 return (0); 1097 } 1098 1099 /* 1100 * lyr_flush_gart_cache() 1101 * 1102 * Description: 1103 * This function flushes the GART translation look-aside buffer. All 1104 * GART translation caches will be flushed after this operation. 1105 * 1106 * Arguments: 1107 * agp_regdev AGP devices struct pointer 1108 */ 1109 void 1110 lyr_flush_gart_cache(agp_registered_dev_t *agp_regdev) 1111 { 1112 amd64_gart_dev_list_t *gart_list; 1113 ldi_handle_t hdl; 1114 1115 ASSERT(agp_regdev); 1116 if (agp_regdev->agprd_arctype == ARC_AMD64AGP) { 1117 for (gart_list = agp_regdev->agprd_cpugarts.gart_dev_list_head; 1118 gart_list; gart_list = gart_list->next) { 1119 hdl = gart_list->gart_devhdl; 1120 (void) ldi_ioctl(hdl, AMD64_FLUSH_GTLB, 1121 0, FKIOCTL, kcred, 0); 1122 } 1123 } else if (agp_regdev->agprd_arctype == ARC_INTELAGP) { 1124 hdl = agp_regdev->agprd_targethdl; 1125 (void) ldi_ioctl(hdl, AGP_TARGET_FLUSH_GTLB, 0, 1126 FKIOCTL, kcred, 0); 1127 } 1128 } 1129 1130 /* 1131 * get_max_pages() 1132 * 1133 * Description: 1134 * This function compute the total pages allowed for agp aperture 1135 * based on the ammount of physical pages. 1136 * The algorithm is: compare the aperture size with 1/4 of total 1137 * physical pages, and use the smaller one to for the max available 1138 * pages. 1139 * 1140 * Arguments: 1141 * aper_size system agp aperture size (in MB) 1142 * 1143 * Returns: 1144 * The max possible number of agp memory pages available to users 1145 */ 1146 static uint32_t 1147 get_max_pages(uint32_t aper_size) 1148 { 1149 uint32_t i, j; 1150 1151 ASSERT(aper_size <= MAXAPERMEGAS); 1152 1153 i = AGP_MB2PAGES(aper_size); 1154 j = (physmem >> 2); 1155 1156 return ((i < j) ? i : j); 1157 } 1158 1159 /* 1160 * agp_fill_empty_keyent() 1161 * 1162 * Description: 1163 * This function finds a empty key table slot and 1164 * fills it with a new entity. 1165 * 1166 * Arguments: 1167 * softsate driver soft state pointer 1168 * entryp new entity data pointer 1169 * 1170 * Returns: 1171 * NULL no key table slot available 1172 * entryp the new entity slot pointer 1173 */ 1174 static keytable_ent_t * 1175 agp_fill_empty_keyent(agpgart_softstate_t *softstate, keytable_ent_t *entryp) 1176 { 1177 int key; 1178 keytable_ent_t *newentryp; 1179 1180 ASSERT(softstate); 1181 ASSERT(entryp); 1182 ASSERT(entryp->kte_memhdl); 1183 ASSERT(entryp->kte_pfnarray); 1184 ASSERT(mutex_owned(&softstate->asoft_instmutex)); 1185 1186 for (key = 0; key < AGP_MAXKEYS; key++) { 1187 newentryp = &softstate->asoft_table[key]; 1188 if (newentryp->kte_memhdl == NULL) { 1189 break; 1190 } 1191 } 1192 1193 if (key >= AGP_MAXKEYS) { 1194 AGPDB_PRINT2((CE_WARN, 1195 "agp_fill_empty_keyent: key table exhausted")); 1196 return (NULL); 1197 } 1198 1199 ASSERT(newentryp->kte_pfnarray == NULL); 1200 bcopy(entryp, newentryp, sizeof (keytable_ent_t)); 1201 newentryp->kte_key = key; 1202 1203 return (newentryp); 1204 } 1205 1206 /* 1207 * agp_find_bound_keyent() 1208 * 1209 * Description: 1210 * This function finds the key table entity by agp aperture page offset. 1211 * Every keytable entity will have an agp aperture range after the binding 1212 * operation. 1213 * 1214 * Arguments: 1215 * softsate driver soft state pointer 1216 * pg_offset agp aperture page offset 1217 * 1218 * Returns: 1219 * NULL no such keytable entity 1220 * pointer key table entity pointer found 1221 */ 1222 static keytable_ent_t * 1223 agp_find_bound_keyent(agpgart_softstate_t *softstate, uint32_t pg_offset) 1224 { 1225 int keycount; 1226 keytable_ent_t *entryp; 1227 1228 ASSERT(softstate); 1229 ASSERT(mutex_owned(&softstate->asoft_instmutex)); 1230 1231 for (keycount = 0; keycount < AGP_MAXKEYS; keycount++) { 1232 entryp = &softstate->asoft_table[keycount]; 1233 if (entryp->kte_bound == 0) { 1234 continue; 1235 } 1236 1237 if (pg_offset < entryp->kte_pgoff) 1238 continue; 1239 if (pg_offset >= (entryp->kte_pgoff + entryp->kte_pages)) 1240 continue; 1241 1242 ASSERT(entryp->kte_memhdl); 1243 ASSERT(entryp->kte_pfnarray); 1244 1245 return (entryp); 1246 } 1247 1248 return (NULL); 1249 } 1250 1251 /* 1252 * agp_check_off() 1253 * 1254 * Description: 1255 * This function checks whether an AGP aperture range to be bound 1256 * overlaps with AGP offset already bound. 1257 * 1258 * Arguments: 1259 * entryp key table start entry pointer 1260 * pg_start AGP range start page offset 1261 * pg_num pages number to be bound 1262 * 1263 * Returns: 1264 * 0 Does not overlap 1265 * -1 Overlaps 1266 */ 1267 1268 static int 1269 agp_check_off(keytable_ent_t *entryp, uint32_t pg_start, uint32_t pg_num) 1270 { 1271 int key; 1272 uint64_t pg_end; 1273 uint64_t kpg_end; 1274 1275 ASSERT(entryp); 1276 1277 pg_end = pg_start + pg_num; 1278 for (key = 0; key < AGP_MAXKEYS; key++) { 1279 if (!entryp[key].kte_bound) 1280 continue; 1281 1282 kpg_end = entryp[key].kte_pgoff + entryp[key].kte_pages; 1283 if (!((pg_end <= entryp[key].kte_pgoff) || 1284 (pg_start >= kpg_end))) 1285 break; 1286 } 1287 1288 if (key == AGP_MAXKEYS) 1289 return (0); 1290 else 1291 return (-1); 1292 } 1293 1294 static int 1295 is_controlling_proc(agpgart_softstate_t *st) 1296 { 1297 ASSERT(st); 1298 1299 if (!st->asoft_acquired) { 1300 AGPDB_PRINT2((CE_WARN, 1301 "ioctl_agpgart_setup: gart not acquired")); 1302 return (-1); 1303 } 1304 if (st->asoft_curpid != ddi_get_pid()) { 1305 AGPDB_PRINT2((CE_WARN, 1306 "ioctl_agpgart_release: not controlling process")); 1307 return (-1); 1308 } 1309 1310 return (0); 1311 } 1312 1313 static void release_control(agpgart_softstate_t *st) 1314 { 1315 st->asoft_curpid = 0; 1316 st->asoft_acquired = 0; 1317 } 1318 1319 static void acquire_control(agpgart_softstate_t *st) 1320 { 1321 st->asoft_curpid = ddi_get_pid(); 1322 st->asoft_acquired = 1; 1323 } 1324 1325 /* 1326 * agp_remove_from_gart() 1327 * 1328 * Description: 1329 * This function fills the gart table entries by a given page 1330 * frame number array and setup the agp aperture page to physical 1331 * memory page translation. 1332 * Arguments: 1333 * pg_offset Starting aperture page to be bound 1334 * entries the number of pages to be bound 1335 * acc_hdl GART table dma memory acc handle 1336 * tablep GART table kernel virtual address 1337 */ 1338 static void 1339 agp_remove_from_gart( 1340 uint32_t pg_offset, 1341 uint32_t entries, 1342 ddi_dma_handle_t dma_hdl, 1343 uint32_t *tablep) 1344 { 1345 uint32_t items = 0; 1346 uint32_t *entryp; 1347 1348 entryp = tablep + pg_offset; 1349 while (items < entries) { 1350 *(entryp + items) = 0; 1351 items++; 1352 } 1353 (void) ddi_dma_sync(dma_hdl, pg_offset * sizeof (uint32_t), 1354 entries * sizeof (uint32_t), DDI_DMA_SYNC_FORDEV); 1355 } 1356 1357 /* 1358 * agp_unbind_key() 1359 * 1360 * Description: 1361 * This function unbinds AGP memory from the gart table. It will clear 1362 * all the gart entries related to this agp memory. 1363 * 1364 * Arguments: 1365 * softstate driver soft state pointer 1366 * entryp key table entity pointer 1367 * 1368 * Returns: 1369 * EINVAL invalid key table entity pointer 1370 * 0 success 1371 * 1372 */ 1373 static int 1374 agp_unbind_key(agpgart_softstate_t *softstate, keytable_ent_t *entryp) 1375 { 1376 int retval = 0; 1377 1378 ASSERT(entryp); 1379 ASSERT((entryp->kte_key >= 0) && (entryp->kte_key < AGP_MAXKEYS)); 1380 1381 if (!entryp->kte_bound) { 1382 AGPDB_PRINT2((CE_WARN, 1383 "agp_unbind_key: key = 0x%x, not bound", 1384 entryp->kte_key)); 1385 return (EINVAL); 1386 } 1387 if (entryp->kte_refcnt) { 1388 AGPDB_PRINT2((CE_WARN, 1389 "agp_unbind_key: memory is exported to users")); 1390 return (EINVAL); 1391 } 1392 1393 ASSERT((entryp->kte_pgoff + entryp->kte_pages) <= 1394 AGP_MB2PAGES(softstate->asoft_info.agpki_apersize)); 1395 ASSERT((softstate->asoft_devreg.agprd_arctype != ARC_UNKNOWN)); 1396 1397 switch (softstate->asoft_devreg.agprd_arctype) { 1398 case ARC_IGD810: 1399 case ARC_IGD830: 1400 retval = lyr_i8xx_remove_from_gtt( 1401 entryp->kte_pgoff, entryp->kte_pages, 1402 &softstate->asoft_devreg); 1403 if (retval) { 1404 AGPDB_PRINT2((CE_WARN, 1405 "agp_unbind_key: Key = 0x%x, clear table error", 1406 entryp->kte_key)); 1407 return (EIO); 1408 } 1409 break; 1410 case ARC_INTELAGP: 1411 case ARC_AMD64AGP: 1412 agp_remove_from_gart(entryp->kte_pgoff, 1413 entryp->kte_pages, 1414 softstate->gart_dma_handle, 1415 (uint32_t *)softstate->gart_vbase); 1416 /* Flush GTLB table */ 1417 lyr_flush_gart_cache(&softstate->asoft_devreg); 1418 1419 break; 1420 } 1421 1422 entryp->kte_bound = 0; 1423 1424 return (0); 1425 } 1426 1427 /* 1428 * agp_dealloc_kmem() 1429 * 1430 * Description: 1431 * This function deallocates dma memory resources for userland 1432 * applications. 1433 * 1434 * Arguments: 1435 * entryp keytable entity pointer 1436 */ 1437 static void 1438 agp_dealloc_kmem(keytable_ent_t *entryp) 1439 { 1440 kmem_free(entryp->kte_pfnarray, sizeof (pfn_t) * entryp->kte_pages); 1441 entryp->kte_pfnarray = NULL; 1442 1443 (void) ddi_dma_unbind_handle(KMEMP(entryp->kte_memhdl)->kmem_handle); 1444 KMEMP(entryp->kte_memhdl)->kmem_cookies_num = 0; 1445 ddi_dma_mem_free(&KMEMP(entryp->kte_memhdl)->kmem_acchdl); 1446 KMEMP(entryp->kte_memhdl)->kmem_acchdl = NULL; 1447 KMEMP(entryp->kte_memhdl)->kmem_reallen = 0; 1448 KMEMP(entryp->kte_memhdl)->kmem_kvaddr = NULL; 1449 1450 ddi_dma_free_handle(&(KMEMP(entryp->kte_memhdl)->kmem_handle)); 1451 KMEMP(entryp->kte_memhdl)->kmem_handle = NULL; 1452 1453 kmem_free(entryp->kte_memhdl, sizeof (agp_kmem_handle_t)); 1454 entryp->kte_memhdl = NULL; 1455 } 1456 1457 /* 1458 * agp_dealloc_mem() 1459 * 1460 * Description: 1461 * This function deallocates physical memory resources allocated for 1462 * userland applications. 1463 * 1464 * Arguments: 1465 * st driver soft state pointer 1466 * entryp key table entity pointer 1467 * 1468 * Returns: 1469 * -1 not a valid memory type or the memory is mapped by 1470 * user area applications 1471 * 0 success 1472 */ 1473 static int 1474 agp_dealloc_mem(agpgart_softstate_t *st, keytable_ent_t *entryp) 1475 { 1476 1477 ASSERT(entryp); 1478 ASSERT(st); 1479 ASSERT(entryp->kte_memhdl); 1480 ASSERT(mutex_owned(&st->asoft_instmutex)); 1481 1482 /* auto unbind here */ 1483 if (entryp->kte_bound && !entryp->kte_refcnt) { 1484 AGPDB_PRINT2((CE_WARN, 1485 "agp_dealloc_mem: key=0x%x, auto unbind", 1486 entryp->kte_key)); 1487 1488 /* 1489 * agp_dealloc_mem may be called indirectly by agp_detach. 1490 * In the agp_detach function, agpgart_close is already 1491 * called which will free the gart table. agp_unbind_key 1492 * will panic if no valid gart table exists. So test if 1493 * gart table exsits here. 1494 */ 1495 if (st->asoft_opened) 1496 (void) agp_unbind_key(st, entryp); 1497 } 1498 if (entryp->kte_refcnt) { 1499 AGPDB_PRINT2((CE_WARN, 1500 "agp_dealloc_mem: memory is exported to users")); 1501 return (-1); 1502 } 1503 1504 switch (entryp->kte_type) { 1505 case AGP_NORMAL: 1506 case AGP_PHYSICAL: 1507 agp_dealloc_kmem(entryp); 1508 break; 1509 default: 1510 return (-1); 1511 } 1512 1513 return (0); 1514 } 1515 1516 /* 1517 * agp_del_allkeys() 1518 * 1519 * Description: 1520 * This function calls agp_dealloc_mem to release all the agp memory 1521 * resource allocated. 1522 * 1523 * Arguments: 1524 * softsate driver soft state pointer 1525 * Returns: 1526 * -1 can not free all agp memory 1527 * 0 success 1528 * 1529 */ 1530 static int 1531 agp_del_allkeys(agpgart_softstate_t *softstate) 1532 { 1533 int key; 1534 int ret = 0; 1535 1536 ASSERT(softstate); 1537 for (key = 0; key < AGP_MAXKEYS; key++) { 1538 if (softstate->asoft_table[key].kte_memhdl != NULL) { 1539 /* 1540 * Check if we can free agp memory now. 1541 * If agp memory is exported to user 1542 * applications, agp_dealloc_mem will fail. 1543 */ 1544 if (agp_dealloc_mem(softstate, 1545 &softstate->asoft_table[key])) 1546 ret = -1; 1547 } 1548 } 1549 1550 return (ret); 1551 } 1552 1553 /* 1554 * pfn2gartentry() 1555 * 1556 * Description: 1557 * This function converts a physical address to GART entry. 1558 * For AMD64, hardware only support addresses below 40bits, 1559 * about 1024G physical address, so the largest pfn 1560 * number is below 28 bits. Please refer to GART and GTT entry 1561 * format table in agpdefs.h for entry format. Intel IGD only 1562 * only supports GTT entry below 1G. Intel AGP only supports 1563 * GART entry below 4G. 1564 * 1565 * Arguments: 1566 * arc_type system agp arc type 1567 * pfn page frame number 1568 * itemv the entry item to be returned 1569 * Returns: 1570 * -1 not a invalid page frame 1571 * 0 conversion success 1572 */ 1573 static int 1574 pfn2gartentry(agp_arc_type_t arc_type, pfn_t pfn, uint32_t *itemv) 1575 { 1576 uint64_t paddr; 1577 1578 paddr = (uint64_t)pfn << AGP_PAGE_SHIFT; 1579 AGPDB_PRINT1((CE_NOTE, "checking pfn number %lu for type %d", 1580 pfn, arc_type)); 1581 1582 switch (arc_type) { 1583 case ARC_INTELAGP: 1584 { 1585 /* Only support 32-bit hardware address */ 1586 if ((paddr & AGP_INTEL_POINTER_MASK) != 0) { 1587 AGPDB_PRINT2((CE_WARN, 1588 "INTEL AGP Hardware only support 32 bits")); 1589 return (-1); 1590 } 1591 *itemv = (pfn << AGP_PAGE_SHIFT) | AGP_ENTRY_VALID; 1592 1593 break; 1594 } 1595 case ARC_AMD64AGP: 1596 { 1597 uint32_t value1, value2; 1598 /* Physaddr should not exceed 40-bit */ 1599 if ((paddr & AMD64_POINTER_MASK) != 0) { 1600 AGPDB_PRINT2((CE_WARN, 1601 "AMD64 GART hardware only supoort 40 bits")); 1602 return (-1); 1603 } 1604 value1 = (uint32_t)pfn >> 20; 1605 value1 <<= 4; 1606 value2 = (uint32_t)pfn << 12; 1607 1608 *itemv = value1 | value2 | AMD64_ENTRY_VALID; 1609 break; 1610 } 1611 case ARC_IGD810: 1612 if ((paddr & I810_POINTER_MASK) != 0) { 1613 AGPDB_PRINT2((CE_WARN, 1614 "Intel i810 only support 30 bits")); 1615 return (-1); 1616 } 1617 break; 1618 1619 case ARC_IGD830: 1620 if ((paddr & GTT_POINTER_MASK) != 0) { 1621 AGPDB_PRINT2((CE_WARN, 1622 "Intel IGD only support 32 bits")); 1623 return (-1); 1624 } 1625 break; 1626 default: 1627 AGPDB_PRINT2((CE_WARN, 1628 "pfn2gartentry: arc type = %d, not support", arc_type)); 1629 return (-1); 1630 } 1631 return (0); 1632 } 1633 1634 /* 1635 * Check allocated physical pages validity, only called in DEBUG 1636 * mode. 1637 */ 1638 static int 1639 agp_check_pfns(agp_arc_type_t arc_type, pfn_t *pfnarray, int items) 1640 { 1641 int count; 1642 uint32_t ret; 1643 1644 for (count = 0; count < items; count++) { 1645 if (pfn2gartentry(arc_type, pfnarray[count], &ret)) 1646 break; 1647 } 1648 if (count < items) 1649 return (-1); 1650 else 1651 return (0); 1652 } 1653 1654 /* 1655 * kmem_getpfns() 1656 * 1657 * Description: 1658 * This function gets page frame numbers from dma handle. 1659 * 1660 * Arguments: 1661 * dma_handle dma hanle allocated by ddi_dma_alloc_handle 1662 * dma_cookip dma cookie pointer 1663 * cookies_num cookies number 1664 * pfnarray array to store page frames 1665 * 1666 * Returns: 1667 * 0 success 1668 */ 1669 static int 1670 kmem_getpfns( 1671 ddi_dma_handle_t dma_handle, 1672 ddi_dma_cookie_t *dma_cookiep, 1673 int cookies_num, 1674 pfn_t *pfnarray) 1675 { 1676 int num_cookies; 1677 int index = 0; 1678 1679 num_cookies = cookies_num; 1680 1681 while (num_cookies > 0) { 1682 uint64_t ck_startaddr, ck_length, ck_end; 1683 ck_startaddr = dma_cookiep->dmac_address; 1684 ck_length = dma_cookiep->dmac_size; 1685 1686 ck_end = ck_startaddr + ck_length; 1687 while (ck_startaddr < ck_end) { 1688 pfnarray[index] = (pfn_t)ck_startaddr >> AGP_PAGE_SHIFT; 1689 ck_startaddr += AGP_PAGE_SIZE; 1690 index++; 1691 } 1692 1693 num_cookies--; 1694 if (num_cookies > 0) { 1695 ddi_dma_nextcookie(dma_handle, dma_cookiep); 1696 } 1697 } 1698 1699 return (0); 1700 } 1701 1702 static int 1703 copyinfo(agpgart_softstate_t *softstate, agp_info_t *info) 1704 { 1705 switch (softstate->asoft_devreg.agprd_arctype) { 1706 case ARC_IGD810: 1707 case ARC_IGD830: 1708 info->agpi_version.agpv_major = 0; 1709 info->agpi_version.agpv_minor = 0; 1710 info->agpi_devid = softstate->asoft_info.agpki_mdevid; 1711 info->agpi_mode = 0; 1712 break; 1713 case ARC_INTELAGP: 1714 case ARC_AMD64AGP: 1715 info->agpi_version = softstate->asoft_info.agpki_tver; 1716 info->agpi_devid = softstate->asoft_info.agpki_tdevid; 1717 info->agpi_mode = softstate->asoft_info.agpki_tstatus; 1718 break; 1719 default: 1720 AGPDB_PRINT2((CE_WARN, "copyinfo: UNKNOW ARC")); 1721 return (-1); 1722 } 1723 /* 1724 * 64bit->32bit conversion possible 1725 */ 1726 info->agpi_aperbase = softstate->asoft_info.agpki_aperbase; 1727 info->agpi_apersize = softstate->asoft_info.agpki_apersize; 1728 info->agpi_pgtotal = softstate->asoft_pgtotal; 1729 info->agpi_pgsystem = info->agpi_pgtotal; 1730 info->agpi_pgused = softstate->asoft_pgused; 1731 1732 return (0); 1733 } 1734 1735 static uint32_t 1736 agp_v2_setup(uint32_t tstatus, uint32_t mstatus, uint32_t mode) 1737 { 1738 uint32_t cmd; 1739 int rq, sba, over4g, fw, rate; 1740 1741 /* 1742 * tstatus: target device status 1743 * mstatus: master device status 1744 * mode: the agp mode to be sent 1745 */ 1746 1747 /* 1748 * RQ - Request Queue size 1749 * set RQ to the min of mode and tstatus 1750 * if mode set a RQ larger than hardware can support, 1751 * use the max RQ which hardware can support. 1752 * tstatus & AGPSTAT_RQ_MASK is the max RQ hardware can support 1753 * Corelogic will enqueue agp transaction 1754 */ 1755 rq = mode & AGPSTAT_RQ_MASK; 1756 if ((tstatus & AGPSTAT_RQ_MASK) < rq) 1757 rq = tstatus & AGPSTAT_RQ_MASK; 1758 1759 /* 1760 * SBA - Sideband Addressing 1761 * 1762 * Sideband Addressing provides an additional bus to pass requests 1763 * (address and command) to the target from the master. 1764 * 1765 * set SBA if all three support it 1766 */ 1767 sba = (tstatus & AGPSTAT_SBA) & (mstatus & AGPSTAT_SBA) 1768 & (mode & AGPSTAT_SBA); 1769 1770 /* set OVER4G if all three support it */ 1771 over4g = (tstatus & AGPSTAT_OVER4G) & (mstatus & AGPSTAT_OVER4G) 1772 & (mode & AGPSTAT_OVER4G); 1773 1774 /* 1775 * FW - fast write 1776 * 1777 * acceleration of memory write transactions from the corelogic to the 1778 * A.G.P. master device acting like a PCI target. 1779 * 1780 * set FW if all three support it 1781 */ 1782 fw = (tstatus & AGPSTAT_FW) & (mstatus & AGPSTAT_FW) 1783 & (mode & AGPSTAT_FW); 1784 1785 /* 1786 * figure out the max rate 1787 * AGP v2 support: 4X, 2X, 1X speed 1788 * status bit meaning 1789 * --------------------------------------------- 1790 * 7:3 others 1791 * 3 0 stand for V2 support 1792 * 0:2 001:1X, 010:2X, 100:4X 1793 * ---------------------------------------------- 1794 */ 1795 rate = (tstatus & AGPSTAT_RATE_MASK) & (mstatus & AGPSTAT_RATE_MASK) 1796 & (mode & AGPSTAT_RATE_MASK); 1797 if (rate & AGP2_RATE_4X) 1798 rate = AGP2_RATE_4X; 1799 else if (rate & AGP2_RATE_2X) 1800 rate = AGP2_RATE_2X; 1801 else 1802 rate = AGP2_RATE_1X; 1803 1804 cmd = rq | sba | over4g | fw | rate; 1805 /* enable agp mode */ 1806 cmd |= AGPCMD_AGPEN; 1807 1808 return (cmd); 1809 } 1810 1811 static uint32_t 1812 agp_v3_setup(uint32_t tstatus, uint32_t mstatus, uint32_t mode) 1813 { 1814 uint32_t cmd = 0; 1815 uint32_t rq, arqsz, cal, sba, over4g, fw, rate; 1816 1817 /* 1818 * tstatus: target device status 1819 * mstatus: master device status 1820 * mode: the agp mode to be set 1821 */ 1822 1823 /* 1824 * RQ - Request Queue size 1825 * Set RQ to the min of mode and tstatus 1826 * If mode set a RQ larger than hardware can support, 1827 * use the max RQ which hardware can support. 1828 * tstatus & AGPSTAT_RQ_MASK is the max RQ hardware can support 1829 * Corelogic will enqueue agp transaction; 1830 */ 1831 rq = mode & AGPSTAT_RQ_MASK; 1832 if ((tstatus & AGPSTAT_RQ_MASK) < rq) 1833 rq = tstatus & AGPSTAT_RQ_MASK; 1834 1835 /* 1836 * ARQSZ - Asynchronous Request Queue size 1837 * Set the value equal to tstatus. 1838 * Don't allow the mode register to override values 1839 */ 1840 arqsz = tstatus & AGPSTAT_ARQSZ_MASK; 1841 1842 /* 1843 * CAL - Calibration cycle 1844 * Set to the min of tstatus and mstatus 1845 * Don't allow override by mode register 1846 */ 1847 cal = tstatus & AGPSTAT_CAL_MASK; 1848 if ((mstatus & AGPSTAT_CAL_MASK) < cal) 1849 cal = mstatus & AGPSTAT_CAL_MASK; 1850 1851 /* 1852 * SBA - Sideband Addressing 1853 * 1854 * Sideband Addressing provides an additional bus to pass requests 1855 * (address and command) to the target from the master. 1856 * 1857 * SBA in agp v3.0 must be set 1858 */ 1859 sba = AGPCMD_SBAEN; 1860 1861 /* GART64B is not set since no hardware supports it now */ 1862 1863 /* Set OVER4G if all three support it */ 1864 over4g = (tstatus & AGPSTAT_OVER4G) & (mstatus & AGPSTAT_OVER4G) 1865 & (mode & AGPSTAT_OVER4G); 1866 1867 /* 1868 * FW - fast write 1869 * 1870 * Acceleration of memory write transactions from the corelogic to the 1871 * A.G.P. master device acting like a PCI target. 1872 * 1873 * Always set FW in AGP 3.0 1874 */ 1875 fw = (tstatus & AGPSTAT_FW) & (mstatus & AGPSTAT_FW) 1876 & (mode & AGPSTAT_FW); 1877 1878 /* 1879 * Figure out the max rate 1880 * 1881 * AGP v3 support: 8X, 4X speed 1882 * 1883 * status bit meaning 1884 * --------------------------------------------- 1885 * 7:3 others 1886 * 3 1 stand for V3 support 1887 * 0:2 001:4X, 010:8X, 011:4X,8X 1888 * ---------------------------------------------- 1889 */ 1890 rate = (tstatus & AGPSTAT_RATE_MASK) & (mstatus & AGPSTAT_RATE_MASK) 1891 & (mode & AGPSTAT_RATE_MASK); 1892 if (rate & AGP3_RATE_8X) 1893 rate = AGP3_RATE_8X; 1894 else 1895 rate = AGP3_RATE_4X; 1896 1897 cmd = rq | arqsz | cal | sba | over4g | fw | rate; 1898 /* Enable AGP mode */ 1899 cmd |= AGPCMD_AGPEN; 1900 1901 return (cmd); 1902 } 1903 1904 static int 1905 agp_setup(agpgart_softstate_t *softstate, uint32_t mode) 1906 { 1907 uint32_t tstatus, mstatus; 1908 uint32_t agp_mode; 1909 1910 tstatus = softstate->asoft_info.agpki_tstatus; 1911 mstatus = softstate->asoft_info.agpki_mstatus; 1912 1913 /* 1914 * There are three kinds of AGP mode. AGP mode 1.0, 2.0, 3.0 1915 * AGP mode 2.0 is fully compatible with AGP mode 1.0, so we 1916 * only check 2.0 and 3.0 mode. AGP 3.0 device can work in 1917 * two AGP 2.0 or AGP 3.0 mode. By checking AGP status register, 1918 * we can get which mode it is working at. The working mode of 1919 * AGP master and AGP target must be consistent. That is, both 1920 * of them must work on AGP 3.0 mode or AGP 2.0 mode. 1921 */ 1922 if ((softstate->asoft_info.agpki_tver.agpv_major == 3) && 1923 (tstatus & AGPSTAT_MODE3)) { 1924 /* Master device should be 3.0 mode, too */ 1925 if ((softstate->asoft_info.agpki_mver.agpv_major != 3) || 1926 ((mstatus & AGPSTAT_MODE3) == 0)) 1927 return (EIO); 1928 1929 agp_mode = agp_v3_setup(tstatus, mstatus, mode); 1930 /* Write to the AGPCMD register of target and master devices */ 1931 if (lyr_set_agp_cmd(agp_mode, 1932 &softstate->asoft_devreg)) 1933 return (EIO); 1934 1935 softstate->asoft_mode = agp_mode; 1936 1937 return (0); 1938 } 1939 1940 /* 1941 * If agp taget device doesn't work in AGP 3.0 mode, 1942 * it must work in AGP 2.0 mode. And make sure 1943 * master device work in AGP 2.0 mode too 1944 */ 1945 if ((softstate->asoft_info.agpki_mver.agpv_major == 3) && 1946 (mstatus & AGPSTAT_MODE3)) 1947 return (EIO); 1948 1949 agp_mode = agp_v2_setup(tstatus, mstatus, mode); 1950 if (lyr_set_agp_cmd(agp_mode, &softstate->asoft_devreg)) 1951 return (EIO); 1952 softstate->asoft_mode = agp_mode; 1953 1954 return (0); 1955 } 1956 1957 /* 1958 * agp_alloc_kmem() 1959 * 1960 * Description: 1961 * This function allocates physical memory for userland applications 1962 * by ddi interfaces. This function can also be called to allocate 1963 * small phsyical contiguous pages, usually tens of kilobytes. 1964 * 1965 * Arguments: 1966 * softsate driver soft state pointer 1967 * length memory size 1968 * 1969 * Returns: 1970 * entryp new keytable entity pointer 1971 * NULL no keytable slot available or no physical 1972 * memory available 1973 */ 1974 static keytable_ent_t * 1975 agp_alloc_kmem(agpgart_softstate_t *softstate, size_t length, int type) 1976 { 1977 keytable_ent_t keyentry; 1978 keytable_ent_t *entryp; 1979 int ret; 1980 1981 ASSERT(AGP_ALIGNED(length)); 1982 1983 bzero(&keyentry, sizeof (keytable_ent_t)); 1984 1985 keyentry.kte_pages = AGP_BYTES2PAGES(length); 1986 keyentry.kte_type = type; 1987 1988 /* 1989 * Set dma_attr_sgllen to assure contiguous physical pages 1990 */ 1991 if (type == AGP_PHYSICAL) 1992 agpgart_dma_attr.dma_attr_sgllen = 1; 1993 else 1994 agpgart_dma_attr.dma_attr_sgllen = keyentry.kte_pages; 1995 1996 /* 4k size pages */ 1997 keyentry.kte_memhdl = kmem_zalloc(sizeof (agp_kmem_handle_t), KM_SLEEP); 1998 1999 if (ddi_dma_alloc_handle(softstate->asoft_dip, 2000 &agpgart_dma_attr, 2001 DDI_DMA_SLEEP, NULL, 2002 &(KMEMP(keyentry.kte_memhdl)->kmem_handle))) { 2003 AGPDB_PRINT2((CE_WARN, 2004 "agp_alloc_kmem: ddi_dma_allco_hanlde error")); 2005 goto err4; 2006 } 2007 2008 if ((ret = ddi_dma_mem_alloc( 2009 KMEMP(keyentry.kte_memhdl)->kmem_handle, 2010 length, 2011 &gart_dev_acc_attr, 2012 DDI_DMA_CONSISTENT, 2013 DDI_DMA_SLEEP, NULL, 2014 &KMEMP(keyentry.kte_memhdl)->kmem_kvaddr, 2015 &KMEMP(keyentry.kte_memhdl)->kmem_reallen, 2016 &KMEMP(keyentry.kte_memhdl)->kmem_acchdl)) != 0) { 2017 AGPDB_PRINT2((CE_WARN, 2018 "agp_alloc_kmem: ddi_dma_mem_alloc error")); 2019 2020 goto err3; 2021 } 2022 2023 ret = ddi_dma_addr_bind_handle( 2024 KMEMP(keyentry.kte_memhdl)->kmem_handle, 2025 NULL, 2026 KMEMP(keyentry.kte_memhdl)->kmem_kvaddr, 2027 length, 2028 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 2029 DDI_DMA_SLEEP, 2030 NULL, 2031 &KMEMP(keyentry.kte_memhdl)->kmem_dcookie, 2032 &KMEMP(keyentry.kte_memhdl)->kmem_cookies_num); 2033 2034 /* 2035 * Even dma_attr_sgllen = 1, ddi_dma_addr_bind_handle may return more 2036 * than one cookie, we check this in the if statement. 2037 */ 2038 2039 if ((ret != DDI_DMA_MAPPED) || 2040 ((agpgart_dma_attr.dma_attr_sgllen == 1) && 2041 (KMEMP(keyentry.kte_memhdl)->kmem_cookies_num != 1))) { 2042 AGPDB_PRINT2((CE_WARN, 2043 "agp_alloc_kmem: can not alloc physical memory properly")); 2044 goto err2; 2045 } 2046 2047 keyentry.kte_pfnarray = (pfn_t *)kmem_zalloc(sizeof (pfn_t) * 2048 keyentry.kte_pages, KM_SLEEP); 2049 2050 if (kmem_getpfns( 2051 KMEMP(keyentry.kte_memhdl)->kmem_handle, 2052 &KMEMP(keyentry.kte_memhdl)->kmem_dcookie, 2053 KMEMP(keyentry.kte_memhdl)->kmem_cookies_num, 2054 keyentry.kte_pfnarray)) { 2055 AGPDB_PRINT2((CE_WARN, "agp_alloc_kmem: get pfn array error")); 2056 goto err1; 2057 } 2058 2059 ASSERT(!agp_check_pfns(softstate->asoft_devreg.agprd_arctype, 2060 keyentry.kte_pfnarray, keyentry.kte_pages)); 2061 if (agp_check_pfns(softstate->asoft_devreg.agprd_arctype, 2062 keyentry.kte_pfnarray, keyentry.kte_pages)) 2063 goto err1; 2064 entryp = agp_fill_empty_keyent(softstate, &keyentry); 2065 if (!entryp) { 2066 AGPDB_PRINT2((CE_WARN, 2067 "agp_alloc_kmem: agp_fill_empty_keyent error")); 2068 2069 goto err1; 2070 } 2071 ASSERT((entryp->kte_key >= 0) && (entryp->kte_key < AGP_MAXKEYS)); 2072 2073 return (entryp); 2074 2075 err1: 2076 kmem_free(keyentry.kte_pfnarray, sizeof (pfn_t) * keyentry.kte_pages); 2077 keyentry.kte_pfnarray = NULL; 2078 (void) ddi_dma_unbind_handle(KMEMP(keyentry.kte_memhdl)->kmem_handle); 2079 KMEMP(keyentry.kte_memhdl)->kmem_cookies_num = 0; 2080 err2: 2081 ddi_dma_mem_free(&KMEMP(keyentry.kte_memhdl)->kmem_acchdl); 2082 KMEMP(keyentry.kte_memhdl)->kmem_acchdl = NULL; 2083 KMEMP(keyentry.kte_memhdl)->kmem_reallen = 0; 2084 KMEMP(keyentry.kte_memhdl)->kmem_kvaddr = NULL; 2085 err3: 2086 ddi_dma_free_handle(&(KMEMP(keyentry.kte_memhdl)->kmem_handle)); 2087 KMEMP(keyentry.kte_memhdl)->kmem_handle = NULL; 2088 err4: 2089 kmem_free(keyentry.kte_memhdl, sizeof (agp_kmem_handle_t)); 2090 keyentry.kte_memhdl = NULL; 2091 return (NULL); 2092 2093 } 2094 2095 /* 2096 * agp_alloc_mem() 2097 * 2098 * Description: 2099 * This function allocate physical memory for userland applications, 2100 * in order to save kernel virtual space, we use the direct mapping 2101 * memory interface if it is available. 2102 * 2103 * Arguments: 2104 * st driver soft state pointer 2105 * length memory size 2106 * type AGP_NORMAL: normal agp memory, AGP_PHISYCAL: specical 2107 * memory type for intel i810 IGD 2108 * 2109 * Returns: 2110 * NULL Invalid memory type or can not allocate memory 2111 * Keytable entry pointer returned by agp_alloc_kmem 2112 */ 2113 static keytable_ent_t * 2114 agp_alloc_mem(agpgart_softstate_t *st, size_t length, int type) 2115 { 2116 2117 /* 2118 * AGP_PHYSICAL type require contiguous physical pages exported 2119 * to X drivers, like i810 HW cursor, ARGB cursor. the number of 2120 * pages needed is usuallysmall and contiguous, 4K, 16K. So we 2121 * use DDI interface to allocated such memory. And X use xsvc 2122 * drivers to map this memory into its own address space. 2123 */ 2124 ASSERT(st); 2125 2126 switch (type) { 2127 case AGP_NORMAL: 2128 case AGP_PHYSICAL: 2129 return (agp_alloc_kmem(st, length, type)); 2130 default: 2131 return (NULL); 2132 } 2133 } 2134 2135 /* 2136 * free_gart_table() 2137 * 2138 * Description: 2139 * This function frees the gart table memory allocated by driver. 2140 * Must disable gart table before calling this function. 2141 * 2142 * Arguments: 2143 * softstate driver soft state pointer 2144 * 2145 */ 2146 static void 2147 free_gart_table(agpgart_softstate_t *st) 2148 { 2149 2150 if (st->gart_dma_handle == NULL) 2151 return; 2152 2153 (void) ddi_dma_unbind_handle(st->gart_dma_handle); 2154 ddi_dma_mem_free(&st->gart_dma_acc_handle); 2155 st->gart_dma_acc_handle = NULL; 2156 ddi_dma_free_handle(&st->gart_dma_handle); 2157 st->gart_dma_handle = NULL; 2158 st->gart_vbase = 0; 2159 st->gart_size = 0; 2160 } 2161 2162 /* 2163 * alloc_gart_table() 2164 * 2165 * Description: 2166 * This function allocates one physical continuous gart table. 2167 * INTEL integrated video device except i810 have their special 2168 * video bios; No need to allocate gart table for them. 2169 * 2170 * Arguments: 2171 * st driver soft state pointer 2172 * 2173 * Returns: 2174 * 0 success 2175 * -1 can not allocate gart tabl 2176 */ 2177 static int 2178 alloc_gart_table(agpgart_softstate_t *st) 2179 { 2180 int num_pages; 2181 size_t table_size; 2182 int ret = DDI_SUCCESS; 2183 ddi_dma_cookie_t cookie; 2184 uint32_t num_cookies; 2185 2186 num_pages = AGP_MB2PAGES(st->asoft_info.agpki_apersize); 2187 2188 /* 2189 * Only 40-bit maximum physical memory is supported by today's 2190 * AGP hardware (32-bit gart tables can hold 40-bit memory addresses). 2191 * No one supports 64-bit gart entries now, so the size of gart 2192 * entries defaults to 32-bit though AGP3.0 specifies the possibility 2193 * of 64-bit gart entries. 2194 */ 2195 2196 table_size = num_pages * (sizeof (uint32_t)); 2197 2198 /* 2199 * Only AMD64 can put gart table above 4G, 40 bits at maximum 2200 */ 2201 if (st->asoft_devreg.agprd_arctype == ARC_AMD64AGP) 2202 garttable_dma_attr.dma_attr_addr_hi = 0xffffffffffLL; 2203 else 2204 garttable_dma_attr.dma_attr_addr_hi = 0xffffffffU; 2205 /* Allocate physical continuous page frame for gart table */ 2206 if (ret = ddi_dma_alloc_handle(st->asoft_dip, 2207 &garttable_dma_attr, 2208 DDI_DMA_SLEEP, 2209 NULL, &st->gart_dma_handle)) { 2210 AGPDB_PRINT2((CE_WARN, 2211 "alloc_gart_table: ddi_dma_alloc_handle failed")); 2212 goto err3; 2213 } 2214 2215 if (ret = ddi_dma_mem_alloc(st->gart_dma_handle, 2216 table_size, 2217 &gart_dev_acc_attr, 2218 DDI_DMA_CONSISTENT, 2219 DDI_DMA_SLEEP, NULL, 2220 &st->gart_vbase, 2221 &st->gart_size, 2222 &st->gart_dma_acc_handle)) { 2223 AGPDB_PRINT2((CE_WARN, 2224 "alloc_gart_table: ddi_dma_mem_alloc failed")); 2225 goto err2; 2226 2227 } 2228 2229 ret = ddi_dma_addr_bind_handle(st->gart_dma_handle, 2230 NULL, st->gart_vbase, 2231 table_size, 2232 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 2233 DDI_DMA_SLEEP, NULL, 2234 &cookie, &num_cookies); 2235 2236 st->gart_pbase = cookie.dmac_address; 2237 2238 if ((ret != DDI_DMA_MAPPED) || (num_cookies != 1)) { 2239 if (num_cookies > 1) 2240 (void) ddi_dma_unbind_handle(st->gart_dma_handle); 2241 AGPDB_PRINT2((CE_WARN, 2242 "alloc_gart_table: alloc contiguous phys memory failed")); 2243 goto err1; 2244 } 2245 2246 return (0); 2247 err1: 2248 ddi_dma_mem_free(&st->gart_dma_acc_handle); 2249 st->gart_dma_acc_handle = NULL; 2250 err2: 2251 ddi_dma_free_handle(&st->gart_dma_handle); 2252 st->gart_dma_handle = NULL; 2253 err3: 2254 st->gart_pbase = 0; 2255 st->gart_size = 0; 2256 st->gart_vbase = 0; 2257 2258 return (-1); 2259 } 2260 2261 /* 2262 * agp_add_to_gart() 2263 * 2264 * Description: 2265 * This function fills the gart table entries by a given page frame number 2266 * array and set up the agp aperture page to physical memory page 2267 * translation. 2268 * Arguments: 2269 * type valid sytem arc types ARC_AMD64AGP, ARC_INTELAGP, 2270 * ARC_AMD64AGP 2271 * pfnarray allocated physical page frame number array 2272 * pg_offset agp aperture start page to be bound 2273 * entries the number of pages to be bound 2274 * dma_hdl gart table dma memory handle 2275 * tablep gart table kernel virtual address 2276 * Returns: 2277 * -1 failed 2278 * 0 success 2279 */ 2280 static int 2281 agp_add_to_gart( 2282 agp_arc_type_t type, 2283 pfn_t *pfnarray, 2284 uint32_t pg_offset, 2285 uint32_t entries, 2286 ddi_dma_handle_t dma_hdl, 2287 uint32_t *tablep) 2288 { 2289 int items = 0; 2290 uint32_t *entryp; 2291 uint32_t itemv; 2292 2293 entryp = tablep + pg_offset; 2294 while (items < entries) { 2295 if (pfn2gartentry(type, pfnarray[items], &itemv)) 2296 break; 2297 *(entryp + items) = itemv; 2298 items++; 2299 } 2300 if (items < entries) 2301 return (-1); 2302 2303 (void) ddi_dma_sync(dma_hdl, pg_offset * sizeof (uint32_t), 2304 entries * sizeof (uint32_t), DDI_DMA_SYNC_FORDEV); 2305 2306 return (0); 2307 } 2308 2309 /* 2310 * agp_bind_key() 2311 * 2312 * Description: 2313 * This function will call low level gart table access functions to 2314 * set up gart table translation. Also it will do some sanity 2315 * checking on key table entry. 2316 * 2317 * Arguments: 2318 * softstate driver soft state pointer 2319 * keyent key table entity pointer to be bound 2320 * pg_offset aperture start page to be bound 2321 * Returns: 2322 * EINVAL not a valid operation 2323 */ 2324 static int 2325 agp_bind_key(agpgart_softstate_t *softstate, 2326 keytable_ent_t *keyent, uint32_t pg_offset) 2327 { 2328 uint64_t pg_end; 2329 int ret = 0; 2330 2331 ASSERT(keyent); 2332 ASSERT((keyent->kte_key >= 0) && (keyent->kte_key < AGP_MAXKEYS)); 2333 ASSERT(mutex_owned(&softstate->asoft_instmutex)); 2334 2335 pg_end = pg_offset + keyent->kte_pages; 2336 2337 if (pg_end > AGP_MB2PAGES(softstate->asoft_info.agpki_apersize)) { 2338 AGPDB_PRINT2((CE_WARN, 2339 "agp_bind_key: key=0x%x,exceed aper range", 2340 keyent->kte_key)); 2341 2342 return (EINVAL); 2343 } 2344 2345 if (agp_check_off(softstate->asoft_table, 2346 pg_offset, keyent->kte_pages)) { 2347 AGPDB_PRINT2((CE_WARN, 2348 "agp_bind_key: pg_offset=0x%x, pages=0x%lx overlaped", 2349 pg_offset, keyent->kte_pages)); 2350 return (EINVAL); 2351 } 2352 2353 ASSERT(keyent->kte_pfnarray != NULL); 2354 2355 switch (softstate->asoft_devreg.agprd_arctype) { 2356 case ARC_IGD810: 2357 case ARC_IGD830: 2358 ret = lyr_i8xx_add_to_gtt(pg_offset, keyent, 2359 &softstate->asoft_devreg); 2360 if (ret) 2361 return (EIO); 2362 break; 2363 case ARC_INTELAGP: 2364 case ARC_AMD64AGP: 2365 ret = agp_add_to_gart( 2366 softstate->asoft_devreg.agprd_arctype, 2367 keyent->kte_pfnarray, 2368 pg_offset, 2369 keyent->kte_pages, 2370 softstate->gart_dma_handle, 2371 (uint32_t *)softstate->gart_vbase); 2372 if (ret) 2373 return (EINVAL); 2374 /* Flush GTLB table */ 2375 lyr_flush_gart_cache(&softstate->asoft_devreg); 2376 break; 2377 default: 2378 AGPDB_PRINT2((CE_WARN, 2379 "agp_bind_key: arc type = 0x%x unsupported", 2380 softstate->asoft_devreg.agprd_arctype)); 2381 return (EINVAL); 2382 } 2383 return (0); 2384 } 2385 2386 static int 2387 agpgart_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 2388 { 2389 int instance; 2390 agpgart_softstate_t *softstate; 2391 2392 if (cmd != DDI_ATTACH) { 2393 AGPDB_PRINT2((CE_WARN, 2394 "agpgart_attach: only attach op supported")); 2395 return (DDI_FAILURE); 2396 } 2397 instance = ddi_get_instance(dip); 2398 2399 if (ddi_soft_state_zalloc(agpgart_glob_soft_handle, instance) 2400 != DDI_SUCCESS) { 2401 AGPDB_PRINT2((CE_WARN, 2402 "agpgart_attach: soft state zalloc failed")); 2403 goto err1; 2404 2405 } 2406 softstate = ddi_get_soft_state(agpgart_glob_soft_handle, instance); 2407 mutex_init(&softstate->asoft_instmutex, NULL, MUTEX_DRIVER, NULL); 2408 softstate->asoft_dip = dip; 2409 /* 2410 * Allocate LDI identifier for agpgart driver 2411 * Agpgart driver is the kernel consumer 2412 */ 2413 if (ldi_ident_from_dip(dip, &softstate->asoft_li)) { 2414 AGPDB_PRINT2((CE_WARN, 2415 "agpgart_attach: LDI indentifier allcation failed")); 2416 goto err2; 2417 } 2418 2419 softstate->asoft_devreg.agprd_arctype = ARC_UNKNOWN; 2420 /* Install agp kstat */ 2421 if (agp_init_kstats(softstate)) { 2422 AGPDB_PRINT2((CE_WARN, "agpgart_attach: init kstats error")); 2423 goto err3; 2424 } 2425 /* 2426 * devfs will create /dev/agpgart 2427 * and /devices/agpgart:agpgart 2428 */ 2429 2430 if (ddi_create_minor_node(dip, AGPGART_DEVNODE, S_IFCHR, 2431 AGP_INST2MINOR(instance), 2432 DDI_NT_AGP_PSEUDO, 0)) { 2433 AGPDB_PRINT2((CE_WARN, 2434 "agpgart_attach: Can not create minor node")); 2435 goto err4; 2436 } 2437 2438 softstate->asoft_table = kmem_zalloc( 2439 AGP_MAXKEYS * (sizeof (keytable_ent_t)), 2440 KM_SLEEP); 2441 2442 return (DDI_SUCCESS); 2443 err4: 2444 agp_fini_kstats(softstate); 2445 err3: 2446 ldi_ident_release(softstate->asoft_li); 2447 err2: 2448 ddi_soft_state_free(agpgart_glob_soft_handle, instance); 2449 err1: 2450 return (DDI_FAILURE); 2451 } 2452 2453 static int 2454 agpgart_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 2455 { 2456 int instance; 2457 agpgart_softstate_t *st; 2458 2459 instance = ddi_get_instance(dip); 2460 2461 st = ddi_get_soft_state(agpgart_glob_soft_handle, instance); 2462 2463 if (cmd != DDI_DETACH) 2464 return (DDI_FAILURE); 2465 2466 /* 2467 * Caller should free all the memory allocated explicitly. 2468 * We release the memory allocated by caller which is not 2469 * properly freed. mutex_enter here make sure assertion on 2470 * softstate mutex success in agp_dealloc_mem. 2471 */ 2472 mutex_enter(&st->asoft_instmutex); 2473 if (agp_del_allkeys(st)) { 2474 AGPDB_PRINT2((CE_WARN, "agpgart_detach: agp_del_allkeys err")); 2475 AGPDB_PRINT2((CE_WARN, 2476 "you might free agp memory exported to your applications")); 2477 2478 mutex_exit(&st->asoft_instmutex); 2479 return (DDI_FAILURE); 2480 } 2481 mutex_exit(&st->asoft_instmutex); 2482 if (st->asoft_table) { 2483 kmem_free(st->asoft_table, 2484 AGP_MAXKEYS * (sizeof (keytable_ent_t))); 2485 st->asoft_table = 0; 2486 } 2487 2488 ddi_remove_minor_node(dip, AGPGART_DEVNODE); 2489 agp_fini_kstats(st); 2490 ldi_ident_release(st->asoft_li); 2491 mutex_destroy(&st->asoft_instmutex); 2492 ddi_soft_state_free(agpgart_glob_soft_handle, instance); 2493 2494 return (DDI_SUCCESS); 2495 } 2496 2497 /*ARGSUSED*/ 2498 static int 2499 agpgart_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, 2500 void **resultp) 2501 { 2502 agpgart_softstate_t *st; 2503 int instance, rval = DDI_FAILURE; 2504 dev_t dev; 2505 2506 switch (cmd) { 2507 case DDI_INFO_DEVT2DEVINFO: 2508 dev = (dev_t)arg; 2509 instance = AGP_DEV2INST(dev); 2510 st = ddi_get_soft_state(agpgart_glob_soft_handle, instance); 2511 if (st != NULL) { 2512 mutex_enter(&st->asoft_instmutex); 2513 *resultp = st->asoft_dip; 2514 mutex_exit(&st->asoft_instmutex); 2515 rval = DDI_SUCCESS; 2516 } else 2517 *resultp = NULL; 2518 2519 break; 2520 case DDI_INFO_DEVT2INSTANCE: 2521 dev = (dev_t)arg; 2522 instance = AGP_DEV2INST(dev); 2523 *resultp = (void *)(uintptr_t)instance; 2524 rval = DDI_SUCCESS; 2525 2526 break; 2527 default: 2528 break; 2529 } 2530 2531 return (rval); 2532 } 2533 2534 /* 2535 * agpgart_open() 2536 * 2537 * Description: 2538 * This function is the driver open entry point. If it is the 2539 * first time the agpgart driver is opened, the driver will 2540 * open other agp related layered drivers and set up the agpgart 2541 * table properly. 2542 * 2543 * Arguments: 2544 * dev device number pointer 2545 * openflags open flags 2546 * otyp OTYP_BLK, OTYP_CHR 2547 * credp user's credential's struct pointer 2548 * 2549 * Returns: 2550 * ENXIO operation error 2551 * EAGAIN resoure temporarily unvailable 2552 * 0 success 2553 */ 2554 /*ARGSUSED*/ 2555 static int 2556 agpgart_open(dev_t *dev, int openflags, int otyp, cred_t *credp) 2557 { 2558 int instance = AGP_DEV2INST(*dev); 2559 agpgart_softstate_t *softstate; 2560 int rc = 0; 2561 2562 softstate = ddi_get_soft_state(agpgart_glob_soft_handle, instance); 2563 if (softstate == NULL) { 2564 AGPDB_PRINT2((CE_WARN, "agpgart_open: get soft state err")); 2565 return (ENXIO); 2566 } 2567 mutex_enter(&softstate->asoft_instmutex); 2568 2569 if (softstate->asoft_opened) { 2570 softstate->asoft_opened++; 2571 mutex_exit(&softstate->asoft_instmutex); 2572 return (0); 2573 } 2574 2575 /* 2576 * The driver is opened first time, so we initialize layered 2577 * driver interface and softstate member here. 2578 */ 2579 softstate->asoft_pgused = 0; 2580 if (lyr_init(&softstate->asoft_devreg, softstate->asoft_li)) { 2581 AGPDB_PRINT2((CE_WARN, "agpgart_open: lyr_init failed")); 2582 mutex_exit(&softstate->asoft_instmutex); 2583 return (EAGAIN); 2584 } 2585 2586 /* Call into layered driver */ 2587 if (lyr_get_info(&softstate->asoft_info, &softstate->asoft_devreg)) { 2588 AGPDB_PRINT2((CE_WARN, "agpgart_open: lyr_get_info error")); 2589 lyr_end(&softstate->asoft_devreg); 2590 mutex_exit(&softstate->asoft_instmutex); 2591 return (EIO); 2592 } 2593 2594 /* 2595 * BIOS already set up gtt table for ARC_IGD830 2596 */ 2597 if (IS_INTEL_830(softstate->asoft_devreg.agprd_arctype)) { 2598 softstate->asoft_opened++; 2599 2600 softstate->asoft_pgtotal = 2601 get_max_pages(softstate->asoft_info.agpki_apersize); 2602 2603 if (lyr_config_devices(&softstate->asoft_devreg)) { 2604 AGPDB_PRINT2((CE_WARN, 2605 "agpgart_open: lyr_config_devices error")); 2606 lyr_end(&softstate->asoft_devreg); 2607 mutex_exit(&softstate->asoft_instmutex); 2608 2609 return (EIO); 2610 } 2611 mutex_exit(&softstate->asoft_instmutex); 2612 return (0); 2613 } 2614 2615 rc = alloc_gart_table(softstate); 2616 2617 /* 2618 * Allocate physically contiguous pages for AGP arc or 2619 * i810 arc. If failed, divide aper_size by 2 to 2620 * reduce gart table size until 4 megabytes. This 2621 * is just a workaround for systems with very few 2622 * physically contiguous memory. 2623 */ 2624 if (rc) { 2625 while ((softstate->asoft_info.agpki_apersize >= 4) && 2626 (alloc_gart_table(softstate))) { 2627 softstate->asoft_info.agpki_apersize >>= 1; 2628 } 2629 if (softstate->asoft_info.agpki_apersize >= 4) 2630 rc = 0; 2631 } 2632 2633 if (rc != 0) { 2634 AGPDB_PRINT2((CE_WARN, 2635 "agpgart_open: alloc gart table failed")); 2636 lyr_end(&softstate->asoft_devreg); 2637 mutex_exit(&softstate->asoft_instmutex); 2638 return (EAGAIN); 2639 } 2640 2641 softstate->asoft_pgtotal = 2642 get_max_pages(softstate->asoft_info.agpki_apersize); 2643 /* 2644 * BIOS doesn't initialize GTT for i810, 2645 * So i810 GTT must be created by driver. 2646 * 2647 * Set up gart table and enable it. 2648 */ 2649 if (lyr_set_gart_addr(softstate->gart_pbase, 2650 &softstate->asoft_devreg)) { 2651 AGPDB_PRINT2((CE_WARN, 2652 "agpgart_open: set gart table addr failed")); 2653 free_gart_table(softstate); 2654 lyr_end(&softstate->asoft_devreg); 2655 mutex_exit(&softstate->asoft_instmutex); 2656 return (EIO); 2657 } 2658 if (lyr_config_devices(&softstate->asoft_devreg)) { 2659 AGPDB_PRINT2((CE_WARN, 2660 "agpgart_open: lyr_config_devices failed")); 2661 free_gart_table(softstate); 2662 lyr_end(&softstate->asoft_devreg); 2663 mutex_exit(&softstate->asoft_instmutex); 2664 return (EIO); 2665 } 2666 2667 softstate->asoft_opened++; 2668 mutex_exit(&softstate->asoft_instmutex); 2669 2670 return (0); 2671 } 2672 2673 /* 2674 * agpgart_close() 2675 * 2676 * Description: 2677 * agpgart_close will release resources allocated in the first open 2678 * and close other open layered drivers. Also it frees the memory 2679 * allocated by ioctls. 2680 * 2681 * Arguments: 2682 * dev device number 2683 * flag file status flag 2684 * otyp OTYP_BLK, OTYP_CHR 2685 * credp user's credential's struct pointer 2686 * 2687 * Returns: 2688 * ENXIO not an error, to support "deferred attach" 2689 * 0 success 2690 */ 2691 /*ARGSUSED*/ 2692 static int 2693 agpgart_close(dev_t dev, int flag, int otyp, cred_t *credp) 2694 { 2695 int instance = AGP_DEV2INST(dev); 2696 agpgart_softstate_t *softstate; 2697 2698 softstate = ddi_get_soft_state(agpgart_glob_soft_handle, instance); 2699 if (softstate == NULL) { 2700 AGPDB_PRINT2((CE_WARN, "agpgart_close: get soft state err")); 2701 return (ENXIO); 2702 } 2703 2704 mutex_enter(&softstate->asoft_instmutex); 2705 ASSERT(softstate->asoft_opened); 2706 2707 2708 /* 2709 * If the last process close this device is not the controlling 2710 * process, also release the control over agpgart driver here if the 2711 * the controlling process fails to release the control before it 2712 * close the driver. 2713 */ 2714 if (softstate->asoft_acquired == 1) { 2715 AGPDB_PRINT2((CE_WARN, 2716 "agpgart_close: auto release control over driver")); 2717 release_control(softstate); 2718 } 2719 2720 if (lyr_unconfig_devices(&softstate->asoft_devreg)) { 2721 AGPDB_PRINT2((CE_WARN, 2722 "agpgart_close: lyr_unconfig_device error")); 2723 mutex_exit(&softstate->asoft_instmutex); 2724 return (EIO); 2725 } 2726 softstate->asoft_agpen = 0; 2727 2728 if (!IS_INTEL_830(softstate->asoft_devreg.agprd_arctype)) { 2729 free_gart_table(softstate); 2730 } 2731 2732 lyr_end(&softstate->asoft_devreg); 2733 2734 /* 2735 * This statement must be positioned before agp_del_allkeys 2736 * agp_dealloc_mem indirectly called by agp_del_allkeys 2737 * will test this variable. 2738 */ 2739 softstate->asoft_opened = 0; 2740 2741 /* 2742 * Free the memory allocated by user applications which 2743 * was never deallocated. 2744 */ 2745 (void) agp_del_allkeys(softstate); 2746 2747 mutex_exit(&softstate->asoft_instmutex); 2748 2749 return (0); 2750 } 2751 2752 static int 2753 ioctl_agpgart_info(agpgart_softstate_t *softstate, void *arg, int flags) 2754 { 2755 agp_info_t infostruct; 2756 #ifdef _MULTI_DATAMODEL 2757 agp_info32_t infostruct32; 2758 #endif 2759 2760 bzero(&infostruct, sizeof (agp_info_t)); 2761 2762 #ifdef _MULTI_DATAMODEL 2763 bzero(&infostruct32, sizeof (agp_info32_t)); 2764 if (ddi_model_convert_from(flags & FMODELS) == DDI_MODEL_ILP32) { 2765 if (copyinfo(softstate, &infostruct)) 2766 return (EINVAL); 2767 2768 agpinfo_default_to_32(infostruct, infostruct32); 2769 if (ddi_copyout(&infostruct32, arg, 2770 sizeof (agp_info32_t), flags) != 0) 2771 return (EFAULT); 2772 2773 return (0); 2774 } 2775 #endif /* _MULTI_DATAMODEL */ 2776 if (copyinfo(softstate, &infostruct)) 2777 return (EINVAL); 2778 2779 if (ddi_copyout(&infostruct, arg, sizeof (agp_info_t), flags) != 0) { 2780 return (EFAULT); 2781 } 2782 2783 return (0); 2784 } 2785 2786 static int 2787 ioctl_agpgart_acquire(agpgart_softstate_t *st) 2788 { 2789 if (st->asoft_acquired) { 2790 AGPDB_PRINT2((CE_WARN, "ioctl_acquire: already acquired")); 2791 return (EBUSY); 2792 } 2793 acquire_control(st); 2794 return (0); 2795 } 2796 2797 static int 2798 ioctl_agpgart_release(agpgart_softstate_t *st) 2799 { 2800 if (is_controlling_proc(st) < 0) { 2801 AGPDB_PRINT2((CE_WARN, 2802 "ioctl_agpgart_release: not a controlling process")); 2803 return (EPERM); 2804 } 2805 release_control(st); 2806 return (0); 2807 } 2808 2809 static int 2810 ioctl_agpgart_setup(agpgart_softstate_t *st, void *arg, int flags) 2811 { 2812 agp_setup_t data; 2813 int rc = 0; 2814 2815 if (is_controlling_proc(st) < 0) { 2816 AGPDB_PRINT2((CE_WARN, 2817 "ioctl_agpgart_setup: not a controlling process")); 2818 return (EPERM); 2819 } 2820 2821 if (!IS_TRUE_AGP(st->asoft_devreg.agprd_arctype)) { 2822 AGPDB_PRINT2((CE_WARN, 2823 "ioctl_agpgart_setup: no true agp bridge")); 2824 return (EINVAL); 2825 } 2826 2827 if (ddi_copyin(arg, &data, sizeof (agp_setup_t), flags) != 0) 2828 return (EFAULT); 2829 2830 if (rc = agp_setup(st, data.agps_mode)) 2831 return (rc); 2832 /* Store agp mode status for kstat */ 2833 st->asoft_agpen = 1; 2834 return (0); 2835 } 2836 2837 static int 2838 ioctl_agpgart_alloc(agpgart_softstate_t *st, void *arg, int flags) 2839 { 2840 agp_allocate_t alloc_info; 2841 keytable_ent_t *entryp; 2842 size_t length; 2843 uint64_t pg_num; 2844 2845 if (is_controlling_proc(st) < 0) { 2846 AGPDB_PRINT2((CE_WARN, 2847 "ioctl_agpgart_alloc: not a controlling process")); 2848 return (EPERM); 2849 } 2850 2851 if (ddi_copyin(arg, &alloc_info, 2852 sizeof (agp_allocate_t), flags) != 0) { 2853 return (EFAULT); 2854 } 2855 pg_num = st->asoft_pgused + alloc_info.agpa_pgcount; 2856 if (pg_num > st->asoft_pgtotal) { 2857 AGPDB_PRINT2((CE_WARN, 2858 "ioctl_agpgart_alloc: exceeding the memory pages limit")); 2859 AGPDB_PRINT2((CE_WARN, 2860 "ioctl_agpgart_alloc: request %x pages failed", 2861 alloc_info.agpa_pgcount)); 2862 AGPDB_PRINT2((CE_WARN, 2863 "ioctl_agpgart_alloc: pages used %x total is %x", 2864 st->asoft_pgused, st->asoft_pgtotal)); 2865 2866 return (EINVAL); 2867 } 2868 2869 length = AGP_PAGES2BYTES(alloc_info.agpa_pgcount); 2870 entryp = agp_alloc_mem(st, length, alloc_info.agpa_type); 2871 if (!entryp) { 2872 AGPDB_PRINT2((CE_WARN, 2873 "ioctl_agpgart_alloc: allocate 0x%lx bytes failed", 2874 length)); 2875 return (ENOMEM); 2876 } 2877 ASSERT((entryp->kte_key >= 0) && (entryp->kte_key < AGP_MAXKEYS)); 2878 alloc_info.agpa_key = entryp->kte_key; 2879 if (alloc_info.agpa_type == AGP_PHYSICAL) { 2880 alloc_info.agpa_physical = 2881 (uint32_t)(entryp->kte_pfnarray[0] << AGP_PAGE_SHIFT); 2882 } 2883 /* Update the memory pagse used */ 2884 st->asoft_pgused += alloc_info.agpa_pgcount; 2885 2886 if (ddi_copyout(&alloc_info, arg, 2887 sizeof (agp_allocate_t), flags) != 0) { 2888 2889 return (EFAULT); 2890 } 2891 2892 return (0); 2893 } 2894 2895 static int 2896 ioctl_agpgart_dealloc(agpgart_softstate_t *st, intptr_t arg) 2897 { 2898 int key; 2899 keytable_ent_t *keyent; 2900 2901 if (is_controlling_proc(st) < 0) { 2902 AGPDB_PRINT2((CE_WARN, 2903 "ioctl_agpgart_dealloc: not a controlling process")); 2904 return (EPERM); 2905 } 2906 key = (int)arg; 2907 if ((key >= AGP_MAXKEYS) || key < 0) { 2908 return (EINVAL); 2909 } 2910 keyent = &st->asoft_table[key]; 2911 if (!keyent->kte_memhdl) { 2912 return (EINVAL); 2913 } 2914 2915 if (agp_dealloc_mem(st, keyent)) 2916 return (EINVAL); 2917 2918 /* Update the memory pages used */ 2919 st->asoft_pgused -= keyent->kte_pages; 2920 bzero(keyent, sizeof (keytable_ent_t)); 2921 2922 return (0); 2923 } 2924 2925 static int 2926 ioctl_agpgart_bind(agpgart_softstate_t *st, void *arg, int flags) 2927 { 2928 agp_bind_t bind_info; 2929 keytable_ent_t *keyent; 2930 int key; 2931 uint32_t pg_offset; 2932 int retval = 0; 2933 2934 if (is_controlling_proc(st) < 0) { 2935 AGPDB_PRINT2((CE_WARN, 2936 "ioctl_agpgart_bind: not a controlling process")); 2937 return (EPERM); 2938 } 2939 2940 if (ddi_copyin(arg, &bind_info, sizeof (agp_bind_t), flags) != 0) { 2941 return (EFAULT); 2942 } 2943 2944 key = bind_info.agpb_key; 2945 if ((key >= AGP_MAXKEYS) || key < 0) { 2946 AGPDB_PRINT2((CE_WARN, "ioctl_agpgart_bind: invalid key")); 2947 return (EINVAL); 2948 } 2949 2950 if (IS_INTEL_830(st->asoft_devreg.agprd_arctype)) { 2951 if (AGP_PAGES2KB(bind_info.agpb_pgstart) < 2952 st->asoft_info.agpki_presize) { 2953 AGPDB_PRINT2((CE_WARN, 2954 "ioctl_agpgart_bind: bind to prealloc area " 2955 "pgstart = %dKB < presize = %ldKB", 2956 AGP_PAGES2KB(bind_info.agpb_pgstart), 2957 st->asoft_info.agpki_presize)); 2958 return (EINVAL); 2959 } 2960 } 2961 2962 pg_offset = bind_info.agpb_pgstart; 2963 keyent = &st->asoft_table[key]; 2964 if (!keyent->kte_memhdl) { 2965 AGPDB_PRINT2((CE_WARN, 2966 "ioctl_agpgart_bind: Key = 0x%x can't get keyenty", 2967 key)); 2968 return (EINVAL); 2969 } 2970 2971 if (keyent->kte_bound != 0) { 2972 AGPDB_PRINT2((CE_WARN, 2973 "ioctl_agpgart_bind: Key = 0x%x already bound", 2974 key)); 2975 return (EINVAL); 2976 } 2977 retval = agp_bind_key(st, keyent, pg_offset); 2978 2979 if (retval == 0) { 2980 keyent->kte_pgoff = pg_offset; 2981 keyent->kte_bound = 1; 2982 } 2983 2984 return (retval); 2985 } 2986 2987 static int 2988 ioctl_agpgart_unbind(agpgart_softstate_t *st, void *arg, int flags) 2989 { 2990 int key, retval = 0; 2991 agp_unbind_t unbindinfo; 2992 keytable_ent_t *keyent; 2993 2994 if (is_controlling_proc(st) < 0) { 2995 AGPDB_PRINT2((CE_WARN, 2996 "ioctl_agpgart_bind: not a controlling process")); 2997 return (EPERM); 2998 } 2999 3000 if (ddi_copyin(arg, &unbindinfo, sizeof (unbindinfo), flags) != 0) { 3001 return (EFAULT); 3002 } 3003 key = unbindinfo.agpu_key; 3004 if ((key >= AGP_MAXKEYS) || key < 0) { 3005 AGPDB_PRINT2((CE_WARN, "ioctl_agpgart_unbind: invalid key")); 3006 return (EINVAL); 3007 } 3008 keyent = &st->asoft_table[key]; 3009 if (!keyent->kte_bound) { 3010 return (EINVAL); 3011 } 3012 3013 if ((retval = agp_unbind_key(st, keyent)) != 0) 3014 return (retval); 3015 3016 return (0); 3017 } 3018 3019 /*ARGSUSED*/ 3020 static int 3021 agpgart_ioctl(dev_t dev, int cmd, intptr_t intarg, int flags, 3022 cred_t *credp, int *rvalp) 3023 { 3024 int instance; 3025 int retval = 0; 3026 void *arg = (void*)intarg; 3027 3028 agpgart_softstate_t *softstate; 3029 3030 instance = AGP_DEV2INST(dev); 3031 softstate = ddi_get_soft_state(agpgart_glob_soft_handle, instance); 3032 if (softstate == NULL) { 3033 AGPDB_PRINT2((CE_WARN, "agpgart_ioctl: get soft state err")); 3034 return (ENXIO); 3035 } 3036 3037 if ((cmd != AGPIOC_INFO) && secpolicy_gart_access(credp)) { 3038 AGPDB_PRINT2((CE_WARN, "agpgart_ioctl: permission denied")); 3039 return (EPERM); 3040 } 3041 3042 mutex_enter(&softstate->asoft_instmutex); 3043 3044 switch (cmd) { 3045 case AGPIOC_INFO: 3046 retval = ioctl_agpgart_info(softstate, arg, flags); 3047 break; 3048 case AGPIOC_ACQUIRE: 3049 retval = ioctl_agpgart_acquire(softstate); 3050 break; 3051 case AGPIOC_RELEASE: 3052 retval = ioctl_agpgart_release(softstate); 3053 break; 3054 case AGPIOC_SETUP: 3055 retval = ioctl_agpgart_setup(softstate, arg, flags); 3056 break; 3057 case AGPIOC_ALLOCATE: 3058 retval = ioctl_agpgart_alloc(softstate, arg, flags); 3059 break; 3060 case AGPIOC_DEALLOCATE: 3061 retval = ioctl_agpgart_dealloc(softstate, intarg); 3062 break; 3063 case AGPIOC_BIND: 3064 retval = ioctl_agpgart_bind(softstate, arg, flags); 3065 break; 3066 case AGPIOC_UNBIND: 3067 retval = ioctl_agpgart_unbind(softstate, arg, flags); 3068 break; 3069 default: 3070 AGPDB_PRINT2((CE_WARN, "agpgart_ioctl: wrong argument")); 3071 retval = ENXIO; 3072 break; 3073 } 3074 3075 mutex_exit(&softstate->asoft_instmutex); 3076 return (retval); 3077 } 3078 3079 static int 3080 agpgart_segmap(dev_t dev, off_t off, struct as *asp, 3081 caddr_t *addrp, off_t len, unsigned int prot, 3082 unsigned int maxprot, unsigned int flags, cred_t *credp) 3083 { 3084 3085 struct agpgart_softstate *softstate; 3086 int instance; 3087 int rc = 0; 3088 3089 instance = AGP_DEV2INST(dev); 3090 softstate = ddi_get_soft_state(agpgart_glob_soft_handle, instance); 3091 if (softstate == NULL) { 3092 AGPDB_PRINT2((CE_WARN, "agpgart_segmap: get soft state err")); 3093 return (ENXIO); 3094 } 3095 if (!AGP_ALIGNED(len)) 3096 return (EINVAL); 3097 3098 mutex_enter(&softstate->asoft_instmutex); 3099 3100 /* 3101 * Process must have gart map privilege or gart access privilege 3102 * to map agp memory. 3103 */ 3104 if (secpolicy_gart_map(credp)) { 3105 mutex_exit(&softstate->asoft_instmutex); 3106 AGPDB_PRINT2((CE_WARN, "agpgart_segmap: permission denied")); 3107 return (EPERM); 3108 } 3109 3110 rc = devmap_setup(dev, (offset_t)off, asp, addrp, 3111 (size_t)len, prot, maxprot, flags, credp); 3112 3113 mutex_exit(&softstate->asoft_instmutex); 3114 return (rc); 3115 } 3116 3117 /*ARGSUSED*/ 3118 static int 3119 agpgart_devmap(dev_t dev, devmap_cookie_t cookie, offset_t offset, size_t len, 3120 size_t *mappedlen, uint_t model) 3121 { 3122 struct agpgart_softstate *softstate; 3123 int instance, status; 3124 struct keytable_ent *mementry; 3125 offset_t local_offset; 3126 3127 instance = AGP_DEV2INST(dev); 3128 softstate = ddi_get_soft_state(agpgart_glob_soft_handle, instance); 3129 if (softstate == NULL) { 3130 AGPDB_PRINT2((CE_WARN, "agpgart_devmap: get soft state err")); 3131 return (ENXIO); 3132 } 3133 3134 3135 if (offset > MB2BYTES(softstate->asoft_info.agpki_apersize)) { 3136 AGPDB_PRINT2((CE_WARN, "agpgart_devmap: offset is too large")); 3137 return (EINVAL); 3138 } 3139 3140 /* 3141 * Can not find any memory now, so fail. 3142 */ 3143 3144 mementry = agp_find_bound_keyent(softstate, AGP_BYTES2PAGES(offset)); 3145 3146 if (mementry == NULL) { 3147 AGPDB_PRINT2((CE_WARN, 3148 "agpgart_devmap: can not find the proper keyent")); 3149 return (EINVAL); 3150 } 3151 3152 local_offset = offset - AGP_PAGES2BYTES(mementry->kte_pgoff); 3153 3154 if (len > (AGP_PAGES2BYTES(mementry->kte_pages) - local_offset)) { 3155 len = AGP_PAGES2BYTES(mementry->kte_pages) - local_offset; 3156 } 3157 3158 switch (mementry->kte_type) { 3159 case AGP_NORMAL: 3160 if (PMEMP(mementry->kte_memhdl)->pmem_cookie) { 3161 status = devmap_pmem_setup(cookie, 3162 softstate->asoft_dip, 3163 &agp_devmap_cb, 3164 PMEMP(mementry->kte_memhdl)->pmem_cookie, 3165 local_offset, 3166 len, PROT_ALL, 3167 (DEVMAP_DEFAULTS|IOMEM_DATA_UC_WR_COMBINE), 3168 &mem_dev_acc_attr); 3169 } else { 3170 AGPDB_PRINT2((CE_WARN, 3171 "agpgart_devmap: not a valid memory type")); 3172 return (EINVAL); 3173 3174 } 3175 3176 break; 3177 default: 3178 AGPDB_PRINT2((CE_WARN, 3179 "agpgart_devmap: not a valid memory type")); 3180 return (EINVAL); 3181 } 3182 3183 3184 if (status == 0) { 3185 *mappedlen = len; 3186 } else { 3187 *mappedlen = 0; 3188 AGPDB_PRINT2((CE_WARN, 3189 "agpgart_devmap: devmap interface failed")); 3190 return (EINVAL); 3191 } 3192 3193 return (0); 3194 } 3195 3196 static struct cb_ops agpgart_cb_ops = { 3197 agpgart_open, /* open() */ 3198 agpgart_close, /* close() */ 3199 nodev, /* strategy() */ 3200 nodev, /* print routine */ 3201 nodev, /* no dump routine */ 3202 nodev, /* read() */ 3203 nodev, /* write() */ 3204 agpgart_ioctl, /* agpgart_ioctl */ 3205 agpgart_devmap, /* devmap routine */ 3206 nodev, /* no longer use mmap routine */ 3207 agpgart_segmap, /* system segmap routine */ 3208 nochpoll, /* no chpoll routine */ 3209 ddi_prop_op, /* system prop operations */ 3210 0, /* not a STREAMS driver */ 3211 D_DEVMAP | D_MP, /* safe for multi-thread/multi-processor */ 3212 CB_REV, /* cb_ops version? */ 3213 nodev, /* cb_aread() */ 3214 nodev, /* cb_awrite() */ 3215 }; 3216 3217 static struct dev_ops agpgart_ops = { 3218 DEVO_REV, /* devo_rev */ 3219 0, /* devo_refcnt */ 3220 agpgart_getinfo, /* devo_getinfo */ 3221 nulldev, /* devo_identify */ 3222 nulldev, /* devo_probe */ 3223 agpgart_attach, /* devo_attach */ 3224 agpgart_detach, /* devo_detach */ 3225 nodev, /* devo_reset */ 3226 &agpgart_cb_ops, /* devo_cb_ops */ 3227 (struct bus_ops *)0, /* devo_bus_ops */ 3228 NULL, /* devo_power */ 3229 }; 3230 3231 static struct modldrv modldrv = { 3232 &mod_driverops, 3233 "AGP driver v1.9", 3234 &agpgart_ops, 3235 }; 3236 3237 static struct modlinkage modlinkage = { 3238 MODREV_1, /* MODREV_1 is indicated by manual */ 3239 {&modldrv, NULL, NULL, NULL} 3240 }; 3241 3242 static void *agpgart_glob_soft_handle; 3243 3244 int 3245 _init(void) 3246 { 3247 int ret = DDI_SUCCESS; 3248 3249 ret = ddi_soft_state_init(&agpgart_glob_soft_handle, 3250 sizeof (agpgart_softstate_t), 3251 AGPGART_MAX_INSTANCES); 3252 3253 if (ret != 0) { 3254 AGPDB_PRINT2((CE_WARN, 3255 "_init: soft state init error code=0x%x", ret)); 3256 return (ret); 3257 } 3258 3259 if ((ret = mod_install(&modlinkage)) != 0) { 3260 AGPDB_PRINT2((CE_WARN, 3261 "_init: mod install error code=0x%x", ret)); 3262 ddi_soft_state_fini(&agpgart_glob_soft_handle); 3263 return (ret); 3264 } 3265 3266 return (DDI_SUCCESS); 3267 } 3268 3269 int 3270 _info(struct modinfo *modinfop) 3271 { 3272 return (mod_info(&modlinkage, modinfop)); 3273 } 3274 3275 int 3276 _fini(void) 3277 { 3278 int ret; 3279 3280 if ((ret = mod_remove(&modlinkage)) == 0) { 3281 ddi_soft_state_fini(&agpgart_glob_soft_handle); 3282 } 3283 3284 return (ret); 3285 } 3286