1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved. 23 */ 24 25 #ifndef _SYS_PCI_TOOLS_H 26 #define _SYS_PCI_TOOLS_H 27 28 #include <sys/modctl.h> 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 /* 35 * Versioning. 36 */ 37 #define PCITOOL_V1 1 38 #define PCITOOL_V2 2 39 #define PCITOOL_VERSION PCITOOL_V2 40 41 /* File suffixes for nexus pcitool nodes. */ 42 #define PCI_MINOR_REG "reg" 43 #define PCI_MINOR_INTR "intr" 44 45 /* 46 * Ioctls for PCI tools. 47 */ 48 #define PCITOOL_IOC (('P' << 24) | ('C' << 16) | ('T' << 8)) 49 50 /* Read/write a device on a PCI bus, in physical space. */ 51 #define PCITOOL_DEVICE_GET_REG (PCITOOL_IOC | 1) 52 #define PCITOOL_DEVICE_SET_REG (PCITOOL_IOC | 2) 53 54 /* Read/write the PCI nexus bridge, in physical space. */ 55 #define PCITOOL_NEXUS_GET_REG (PCITOOL_IOC | 3) 56 #define PCITOOL_NEXUS_SET_REG (PCITOOL_IOC | 4) 57 58 /* Get/set interrupt-CPU mapping for PCI devices. */ 59 #define PCITOOL_DEVICE_GET_INTR (PCITOOL_IOC | 5) 60 #define PCITOOL_DEVICE_SET_INTR (PCITOOL_IOC | 6) 61 62 /* Get system interrupt information */ 63 #define PCITOOL_SYSTEM_INTR_INFO (PCITOOL_IOC | 8) 64 65 /* 66 * This file contains data structures for the pci tool. 67 */ 68 #define PCITOOL_CONFIG 0 69 #define PCITOOL_BAR0 1 70 #define PCITOOL_BAR1 2 71 #define PCITOOL_BAR2 3 72 #define PCITOOL_BAR3 4 73 #define PCITOOL_BAR4 5 74 #define PCITOOL_BAR5 6 75 #define PCITOOL_ROM 7 76 77 /* 78 * Pass this through barnum to signal to use a base addr instead. 79 * This is for platforms which do not have a way to automatically map 80 * a selected bank to a base addr. 81 */ 82 #define PCITOOL_BASE 0xFF 83 84 /* 85 * BAR corresponding to space desired. 86 */ 87 typedef enum { 88 config = PCITOOL_CONFIG, 89 bar0 = PCITOOL_BAR0, 90 bar1 = PCITOOL_BAR1, 91 bar2 = PCITOOL_BAR2, 92 bar3 = PCITOOL_BAR3, 93 bar4 = PCITOOL_BAR4, 94 bar5 = PCITOOL_BAR5, 95 rom = PCITOOL_ROM 96 } pcitool_bars_t; 97 98 99 /* 100 * PCITOOL error numbers. 101 */ 102 103 typedef enum { 104 PCITOOL_SUCCESS = 0x0, 105 PCITOOL_INVALID_CPUID, 106 PCITOOL_INVALID_INO, 107 PCITOOL_INVALID_MSI, 108 PCITOOL_PENDING_INTRTIMEOUT, 109 PCITOOL_REGPROP_NOTWELLFORMED, 110 PCITOOL_INVALID_ADDRESS, 111 PCITOOL_NOT_ALIGNED, 112 PCITOOL_OUT_OF_RANGE, 113 PCITOOL_END_OF_RANGE, 114 PCITOOL_ROM_DISABLED, 115 PCITOOL_ROM_WRITE, 116 PCITOOL_IO_ERROR, 117 PCITOOL_INVALID_SIZE 118 } pcitool_errno_t; 119 120 121 /* 122 * PCITOOL_DEVICE_SET_INTR ioctl data structure to re-assign the interrupts. 123 */ 124 typedef struct pcitool_intr_set { 125 uint16_t user_version; /* Userland program version - to krnl */ 126 uint16_t drvr_version; /* Driver version - from kernel */ 127 uint32_t ino; /* interrupt to set - to kernel */ 128 uint32_t msi; /* Specific MSI to set - to kernel */ 129 uint32_t cpu_id; /* to: cpu to set / from: old cpu returned */ 130 uint32_t old_cpu; /* to/from kernel: old cpu id */ 131 uint32_t flags; /* to kernel */ 132 pcitool_errno_t status; /* from kernel */ 133 } pcitool_intr_set_t; 134 135 /* 136 * Flags for pcitool_intr_get/set_t/info_t 137 */ 138 #define PCITOOL_INTR_FLAG_SET_GROUP 0x1 139 #define PCITOOL_INTR_FLAG_GET_MSI 0x2 140 #define PCITOOL_INTR_FLAG_SET_MSI 0x4 141 142 /* 143 * PCITOOL_DEVICE_GET_INTR ioctl data structure to dump out the 144 * ino mapping information. 145 */ 146 147 typedef struct pcitool_intr_dev { 148 uint32_t dev_inst; /* device instance - from kernel */ 149 char driver_name[MAXMODCONFNAME]; /* from kernel */ 150 char path[MAXPATHLEN]; /* device path - from kernel */ 151 } pcitool_intr_dev_t; 152 153 typedef struct pcitool_intr_get { 154 uint16_t user_version; /* Userland program version - to krnl */ 155 uint16_t drvr_version; /* Driver version - from kernel */ 156 uint32_t ino; /* interrupt number - to kernel */ 157 uint32_t msi; /* MSI number - to kernel */ 158 uint8_t num_devs_ret; /* room for this # of devs to be */ 159 /* returned - to kernel */ 160 /* # devs returned - from kernel */ 161 uint8_t num_devs; /* # devs on this ino - from kernel */ 162 /* intrs enabled for devs if > 0 */ 163 uint8_t ctlr; /* controller number - from kernel */ 164 uint32_t cpu_id; /* cpu of interrupt - from kernel */ 165 uint32_t flags; /* to kernel */ 166 pcitool_errno_t status; /* returned status - from kernel */ 167 pcitool_intr_dev_t dev[1]; /* start of variable device list */ 168 /* from kernel */ 169 } pcitool_intr_get_t; 170 171 /* 172 * Get the size needed to return the number of devices wanted. 173 * Can't say num_devs - 1 as num_devs may be unsigned. 174 */ 175 #define PCITOOL_IGET_SIZE(num_devs) \ 176 (sizeof (pcitool_intr_get_t) - \ 177 sizeof (pcitool_intr_dev_t) + \ 178 (num_devs * sizeof (pcitool_intr_dev_t))) 179 180 typedef struct pcitool_intr_info { 181 uint16_t user_version; /* Userland program version - to krnl */ 182 uint16_t drvr_version; /* Driver version - from kernel */ 183 uint32_t flags; /* to kernel */ 184 uint32_t num_intr; /* Number of intrs suppt by nexus */ 185 uint32_t num_cpu; 186 uint32_t ctlr_version; /* Intr ctlr HW version - from kernel */ 187 uchar_t ctlr_type; /* A PCITOOL_CTLR_TYPE - from kernel */ 188 } pcitool_intr_info_t; 189 190 /* 191 * Interrupt controller types 192 */ 193 #define PCITOOL_CTLR_TYPE_UNKNOWN 0 194 #define PCITOOL_CTLR_TYPE_RISC 1 195 #define PCITOOL_CTLR_TYPE_UPPC 2 196 #define PCITOOL_CTLR_TYPE_PCPLUSMP 3 197 #define PCITOOL_CTLR_TYPE_APIX 4 198 199 /* 200 * Size and endian fields for acc_attr bitmask. 201 */ 202 #define PCITOOL_ACC_ATTR_SIZE_MASK 0x3 203 #define PCITOOL_ACC_ATTR_SIZE_1 0x0 204 #define PCITOOL_ACC_ATTR_SIZE_2 0x1 205 #define PCITOOL_ACC_ATTR_SIZE_4 0x2 206 #define PCITOOL_ACC_ATTR_SIZE_8 0x3 207 #define PCITOOL_ACC_ATTR_SIZE(x) (1 << (x & PCITOOL_ACC_ATTR_SIZE_MASK)) 208 209 #define PCITOOL_ACC_ATTR_ENDN_MASK 0x100 210 #define PCITOOL_ACC_ATTR_ENDN_LTL 0x0 211 #define PCITOOL_ACC_ATTR_ENDN_BIG 0x100 212 #define PCITOOL_ACC_IS_BIG_ENDIAN(x) (x & PCITOOL_ACC_ATTR_ENDN_BIG) 213 214 /* 215 * Data stucture to read and write to pci device registers. 216 * This is the argument to the following ioctls: 217 * PCITOOL_DEVICE_SET/GET_REG 218 * PCITOOL_NEXUS_SET/GET_REG 219 */ 220 typedef struct pcitool_reg { 221 uint16_t user_version; /* Userland program version - to krnl */ 222 uint16_t drvr_version; /* Driver version - from kernel */ 223 uint8_t bus_no; /* pci bus - to kernel */ 224 uint8_t dev_no; /* pci dev - to kernel */ 225 uint8_t func_no; /* pci function - to kernel */ 226 uint8_t barnum; /* bank (DEVCTL_NEXUS_SET/GET_REG) or */ 227 /* BAR from pcitools_bar_t */ 228 /* (DEVCTL_DEVICE_SET/GET_REG) */ 229 /* to kernel */ 230 uint64_t offset; /* to kernel */ 231 uint32_t acc_attr; /* access attributes - to kernel */ 232 uint32_t padding1; /* 8-byte align next uint64_t for X86 */ 233 uint64_t data; /* to/from kernel, 64-bit alignment */ 234 uint32_t status; /* from kernel */ 235 uint32_t padding2; /* 8-byte align next uint64_t for X86 */ 236 uint64_t phys_addr; /* from kernel, 64-bit alignment */ 237 } pcitool_reg_t; 238 239 240 #ifdef __cplusplus 241 } 242 #endif 243 244 #endif /* _SYS_PCI_TOOLS_H */ 245