1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 /* 30 * Support routines for VGA drivers 31 */ 32 33 #include <sys/debug.h> 34 #include <sys/types.h> 35 #include <sys/param.h> 36 #include <sys/time.h> 37 #include <sys/buf.h> 38 #include <sys/errno.h> 39 #include <sys/systm.h> 40 #include <sys/conf.h> 41 42 #include <sys/vgareg.h> 43 #include <sys/vgasubr.h> 44 #include <sys/cmn_err.h> 45 46 #include <sys/kmem.h> 47 #include <sys/conf.h> 48 #include <sys/ddi.h> 49 #include <sys/devops.h> 50 #include <sys/sunddi.h> 51 52 #include <sys/modctl.h> 53 54 #define GET_HORIZ_END(c) vga_get_crtc(c, VGA_CRTC_H_D_END) 55 #define GET_VERT_END(c) (vga_get_crtc(c, VGA_CRTC_VDE) \ 56 + (((vga_get_crtc(c, VGA_CRTC_OVFL_REG) >> \ 57 VGA_CRTC_OVFL_REG_VDE8) & 1) << 8) \ 58 + (((vga_get_crtc(c, VGA_CRTC_OVFL_REG) >> \ 59 VGA_CRTC_OVFL_REG_VDE9) & 1) << 9)) 60 61 #define GET_VERT_X2(c) \ 62 (vga_get_crtc(c, VGA_CRTC_CRT_MD) & VGA_CRTC_CRT_MD_VT_X2) 63 64 unsigned char VGA_CRTC_TEXT[NUM_CRTC_REG] = { 65 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, 66 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x05, 0x00, 67 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, 68 0xff }; 69 unsigned char VGA_SEQ_TEXT[NUM_SEQ_REG] = { 70 0x03, 0x00, 0x03, 0x00, 0x02 }; 71 unsigned char VGA_GRC_TEXT[NUM_GRC_REG] = { 72 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff }; 73 unsigned char VGA_ATR_TEXT[NUM_ATR_REG] = { 74 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, 75 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 76 0x0c, 0x00, 0x0f, 0x08, 0x00 }; 77 78 void 79 vga_get_hardware_settings(struct vgaregmap *reg, int *width, int *height) 80 { 81 *width = (GET_HORIZ_END(reg)+1)*8; 82 *height = GET_VERT_END(reg)+1; 83 if (GET_VERT_X2(reg)) *height *= 2; 84 } 85 86 #define PUTB(reg, off, v) ddi_put8(reg->handle, reg->addr + (off), v) 87 #define GETB(reg, off) ddi_get8(reg->handle, reg->addr + (off)) 88 89 int 90 vga_get_reg(struct vgaregmap *reg, int indexreg) 91 { 92 return (GETB(reg, indexreg)); 93 } 94 95 void 96 vga_set_reg(struct vgaregmap *reg, int indexreg, int v) 97 { 98 PUTB(reg, indexreg, v); 99 } 100 101 int 102 vga_get_crtc(struct vgaregmap *reg, int i) 103 { 104 return (vga_get_indexed(reg, VGA_CRTC_ADR, VGA_CRTC_DATA, i)); 105 } 106 107 void 108 vga_set_crtc(struct vgaregmap *reg, int i, int v) 109 { 110 vga_set_indexed(reg, VGA_CRTC_ADR, VGA_CRTC_DATA, i, v); 111 } 112 113 int 114 vga_get_seq(struct vgaregmap *reg, int i) 115 { 116 return (vga_get_indexed(reg, VGA_SEQ_ADR, VGA_SEQ_DATA, i)); 117 } 118 119 void 120 vga_set_seq(struct vgaregmap *reg, int i, int v) 121 { 122 vga_set_indexed(reg, VGA_SEQ_ADR, VGA_SEQ_DATA, i, v); 123 } 124 125 int 126 vga_get_grc(struct vgaregmap *reg, int i) 127 { 128 return (vga_get_indexed(reg, VGA_GRC_ADR, VGA_GRC_DATA, i)); 129 } 130 131 void 132 vga_set_grc(struct vgaregmap *reg, int i, int v) 133 { 134 vga_set_indexed(reg, VGA_GRC_ADR, VGA_GRC_DATA, i, v); 135 } 136 137 int 138 vga_get_atr(struct vgaregmap *reg, int i) 139 { 140 int ret; 141 142 (void) GETB(reg, CGA_STAT); 143 PUTB(reg, VGA_ATR_AD, i); 144 ret = GETB(reg, VGA_ATR_DATA); 145 146 (void) GETB(reg, CGA_STAT); 147 PUTB(reg, VGA_ATR_AD, VGA_ATR_ENB_PLT); 148 149 return (ret); 150 } 151 152 void 153 vga_set_atr(struct vgaregmap *reg, int i, int v) 154 { 155 (void) GETB(reg, CGA_STAT); 156 PUTB(reg, VGA_ATR_AD, i); 157 PUTB(reg, VGA_ATR_AD, v); 158 159 (void) GETB(reg, CGA_STAT); 160 PUTB(reg, VGA_ATR_AD, VGA_ATR_ENB_PLT); 161 } 162 163 void 164 vga_set_indexed( 165 struct vgaregmap *reg, 166 int indexreg, 167 int datareg, 168 unsigned char index, 169 unsigned char val) 170 { 171 PUTB(reg, indexreg, index); 172 PUTB(reg, datareg, val); 173 } 174 175 int 176 vga_get_indexed( 177 struct vgaregmap *reg, 178 int indexreg, 179 int datareg, 180 unsigned char index) 181 { 182 PUTB(reg, indexreg, index); 183 return (GETB(reg, datareg)); 184 } 185 186 /* 187 * VGA DAC access functions 188 * Note: These assume a VGA-style 6-bit DAC. Some DACs are 8 bits 189 * wide. These functions are not appropriate for those DACs. 190 */ 191 void 192 vga_put_cmap( 193 struct vgaregmap *reg, 194 int index, 195 unsigned char r, 196 unsigned char g, 197 unsigned char b) 198 { 199 200 PUTB(reg, VGA_DAC_WR_AD, index); 201 PUTB(reg, VGA_DAC_DATA, r >> 2); 202 PUTB(reg, VGA_DAC_DATA, g >> 2); 203 PUTB(reg, VGA_DAC_DATA, b >> 2); 204 } 205 206 void 207 vga_get_cmap( 208 struct vgaregmap *reg, 209 int index, 210 unsigned char *r, 211 unsigned char *g, 212 unsigned char *b) 213 { 214 PUTB(reg, VGA_DAC_RD_AD, index); 215 *r = GETB(reg, VGA_DAC_DATA) << 2; 216 *g = GETB(reg, VGA_DAC_DATA) << 2; 217 *b = GETB(reg, VGA_DAC_DATA) << 2; 218 } 219 220 #ifdef DEBUG 221 222 void 223 vga_dump_regs(struct vgaregmap *reg, 224 int maxseq, int maxcrtc, int maxatr, int maxgrc) 225 { 226 int i, j; 227 228 printf("Sequencer regs:\n"); 229 for (i = 0; i < maxseq; i += 0x10) { 230 printf("%2x: ", i); 231 for (j = 0; j < 0x08; j++) { 232 printf("%2x ", vga_get_seq(reg, i+j)); 233 } 234 printf("- "); 235 for (; j < 0x10; j++) { 236 printf("%2x ", vga_get_seq(reg, i+j)); 237 } 238 printf("\n"); 239 } 240 printf("\nCRT Controller regs:\n"); 241 for (i = 0; i < maxcrtc; i += 0x10) { 242 printf("%2x: ", i); 243 for (j = 0; j < 0x08; j++) { 244 printf("%2x ", vga_get_crtc(reg, i+j)); 245 } 246 printf("- "); 247 for (; j < 0x10; j++) { 248 printf("%2x ", vga_get_crtc(reg, i+j)); 249 } 250 printf("\n"); 251 } 252 printf("\nAttribute Controller regs:\n"); 253 for (i = 0; i < maxatr; i += 0x10) { 254 printf("%2x: ", i); 255 for (j = 0; j < 0x08; j++) { 256 printf("%2x ", vga_get_atr(reg, i+j)); 257 } 258 printf("- "); 259 for (; j < 0x10; j++) { 260 printf("%2x ", vga_get_atr(reg, i+j)); 261 } 262 printf("\n"); 263 } 264 printf("\nGraphics Controller regs:\n"); 265 for (i = 0; i < maxgrc; i += 0x10) { 266 printf("%2x: ", i); 267 for (j = 0; j < 0x08; j++) { 268 printf("%2x ", vga_get_grc(reg, i+j)); 269 } 270 printf("- "); 271 for (; j < 0x10; j++) { 272 printf("%2x ", vga_get_grc(reg, i+j)); 273 } 274 printf("\n"); 275 } 276 } 277 #endif /* DEBUG */ 278 279 /* 280 * VGA 80X25 text mode standard palette 281 */ 282 unsigned char VGA_TEXT_PALETTES[64][3] = { 283 { 0x00, 0x00, 0x00 }, 284 { 0x00, 0x00, 0x2A }, 285 { 0x00, 0x2A, 0x00 }, 286 { 0x00, 0x2A, 0x2A }, 287 { 0x2A, 0x00, 0x00 }, 288 { 0x2A, 0x00, 0x2A }, 289 { 0x2A, 0x2A, 0x00 }, 290 { 0x2A, 0x2A, 0x2A }, 291 { 0x00, 0x00, 0x15 }, 292 { 0x00, 0x00, 0x3F }, 293 { 0x00, 0x2A, 0x15 }, 294 { 0x00, 0x2A, 0x3F }, 295 { 0x2A, 0x00, 0x15 }, 296 { 0x2A, 0x00, 0x3F }, 297 { 0x2A, 0x2A, 0x15 }, 298 { 0x2A, 0x2A, 0x3F }, 299 { 0x00, 0x15, 0x00 }, 300 { 0x00, 0x15, 0x2A }, 301 { 0x00, 0x3F, 0x00 }, 302 { 0x00, 0x3F, 0x2A }, 303 { 0x2A, 0x15, 0x00 }, 304 { 0x2A, 0x15, 0x2A }, 305 { 0x2A, 0x3F, 0x00 }, 306 { 0x2A, 0x3F, 0x2A }, 307 { 0x00, 0x15, 0x15 }, 308 { 0x00, 0x15, 0x3F }, 309 { 0x00, 0x3F, 0x15 }, 310 { 0x00, 0x3F, 0x3F }, 311 { 0x2A, 0x15, 0x15 }, 312 { 0x2A, 0x15, 0x3F }, 313 { 0x2A, 0x3F, 0x15 }, 314 { 0x2A, 0x3F, 0x3F }, 315 { 0x15, 0x00, 0x00 }, 316 { 0x15, 0x00, 0x2A }, 317 { 0x15, 0x2A, 0x00 }, 318 { 0x15, 0x2A, 0x2A }, 319 { 0x3F, 0x00, 0x00 }, 320 { 0x3F, 0x00, 0x2A }, 321 { 0x3F, 0x2A, 0x00 }, 322 { 0x3F, 0x2A, 0x2A }, 323 { 0x15, 0x00, 0x15 }, 324 { 0x15, 0x00, 0x3F }, 325 { 0x15, 0x2A, 0x15 }, 326 { 0x15, 0x2A, 0x3F }, 327 { 0x3F, 0x00, 0x15 }, 328 { 0x3F, 0x00, 0x3F }, 329 { 0x3F, 0x2A, 0x15 }, 330 { 0x3F, 0x2A, 0x3F }, 331 { 0x15, 0x15, 0x00 }, 332 { 0x15, 0x15, 0x2A }, 333 { 0x15, 0x3F, 0x00 }, 334 { 0x15, 0x3F, 0x2A }, 335 { 0x3F, 0x15, 0x00 }, 336 { 0x3F, 0x15, 0x2A }, 337 { 0x3F, 0x3F, 0x00 }, 338 { 0x3F, 0x3F, 0x2A }, 339 { 0x15, 0x15, 0x15 }, 340 { 0x15, 0x15, 0x3F }, 341 { 0x15, 0x3F, 0x15 }, 342 { 0x15, 0x3F, 0x3F }, 343 { 0x3F, 0x15, 0x15 }, 344 { 0x3F, 0x15, 0x3F }, 345 { 0x3F, 0x3F, 0x15 }, 346 { 0x3F, 0x3F, 0x3F } 347 }; 348