1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // AMD ALSA SoC PCM Driver 4 // 5 //Copyright 2016 Advanced Micro Devices, Inc. 6 7 #include <linux/platform_device.h> 8 #include <linux/module.h> 9 #include <linux/err.h> 10 #include <linux/io.h> 11 #include <sound/pcm_params.h> 12 #include <sound/soc.h> 13 #include <sound/soc-dai.h> 14 #include <linux/dma-mapping.h> 15 16 #include "acp3x.h" 17 18 #define DRV_NAME "acp3x-i2s" 19 20 static int acp3x_i2s_set_fmt(struct snd_soc_dai *cpu_dai, 21 unsigned int fmt) 22 { 23 struct i2s_dev_data *adata; 24 int mode; 25 26 adata = snd_soc_dai_get_drvdata(cpu_dai); 27 mode = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 28 switch (mode) { 29 case SND_SOC_DAIFMT_I2S: 30 adata->tdm_mode = TDM_DISABLE; 31 break; 32 case SND_SOC_DAIFMT_DSP_A: 33 adata->tdm_mode = TDM_ENABLE; 34 break; 35 default: 36 return -EINVAL; 37 } 38 return 0; 39 } 40 41 static int acp3x_i2s_set_tdm_slot(struct snd_soc_dai *cpu_dai, 42 u32 tx_mask, u32 rx_mask, int slots, int slot_width) 43 { 44 struct i2s_dev_data *adata; 45 u32 frm_len; 46 u16 slot_len; 47 48 adata = snd_soc_dai_get_drvdata(cpu_dai); 49 50 /* These values are as per Hardware Spec */ 51 switch (slot_width) { 52 case SLOT_WIDTH_8: 53 slot_len = 8; 54 break; 55 case SLOT_WIDTH_16: 56 slot_len = 16; 57 break; 58 case SLOT_WIDTH_24: 59 slot_len = 24; 60 break; 61 case SLOT_WIDTH_32: 62 slot_len = 0; 63 break; 64 default: 65 return -EINVAL; 66 } 67 frm_len = FRM_LEN | (slots << 15) | (slot_len << 18); 68 adata->tdm_fmt = frm_len; 69 return 0; 70 } 71 72 static int acp3x_i2s_hwparams(struct snd_pcm_substream *substream, 73 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 74 { 75 struct i2s_stream_instance *rtd; 76 struct snd_soc_pcm_runtime *prtd; 77 struct snd_soc_card *card; 78 struct acp3x_platform_info *pinfo; 79 struct i2s_dev_data *adata; 80 u32 val; 81 u32 reg_val, frmt_reg; 82 83 prtd = substream->private_data; 84 rtd = substream->runtime->private_data; 85 card = prtd->card; 86 adata = snd_soc_dai_get_drvdata(dai); 87 pinfo = snd_soc_card_get_drvdata(card); 88 if (pinfo) { 89 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 90 rtd->i2s_instance = pinfo->play_i2s_instance; 91 else 92 rtd->i2s_instance = pinfo->cap_i2s_instance; 93 } 94 95 /* These values are as per Hardware Spec */ 96 switch (params_format(params)) { 97 case SNDRV_PCM_FORMAT_U8: 98 case SNDRV_PCM_FORMAT_S8: 99 rtd->xfer_resolution = 0x0; 100 break; 101 case SNDRV_PCM_FORMAT_S16_LE: 102 rtd->xfer_resolution = 0x02; 103 break; 104 case SNDRV_PCM_FORMAT_S24_LE: 105 rtd->xfer_resolution = 0x04; 106 break; 107 case SNDRV_PCM_FORMAT_S32_LE: 108 rtd->xfer_resolution = 0x05; 109 break; 110 default: 111 return -EINVAL; 112 } 113 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 114 switch (rtd->i2s_instance) { 115 case I2S_BT_INSTANCE: 116 reg_val = mmACP_BTTDM_ITER; 117 frmt_reg = mmACP_BTTDM_TXFRMT; 118 break; 119 case I2S_SP_INSTANCE: 120 default: 121 reg_val = mmACP_I2STDM_ITER; 122 frmt_reg = mmACP_I2STDM_TXFRMT; 123 } 124 } else { 125 switch (rtd->i2s_instance) { 126 case I2S_BT_INSTANCE: 127 reg_val = mmACP_BTTDM_IRER; 128 frmt_reg = mmACP_BTTDM_RXFRMT; 129 break; 130 case I2S_SP_INSTANCE: 131 default: 132 reg_val = mmACP_I2STDM_IRER; 133 frmt_reg = mmACP_I2STDM_RXFRMT; 134 } 135 } 136 if (adata->tdm_mode) { 137 val = rv_readl(rtd->acp3x_base + reg_val); 138 rv_writel(val | 0x2, rtd->acp3x_base + reg_val); 139 rv_writel(adata->tdm_fmt, rtd->acp3x_base + frmt_reg); 140 } 141 val = rv_readl(rtd->acp3x_base + reg_val); 142 val = val | (rtd->xfer_resolution << 3); 143 rv_writel(val, rtd->acp3x_base + reg_val); 144 return 0; 145 } 146 147 static int acp3x_i2s_trigger(struct snd_pcm_substream *substream, 148 int cmd, struct snd_soc_dai *dai) 149 { 150 struct i2s_stream_instance *rtd; 151 struct snd_soc_pcm_runtime *prtd; 152 struct snd_soc_card *card; 153 struct acp3x_platform_info *pinfo; 154 u32 ret, val, period_bytes, reg_val, ier_val, water_val; 155 u32 buf_size, buf_reg; 156 157 prtd = substream->private_data; 158 rtd = substream->runtime->private_data; 159 card = prtd->card; 160 pinfo = snd_soc_card_get_drvdata(card); 161 if (pinfo) { 162 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 163 rtd->i2s_instance = pinfo->play_i2s_instance; 164 else 165 rtd->i2s_instance = pinfo->cap_i2s_instance; 166 } 167 period_bytes = frames_to_bytes(substream->runtime, 168 substream->runtime->period_size); 169 buf_size = frames_to_bytes(substream->runtime, 170 substream->runtime->buffer_size); 171 switch (cmd) { 172 case SNDRV_PCM_TRIGGER_START: 173 case SNDRV_PCM_TRIGGER_RESUME: 174 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 175 rtd->bytescount = acp_get_byte_count(rtd, 176 substream->stream); 177 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 178 switch (rtd->i2s_instance) { 179 case I2S_BT_INSTANCE: 180 water_val = 181 mmACP_BT_TX_INTR_WATERMARK_SIZE; 182 reg_val = mmACP_BTTDM_ITER; 183 ier_val = mmACP_BTTDM_IER; 184 buf_reg = mmACP_BT_TX_RINGBUFSIZE; 185 break; 186 case I2S_SP_INSTANCE: 187 default: 188 water_val = 189 mmACP_I2S_TX_INTR_WATERMARK_SIZE; 190 reg_val = mmACP_I2STDM_ITER; 191 ier_val = mmACP_I2STDM_IER; 192 buf_reg = mmACP_I2S_TX_RINGBUFSIZE; 193 } 194 } else { 195 switch (rtd->i2s_instance) { 196 case I2S_BT_INSTANCE: 197 water_val = 198 mmACP_BT_RX_INTR_WATERMARK_SIZE; 199 reg_val = mmACP_BTTDM_IRER; 200 ier_val = mmACP_BTTDM_IER; 201 buf_reg = mmACP_BT_RX_RINGBUFSIZE; 202 break; 203 case I2S_SP_INSTANCE: 204 default: 205 water_val = 206 mmACP_I2S_RX_INTR_WATERMARK_SIZE; 207 reg_val = mmACP_I2STDM_IRER; 208 ier_val = mmACP_I2STDM_IER; 209 buf_reg = mmACP_I2S_RX_RINGBUFSIZE; 210 } 211 } 212 rv_writel(period_bytes, rtd->acp3x_base + water_val); 213 rv_writel(buf_size, rtd->acp3x_base + buf_reg); 214 val = rv_readl(rtd->acp3x_base + reg_val); 215 val = val | BIT(0); 216 rv_writel(val, rtd->acp3x_base + reg_val); 217 rv_writel(1, rtd->acp3x_base + ier_val); 218 ret = 0; 219 break; 220 case SNDRV_PCM_TRIGGER_STOP: 221 case SNDRV_PCM_TRIGGER_SUSPEND: 222 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 223 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 224 switch (rtd->i2s_instance) { 225 case I2S_BT_INSTANCE: 226 reg_val = mmACP_BTTDM_ITER; 227 break; 228 case I2S_SP_INSTANCE: 229 default: 230 reg_val = mmACP_I2STDM_ITER; 231 } 232 233 } else { 234 switch (rtd->i2s_instance) { 235 case I2S_BT_INSTANCE: 236 reg_val = mmACP_BTTDM_IRER; 237 break; 238 case I2S_SP_INSTANCE: 239 default: 240 reg_val = mmACP_I2STDM_IRER; 241 } 242 } 243 val = rv_readl(rtd->acp3x_base + reg_val); 244 val = val & ~BIT(0); 245 rv_writel(val, rtd->acp3x_base + reg_val); 246 247 if (!(rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER) & BIT(0)) && 248 !(rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER) & BIT(0))) 249 rv_writel(0, rtd->acp3x_base + mmACP_BTTDM_IER); 250 if (!(rv_readl(rtd->acp3x_base + mmACP_I2STDM_ITER) & BIT(0)) && 251 !(rv_readl(rtd->acp3x_base + mmACP_I2STDM_IRER) & BIT(0))) 252 rv_writel(0, rtd->acp3x_base + mmACP_I2STDM_IER); 253 ret = 0; 254 break; 255 default: 256 ret = -EINVAL; 257 break; 258 } 259 260 return ret; 261 } 262 263 static struct snd_soc_dai_ops acp3x_i2s_dai_ops = { 264 .hw_params = acp3x_i2s_hwparams, 265 .trigger = acp3x_i2s_trigger, 266 .set_fmt = acp3x_i2s_set_fmt, 267 .set_tdm_slot = acp3x_i2s_set_tdm_slot, 268 }; 269 270 static const struct snd_soc_component_driver acp3x_dai_component = { 271 .name = "acp3x-i2s", 272 }; 273 274 static struct snd_soc_dai_driver acp3x_i2s_dai = { 275 .playback = { 276 .rates = SNDRV_PCM_RATE_8000_96000, 277 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | 278 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE | 279 SNDRV_PCM_FMTBIT_S32_LE, 280 .channels_min = 2, 281 .channels_max = 8, 282 .rate_min = 8000, 283 .rate_max = 96000, 284 }, 285 .capture = { 286 .rates = SNDRV_PCM_RATE_8000_48000, 287 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | 288 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE | 289 SNDRV_PCM_FMTBIT_S32_LE, 290 .channels_min = 2, 291 .channels_max = 2, 292 .rate_min = 8000, 293 .rate_max = 48000, 294 }, 295 .ops = &acp3x_i2s_dai_ops, 296 }; 297 298 static int acp3x_dai_probe(struct platform_device *pdev) 299 { 300 struct resource *res; 301 struct i2s_dev_data *adata; 302 int ret; 303 304 adata = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dev_data), 305 GFP_KERNEL); 306 if (!adata) 307 return -ENOMEM; 308 309 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 310 if (!res) { 311 dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n"); 312 return -ENOMEM; 313 } 314 adata->acp3x_base = devm_ioremap(&pdev->dev, res->start, 315 resource_size(res)); 316 if (!adata->acp3x_base) 317 return -ENOMEM; 318 319 adata->i2s_irq = res->start; 320 dev_set_drvdata(&pdev->dev, adata); 321 ret = devm_snd_soc_register_component(&pdev->dev, 322 &acp3x_dai_component, &acp3x_i2s_dai, 1); 323 if (ret) { 324 dev_err(&pdev->dev, "Fail to register acp i2s dai\n"); 325 return -ENODEV; 326 } 327 return 0; 328 } 329 330 static int acp3x_dai_remove(struct platform_device *pdev) 331 { 332 /* As we use devm_ memory alloc there is nothing TBD here */ 333 334 return 0; 335 } 336 337 static struct platform_driver acp3x_dai_driver = { 338 .probe = acp3x_dai_probe, 339 .remove = acp3x_dai_remove, 340 .driver = { 341 .name = "acp3x_i2s_playcap", 342 }, 343 }; 344 345 module_platform_driver(acp3x_dai_driver); 346 347 MODULE_AUTHOR("Vishnuvardhanrao.Ravulapati@amd.com"); 348 MODULE_DESCRIPTION("AMD ACP 3.x PCM Driver"); 349 MODULE_LICENSE("GPL v2"); 350 MODULE_ALIAS("platform:" DRV_NAME); 351