1 /* -*- linux-c -*- 2 * 3 * ALSA driver for RME Hammerfall DSP MADI audio interface(s) 4 * 5 * Copyright (c) 2003 Winfried Ritsch (IEM) 6 * code based on hdsp.c Paul Davis 7 * Marcus Andersson 8 * Thomas Charbonnel 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 #include <sound/driver.h> 26 #include <linux/init.h> 27 #include <linux/delay.h> 28 #include <linux/interrupt.h> 29 #include <linux/moduleparam.h> 30 #include <linux/slab.h> 31 #include <linux/pci.h> 32 #include <asm/io.h> 33 34 #include <sound/core.h> 35 #include <sound/control.h> 36 #include <sound/pcm.h> 37 #include <sound/info.h> 38 #include <sound/asoundef.h> 39 #include <sound/rawmidi.h> 40 #include <sound/hwdep.h> 41 #include <sound/initval.h> 42 43 #include <sound/hdspm.h> 44 45 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 46 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 47 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 48 49 /* Disable precise pointer at start */ 50 static int precise_ptr[SNDRV_CARDS]; 51 52 /* Send all playback to line outs */ 53 static int line_outs_monitor[SNDRV_CARDS]; 54 55 /* Enable Analog Outs on Channel 63/64 by default */ 56 static int enable_monitor[SNDRV_CARDS]; 57 58 module_param_array(index, int, NULL, 0444); 59 MODULE_PARM_DESC(index, "Index value for RME HDSPM interface."); 60 61 module_param_array(id, charp, NULL, 0444); 62 MODULE_PARM_DESC(id, "ID string for RME HDSPM interface."); 63 64 module_param_array(enable, bool, NULL, 0444); 65 MODULE_PARM_DESC(enable, "Enable/disable specific HDSPM soundcards."); 66 67 module_param_array(precise_ptr, bool, NULL, 0444); 68 MODULE_PARM_DESC(precise_ptr, "Enable or disable precise pointer."); 69 70 module_param_array(line_outs_monitor, bool, NULL, 0444); 71 MODULE_PARM_DESC(line_outs_monitor, 72 "Send playback streams to analog outs by default."); 73 74 module_param_array(enable_monitor, bool, NULL, 0444); 75 MODULE_PARM_DESC(enable_monitor, 76 "Enable Analog Out on Channel 63/64 by default."); 77 78 MODULE_AUTHOR 79 ("Winfried Ritsch <ritsch_AT_iem.at>, Paul Davis <paul@linuxaudiosystems.com>, " 80 "Marcus Andersson, Thomas Charbonnel <thomas@undata.org>"); 81 MODULE_DESCRIPTION("RME HDSPM"); 82 MODULE_LICENSE("GPL"); 83 MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}"); 84 85 /* --- Write registers. --- 86 These are defined as byte-offsets from the iobase value. */ 87 88 #define HDSPM_controlRegister 64 89 #define HDSPM_interruptConfirmation 96 90 #define HDSPM_control2Reg 256 /* not in specs ???????? */ 91 #define HDSPM_midiDataOut0 352 /* just believe in old code */ 92 #define HDSPM_midiDataOut1 356 93 94 /* DMA enable for 64 channels, only Bit 0 is relevant */ 95 #define HDSPM_outputEnableBase 512 /* 512-767 input DMA */ 96 #define HDSPM_inputEnableBase 768 /* 768-1023 output DMA */ 97 98 /* 16 page addresses for each of the 64 channels DMA buffer in and out 99 (each 64k=16*4k) Buffer must be 4k aligned (which is default i386 ????) */ 100 #define HDSPM_pageAddressBufferOut 8192 101 #define HDSPM_pageAddressBufferIn (HDSPM_pageAddressBufferOut+64*16*4) 102 103 #define HDSPM_MADI_mixerBase 32768 /* 32768-65535 for 2x64x64 Fader */ 104 105 #define HDSPM_MATRIX_MIXER_SIZE 8192 /* = 2*64*64 * 4 Byte => 32kB */ 106 107 /* --- Read registers. --- 108 These are defined as byte-offsets from the iobase value */ 109 #define HDSPM_statusRegister 0 110 #define HDSPM_statusRegister2 96 111 112 #define HDSPM_midiDataIn0 360 113 #define HDSPM_midiDataIn1 364 114 115 /* status is data bytes in MIDI-FIFO (0-128) */ 116 #define HDSPM_midiStatusOut0 384 117 #define HDSPM_midiStatusOut1 388 118 #define HDSPM_midiStatusIn0 392 119 #define HDSPM_midiStatusIn1 396 120 121 122 /* the meters are regular i/o-mapped registers, but offset 123 considerably from the rest. the peak registers are reset 124 when read; the least-significant 4 bits are full-scale counters; 125 the actual peak value is in the most-significant 24 bits. 126 */ 127 #define HDSPM_MADI_peakrmsbase 4096 /* 4096-8191 2x64x32Bit Meters */ 128 129 /* --- Control Register bits --------- */ 130 #define HDSPM_Start (1<<0) /* start engine */ 131 132 #define HDSPM_Latency0 (1<<1) /* buffer size = 2^n */ 133 #define HDSPM_Latency1 (1<<2) /* where n is defined */ 134 #define HDSPM_Latency2 (1<<3) /* by Latency{2,1,0} */ 135 136 #define HDSPM_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */ 137 138 #define HDSPM_AudioInterruptEnable (1<<5) /* what do you think ? */ 139 140 #define HDSPM_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz 1=48kHz/96kHz */ 141 #define HDSPM_Frequency1 (1<<7) /* 0=32kHz/64kHz */ 142 #define HDSPM_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */ 143 #define HDSPM_QuadSpeed (1<<31) /* quad speed bit, not implemented now */ 144 145 #define HDSPM_TX_64ch (1<<10) /* Output 64channel MODE=1, 146 56channelMODE=0 */ 147 148 #define HDSPM_AutoInp (1<<11) /* Auto Input (takeover) == Safe Mode, 149 0=off, 1=on */ 150 151 #define HDSPM_InputSelect0 (1<<14) /* Input select 0= optical, 1=coax */ 152 #define HDSPM_InputSelect1 (1<<15) /* should be 0 */ 153 154 #define HDSPM_SyncRef0 (1<<16) /* 0=WOrd, 1=MADI */ 155 #define HDSPM_SyncRef1 (1<<17) /* should be 0 */ 156 157 #define HDSPM_clr_tms (1<<19) /* clear track marker, do not use 158 AES additional bits in 159 lower 5 Audiodatabits ??? */ 160 161 #define HDSPM_Midi0InterruptEnable (1<<22) 162 #define HDSPM_Midi1InterruptEnable (1<<23) 163 164 #define HDSPM_LineOut (1<<24) /* Analog Out on channel 63/64 on=1, mute=0 */ 165 166 167 /* --- bit helper defines */ 168 #define HDSPM_LatencyMask (HDSPM_Latency0|HDSPM_Latency1|HDSPM_Latency2) 169 #define HDSPM_FrequencyMask (HDSPM_Frequency0|HDSPM_Frequency1) 170 #define HDSPM_InputMask (HDSPM_InputSelect0|HDSPM_InputSelect1) 171 #define HDSPM_InputOptical 0 172 #define HDSPM_InputCoaxial (HDSPM_InputSelect0) 173 #define HDSPM_SyncRefMask (HDSPM_SyncRef0|HDSPM_SyncRef1) 174 #define HDSPM_SyncRef_Word 0 175 #define HDSPM_SyncRef_MADI (HDSPM_SyncRef0) 176 177 #define HDSPM_SYNC_FROM_WORD 0 /* Preferred sync reference */ 178 #define HDSPM_SYNC_FROM_MADI 1 /* choices - used by "pref_sync_ref" */ 179 180 #define HDSPM_Frequency32KHz HDSPM_Frequency0 181 #define HDSPM_Frequency44_1KHz HDSPM_Frequency1 182 #define HDSPM_Frequency48KHz (HDSPM_Frequency1|HDSPM_Frequency0) 183 #define HDSPM_Frequency64KHz (HDSPM_DoubleSpeed|HDSPM_Frequency0) 184 #define HDSPM_Frequency88_2KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1) 185 #define HDSPM_Frequency96KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1|HDSPM_Frequency0) 186 187 /* --- for internal discrimination */ 188 #define HDSPM_CLOCK_SOURCE_AUTOSYNC 0 /* Sample Clock Sources */ 189 #define HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ 1 190 #define HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ 2 191 #define HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ 3 192 #define HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ 4 193 #define HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ 5 194 #define HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ 6 195 #define HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ 7 196 #define HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ 8 197 #define HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ 9 198 199 /* Synccheck Status */ 200 #define HDSPM_SYNC_CHECK_NO_LOCK 0 201 #define HDSPM_SYNC_CHECK_LOCK 1 202 #define HDSPM_SYNC_CHECK_SYNC 2 203 204 /* AutoSync References - used by "autosync_ref" control switch */ 205 #define HDSPM_AUTOSYNC_FROM_WORD 0 206 #define HDSPM_AUTOSYNC_FROM_MADI 1 207 #define HDSPM_AUTOSYNC_FROM_NONE 2 208 209 /* Possible sources of MADI input */ 210 #define HDSPM_OPTICAL 0 /* optical */ 211 #define HDSPM_COAXIAL 1 /* BNC */ 212 213 #define hdspm_encode_latency(x) (((x)<<1) & HDSPM_LatencyMask) 214 #define hdspm_decode_latency(x) (((x) & HDSPM_LatencyMask)>>1) 215 216 #define hdspm_encode_in(x) (((x)&0x3)<<14) 217 #define hdspm_decode_in(x) (((x)>>14)&0x3) 218 219 /* --- control2 register bits --- */ 220 #define HDSPM_TMS (1<<0) 221 #define HDSPM_TCK (1<<1) 222 #define HDSPM_TDI (1<<2) 223 #define HDSPM_JTAG (1<<3) 224 #define HDSPM_PWDN (1<<4) 225 #define HDSPM_PROGRAM (1<<5) 226 #define HDSPM_CONFIG_MODE_0 (1<<6) 227 #define HDSPM_CONFIG_MODE_1 (1<<7) 228 /*#define HDSPM_VERSION_BIT (1<<8) not defined any more*/ 229 #define HDSPM_BIGENDIAN_MODE (1<<9) 230 #define HDSPM_RD_MULTIPLE (1<<10) 231 232 /* --- Status Register bits --- */ 233 #define HDSPM_audioIRQPending (1<<0) /* IRQ is high and pending */ 234 #define HDSPM_RX_64ch (1<<1) /* Input 64chan. MODE=1, 56chn. MODE=0 */ 235 #define HDSPM_AB_int (1<<2) /* InputChannel Opt=0, Coax=1 (like inp0) */ 236 #define HDSPM_madiLock (1<<3) /* MADI Locked =1, no=0 */ 237 238 #define HDSPM_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */ 239 /* since 64byte accurate last 6 bits 240 are not used */ 241 242 #define HDSPM_madiSync (1<<18) /* MADI is in sync */ 243 #define HDSPM_DoubleSpeedStatus (1<<19) /* (input) card in double speed */ 244 245 #define HDSPM_madiFreq0 (1<<22) /* system freq 0=error */ 246 #define HDSPM_madiFreq1 (1<<23) /* 1=32, 2=44.1 3=48 */ 247 #define HDSPM_madiFreq2 (1<<24) /* 4=64, 5=88.2 6=96 */ 248 #define HDSPM_madiFreq3 (1<<25) /* 7=128, 8=176.4 9=192 */ 249 250 #define HDSPM_BufferID (1<<26) /* (Double)Buffer ID toggles with Interrupt */ 251 #define HDSPM_midi0IRQPending (1<<30) /* MIDI IRQ is pending */ 252 #define HDSPM_midi1IRQPending (1<<31) /* and aktiv */ 253 254 /* --- status bit helpers */ 255 #define HDSPM_madiFreqMask (HDSPM_madiFreq0|HDSPM_madiFreq1|HDSPM_madiFreq2|HDSPM_madiFreq3) 256 #define HDSPM_madiFreq32 (HDSPM_madiFreq0) 257 #define HDSPM_madiFreq44_1 (HDSPM_madiFreq1) 258 #define HDSPM_madiFreq48 (HDSPM_madiFreq0|HDSPM_madiFreq1) 259 #define HDSPM_madiFreq64 (HDSPM_madiFreq2) 260 #define HDSPM_madiFreq88_2 (HDSPM_madiFreq0|HDSPM_madiFreq2) 261 #define HDSPM_madiFreq96 (HDSPM_madiFreq1|HDSPM_madiFreq2) 262 #define HDSPM_madiFreq128 (HDSPM_madiFreq0|HDSPM_madiFreq1|HDSPM_madiFreq2) 263 #define HDSPM_madiFreq176_4 (HDSPM_madiFreq3) 264 #define HDSPM_madiFreq192 (HDSPM_madiFreq3|HDSPM_madiFreq0) 265 266 /* Status2 Register bits */ 267 268 #define HDSPM_version0 (1<<0) /* not realy defined but I guess */ 269 #define HDSPM_version1 (1<<1) /* in former cards it was ??? */ 270 #define HDSPM_version2 (1<<2) 271 272 #define HDSPM_wcLock (1<<3) /* Wordclock is detected and locked */ 273 #define HDSPM_wcSync (1<<4) /* Wordclock is in sync with systemclock */ 274 275 #define HDSPM_wc_freq0 (1<<5) /* input freq detected via autosync */ 276 #define HDSPM_wc_freq1 (1<<6) /* 001=32, 010==44.1, 011=48, */ 277 #define HDSPM_wc_freq2 (1<<7) /* 100=64, 101=88.2, 110=96, */ 278 /* missing Bit for 111=128, 1000=176.4, 1001=192 */ 279 280 #define HDSPM_SelSyncRef0 (1<<8) /* Sync Source in slave mode */ 281 #define HDSPM_SelSyncRef1 (1<<9) /* 000=word, 001=MADI, */ 282 #define HDSPM_SelSyncRef2 (1<<10) /* 111=no valid signal */ 283 284 #define HDSPM_wc_valid (HDSPM_wcLock|HDSPM_wcSync) 285 286 #define HDSPM_wcFreqMask (HDSPM_wc_freq0|HDSPM_wc_freq1|HDSPM_wc_freq2) 287 #define HDSPM_wcFreq32 (HDSPM_wc_freq0) 288 #define HDSPM_wcFreq44_1 (HDSPM_wc_freq1) 289 #define HDSPM_wcFreq48 (HDSPM_wc_freq0|HDSPM_wc_freq1) 290 #define HDSPM_wcFreq64 (HDSPM_wc_freq2) 291 #define HDSPM_wcFreq88_2 (HDSPM_wc_freq0|HDSPM_wc_freq2) 292 #define HDSPM_wcFreq96 (HDSPM_wc_freq1|HDSPM_wc_freq2) 293 294 295 #define HDSPM_SelSyncRefMask (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|HDSPM_SelSyncRef2) 296 #define HDSPM_SelSyncRef_WORD 0 297 #define HDSPM_SelSyncRef_MADI (HDSPM_SelSyncRef0) 298 #define HDSPM_SelSyncRef_NVALID (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|HDSPM_SelSyncRef2) 299 300 /* Mixer Values */ 301 #define UNITY_GAIN 32768 /* = 65536/2 */ 302 #define MINUS_INFINITY_GAIN 0 303 304 /* Number of channels for different Speed Modes */ 305 #define MADI_SS_CHANNELS 64 306 #define MADI_DS_CHANNELS 32 307 #define MADI_QS_CHANNELS 16 308 309 /* the size of a substream (1 mono data stream) */ 310 #define HDSPM_CHANNEL_BUFFER_SAMPLES (16*1024) 311 #define HDSPM_CHANNEL_BUFFER_BYTES (4*HDSPM_CHANNEL_BUFFER_SAMPLES) 312 313 /* the size of the area we need to allocate for DMA transfers. the 314 size is the same regardless of the number of channels, and 315 also the latency to use. 316 for one direction !!! 317 */ 318 #define HDSPM_DMA_AREA_BYTES (HDSPM_MAX_CHANNELS * HDSPM_CHANNEL_BUFFER_BYTES) 319 #define HDSPM_DMA_AREA_KILOBYTES (HDSPM_DMA_AREA_BYTES/1024) 320 321 typedef struct _hdspm hdspm_t; 322 typedef struct _hdspm_midi hdspm_midi_t; 323 324 struct _hdspm_midi { 325 hdspm_t *hdspm; 326 int id; 327 snd_rawmidi_t *rmidi; 328 snd_rawmidi_substream_t *input; 329 snd_rawmidi_substream_t *output; 330 char istimer; /* timer in use */ 331 struct timer_list timer; 332 spinlock_t lock; 333 int pending; 334 }; 335 336 struct _hdspm { 337 spinlock_t lock; 338 snd_pcm_substream_t *capture_substream; /* only one playback */ 339 snd_pcm_substream_t *playback_substream; /* and/or capture stream */ 340 341 char *card_name; /* for procinfo */ 342 unsigned short firmware_rev; /* dont know if relevant */ 343 344 int precise_ptr; /* use precise pointers, to be tested */ 345 int monitor_outs; /* set up monitoring outs init flag */ 346 347 u32 control_register; /* cached value */ 348 u32 control2_register; /* cached value */ 349 350 hdspm_midi_t midi[2]; 351 struct tasklet_struct midi_tasklet; 352 353 size_t period_bytes; 354 unsigned char ss_channels; /* channels of card in single speed */ 355 unsigned char ds_channels; /* Double Speed */ 356 unsigned char qs_channels; /* Quad Speed */ 357 358 unsigned char *playback_buffer; /* suitably aligned address */ 359 unsigned char *capture_buffer; /* suitably aligned address */ 360 361 pid_t capture_pid; /* process id which uses capture */ 362 pid_t playback_pid; /* process id which uses capture */ 363 int running; /* running status */ 364 365 int last_external_sample_rate; /* samplerate mystic ... */ 366 int last_internal_sample_rate; 367 int system_sample_rate; 368 369 char *channel_map; /* channel map for DS and Quadspeed */ 370 371 int dev; /* Hardware vars... */ 372 int irq; 373 unsigned long port; 374 void __iomem *iobase; 375 376 int irq_count; /* for debug */ 377 378 snd_card_t *card; /* one card */ 379 snd_pcm_t *pcm; /* has one pcm */ 380 snd_hwdep_t *hwdep; /* and a hwdep for additional ioctl */ 381 struct pci_dev *pci; /* and an pci info */ 382 383 /* Mixer vars */ 384 snd_kcontrol_t *playback_mixer_ctls[HDSPM_MAX_CHANNELS]; /* fast alsa mixer */ 385 snd_kcontrol_t *input_mixer_ctls[HDSPM_MAX_CHANNELS]; /* but input to much, so not used */ 386 hdspm_mixer_t *mixer; /* full mixer accessable over mixer ioctl or hwdep-device */ 387 388 }; 389 390 /* These tables map the ALSA channels 1..N to the channels that we 391 need to use in order to find the relevant channel buffer. RME 392 refer to this kind of mapping as between "the ADAT channel and 393 the DMA channel." We index it using the logical audio channel, 394 and the value is the DMA channel (i.e. channel buffer number) 395 where the data for that channel can be read/written from/to. 396 */ 397 398 static char channel_map_madi_ss[HDSPM_MAX_CHANNELS] = { 399 0, 1, 2, 3, 4, 5, 6, 7, 400 8, 9, 10, 11, 12, 13, 14, 15, 401 16, 17, 18, 19, 20, 21, 22, 23, 402 24, 25, 26, 27, 28, 29, 30, 31, 403 32, 33, 34, 35, 36, 37, 38, 39, 404 40, 41, 42, 43, 44, 45, 46, 47, 405 48, 49, 50, 51, 52, 53, 54, 55, 406 56, 57, 58, 59, 60, 61, 62, 63 407 }; 408 409 static char channel_map_madi_ds[HDSPM_MAX_CHANNELS] = { 410 0, 2, 4, 6, 8, 10, 12, 14, 411 16, 18, 20, 22, 24, 26, 28, 30, 412 32, 34, 36, 38, 40, 42, 44, 46, 413 48, 50, 52, 54, 56, 58, 60, 62, 414 -1, -1, -1, -1, -1, -1, -1, -1, 415 -1, -1, -1, -1, -1, -1, -1, -1, 416 -1, -1, -1, -1, -1, -1, -1, -1, 417 -1, -1, -1, -1, -1, -1, -1, -1 418 }; 419 420 static char channel_map_madi_qs[HDSPM_MAX_CHANNELS] = { 421 0, 4, 8, 12, 16, 20, 24, 28, 422 32, 36, 40, 44, 48, 52, 56, 60 423 -1, -1, -1, -1, -1, -1, -1, -1, 424 -1, -1, -1, -1, -1, -1, -1, -1, 425 -1, -1, -1, -1, -1, -1, -1, -1, 426 -1, -1, -1, -1, -1, -1, -1, -1, 427 -1, -1, -1, -1, -1, -1, -1, -1, 428 -1, -1, -1, -1, -1, -1, -1, -1 429 }; 430 431 432 static struct pci_device_id snd_hdspm_ids[] = { 433 { 434 .vendor = PCI_VENDOR_ID_XILINX, 435 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI, 436 .subvendor = PCI_ANY_ID, 437 .subdevice = PCI_ANY_ID, 438 .class = 0, 439 .class_mask = 0, 440 .driver_data = 0}, 441 {0,} 442 }; 443 444 MODULE_DEVICE_TABLE(pci, snd_hdspm_ids); 445 446 /* prototypes */ 447 static int __devinit snd_hdspm_create_alsa_devices(snd_card_t * card, 448 hdspm_t * hdspm); 449 static int __devinit snd_hdspm_create_pcm(snd_card_t * card, 450 hdspm_t * hdspm); 451 452 static inline void snd_hdspm_initialize_midi_flush(hdspm_t * hdspm); 453 static int hdspm_update_simple_mixer_controls(hdspm_t * hdspm); 454 static int hdspm_autosync_ref(hdspm_t * hdspm); 455 static int snd_hdspm_set_defaults(hdspm_t * hdspm); 456 static void hdspm_set_sgbuf(hdspm_t * hdspm, struct snd_sg_buf *sgbuf, 457 unsigned int reg, int channels); 458 459 /* Write/read to/from HDSPM with Adresses in Bytes 460 not words but only 32Bit writes are allowed */ 461 462 static inline void hdspm_write(hdspm_t * hdspm, unsigned int reg, 463 unsigned int val) 464 { 465 writel(val, hdspm->iobase + reg); 466 } 467 468 static inline unsigned int hdspm_read(hdspm_t * hdspm, unsigned int reg) 469 { 470 return readl(hdspm->iobase + reg); 471 } 472 473 /* for each output channel (chan) I have an Input (in) and Playback (pb) Fader 474 mixer is write only on hardware so we have to cache him for read 475 each fader is a u32, but uses only the first 16 bit */ 476 477 static inline int hdspm_read_in_gain(hdspm_t * hdspm, unsigned int chan, 478 unsigned int in) 479 { 480 if (chan > HDSPM_MIXER_CHANNELS || in > HDSPM_MIXER_CHANNELS) 481 return 0; 482 483 return hdspm->mixer->ch[chan].in[in]; 484 } 485 486 static inline int hdspm_read_pb_gain(hdspm_t * hdspm, unsigned int chan, 487 unsigned int pb) 488 { 489 if (chan > HDSPM_MIXER_CHANNELS || pb > HDSPM_MIXER_CHANNELS) 490 return 0; 491 return hdspm->mixer->ch[chan].pb[pb]; 492 } 493 494 static inline int hdspm_write_in_gain(hdspm_t * hdspm, unsigned int chan, 495 unsigned int in, unsigned short data) 496 { 497 if (chan >= HDSPM_MIXER_CHANNELS || in >= HDSPM_MIXER_CHANNELS) 498 return -1; 499 500 hdspm_write(hdspm, 501 HDSPM_MADI_mixerBase + 502 ((in + 128 * chan) * sizeof(u32)), 503 (hdspm->mixer->ch[chan].in[in] = data & 0xFFFF)); 504 return 0; 505 } 506 507 static inline int hdspm_write_pb_gain(hdspm_t * hdspm, unsigned int chan, 508 unsigned int pb, unsigned short data) 509 { 510 if (chan >= HDSPM_MIXER_CHANNELS || pb >= HDSPM_MIXER_CHANNELS) 511 return -1; 512 513 hdspm_write(hdspm, 514 HDSPM_MADI_mixerBase + 515 ((64 + pb + 128 * chan) * sizeof(u32)), 516 (hdspm->mixer->ch[chan].pb[pb] = data & 0xFFFF)); 517 return 0; 518 } 519 520 521 /* enable DMA for specific channels, now available for DSP-MADI */ 522 static inline void snd_hdspm_enable_in(hdspm_t * hdspm, int i, int v) 523 { 524 hdspm_write(hdspm, HDSPM_inputEnableBase + (4 * i), v); 525 } 526 527 static inline void snd_hdspm_enable_out(hdspm_t * hdspm, int i, int v) 528 { 529 hdspm_write(hdspm, HDSPM_outputEnableBase + (4 * i), v); 530 } 531 532 /* check if same process is writing and reading */ 533 static inline int snd_hdspm_use_is_exclusive(hdspm_t * hdspm) 534 { 535 unsigned long flags; 536 int ret = 1; 537 538 spin_lock_irqsave(&hdspm->lock, flags); 539 if ((hdspm->playback_pid != hdspm->capture_pid) && 540 (hdspm->playback_pid >= 0) && (hdspm->capture_pid >= 0)) { 541 ret = 0; 542 } 543 spin_unlock_irqrestore(&hdspm->lock, flags); 544 return ret; 545 } 546 547 /* check for external sample rate */ 548 static inline int hdspm_external_sample_rate(hdspm_t * hdspm) 549 { 550 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 551 unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister); 552 unsigned int rate_bits; 553 int rate = 0; 554 555 /* if wordclock has synced freq and wordclock is valid */ 556 if ((status2 & HDSPM_wcLock) != 0 && 557 (status & HDSPM_SelSyncRef0) == 0) { 558 559 rate_bits = status2 & HDSPM_wcFreqMask; 560 561 switch (rate_bits) { 562 case HDSPM_wcFreq32: 563 rate = 32000; 564 break; 565 case HDSPM_wcFreq44_1: 566 rate = 44100; 567 break; 568 case HDSPM_wcFreq48: 569 rate = 48000; 570 break; 571 case HDSPM_wcFreq64: 572 rate = 64000; 573 break; 574 case HDSPM_wcFreq88_2: 575 rate = 88200; 576 break; 577 case HDSPM_wcFreq96: 578 rate = 96000; 579 break; 580 /* Quadspeed Bit missing ???? */ 581 default: 582 rate = 0; 583 break; 584 } 585 } 586 587 /* if rate detected and Syncref is Word than have it, word has priority to MADI */ 588 if (rate != 0 589 && (status2 & HDSPM_SelSyncRefMask) == HDSPM_SelSyncRef_WORD) 590 return rate; 591 592 /* maby a madi input (which is taken if sel sync is madi) */ 593 if (status & HDSPM_madiLock) { 594 rate_bits = status & HDSPM_madiFreqMask; 595 596 switch (rate_bits) { 597 case HDSPM_madiFreq32: 598 rate = 32000; 599 break; 600 case HDSPM_madiFreq44_1: 601 rate = 44100; 602 break; 603 case HDSPM_madiFreq48: 604 rate = 48000; 605 break; 606 case HDSPM_madiFreq64: 607 rate = 64000; 608 break; 609 case HDSPM_madiFreq88_2: 610 rate = 88200; 611 break; 612 case HDSPM_madiFreq96: 613 rate = 96000; 614 break; 615 case HDSPM_madiFreq128: 616 rate = 128000; 617 break; 618 case HDSPM_madiFreq176_4: 619 rate = 176400; 620 break; 621 case HDSPM_madiFreq192: 622 rate = 192000; 623 break; 624 default: 625 rate = 0; 626 break; 627 } 628 } 629 return rate; 630 } 631 632 /* Latency function */ 633 static inline void hdspm_compute_period_size(hdspm_t * hdspm) 634 { 635 hdspm->period_bytes = 636 1 << ((hdspm_decode_latency(hdspm->control_register) + 8)); 637 } 638 639 static snd_pcm_uframes_t hdspm_hw_pointer(hdspm_t * hdspm) 640 { 641 int position; 642 643 position = hdspm_read(hdspm, HDSPM_statusRegister); 644 645 if (!hdspm->precise_ptr) { 646 return (position & HDSPM_BufferID) ? (hdspm->period_bytes / 647 4) : 0; 648 } 649 650 /* hwpointer comes in bytes and is 64Bytes accurate (by docu since PCI Burst) 651 i have experimented that it is at most 64 Byte to much for playing 652 so substraction of 64 byte should be ok for ALSA, but use it only 653 for application where you know what you do since if you come to 654 near with record pointer it can be a disaster */ 655 656 position &= HDSPM_BufferPositionMask; 657 position = ((position - 64) % (2 * hdspm->period_bytes)) / 4; 658 659 return position; 660 } 661 662 663 static inline void hdspm_start_audio(hdspm_t * s) 664 { 665 s->control_register |= (HDSPM_AudioInterruptEnable | HDSPM_Start); 666 hdspm_write(s, HDSPM_controlRegister, s->control_register); 667 } 668 669 static inline void hdspm_stop_audio(hdspm_t * s) 670 { 671 s->control_register &= ~(HDSPM_Start | HDSPM_AudioInterruptEnable); 672 hdspm_write(s, HDSPM_controlRegister, s->control_register); 673 } 674 675 /* should I silence all or only opened ones ? doit all for first even is 4MB*/ 676 static inline void hdspm_silence_playback(hdspm_t * hdspm) 677 { 678 int i; 679 int n = hdspm->period_bytes; 680 void *buf = hdspm->playback_buffer; 681 682 snd_assert(buf != NULL, return); 683 684 for (i = 0; i < HDSPM_MAX_CHANNELS; i++) { 685 memset(buf, 0, n); 686 buf += HDSPM_CHANNEL_BUFFER_BYTES; 687 } 688 } 689 690 static int hdspm_set_interrupt_interval(hdspm_t * s, unsigned int frames) 691 { 692 int n; 693 694 spin_lock_irq(&s->lock); 695 696 frames >>= 7; 697 n = 0; 698 while (frames) { 699 n++; 700 frames >>= 1; 701 } 702 s->control_register &= ~HDSPM_LatencyMask; 703 s->control_register |= hdspm_encode_latency(n); 704 705 hdspm_write(s, HDSPM_controlRegister, s->control_register); 706 707 hdspm_compute_period_size(s); 708 709 spin_unlock_irq(&s->lock); 710 711 return 0; 712 } 713 714 715 /* dummy set rate lets see what happens */ 716 static int hdspm_set_rate(hdspm_t * hdspm, int rate, int called_internally) 717 { 718 int reject_if_open = 0; 719 int current_rate; 720 int rate_bits; 721 int not_set = 0; 722 723 /* ASSUMPTION: hdspm->lock is either set, or there is no need for 724 it (e.g. during module initialization). 725 */ 726 727 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) { 728 729 /* SLAVE --- */ 730 if (called_internally) { 731 732 /* request from ctl or card initialization 733 just make a warning an remember setting 734 for future master mode switching */ 735 736 snd_printk 737 (KERN_WARNING "HDSPM: Warning: device is not running as a clock master.\n"); 738 not_set = 1; 739 } else { 740 741 /* hw_param request while in AutoSync mode */ 742 int external_freq = 743 hdspm_external_sample_rate(hdspm); 744 745 if ((hdspm_autosync_ref(hdspm) == 746 HDSPM_AUTOSYNC_FROM_NONE)) { 747 748 snd_printk(KERN_WARNING "HDSPM: Detected no Externel Sync \n"); 749 not_set = 1; 750 751 } else if (rate != external_freq) { 752 753 snd_printk 754 (KERN_WARNING "HDSPM: Warning: No AutoSync source for requested rate\n"); 755 not_set = 1; 756 } 757 } 758 } 759 760 current_rate = hdspm->system_sample_rate; 761 762 /* Changing between Singe, Double and Quad speed is not 763 allowed if any substreams are open. This is because such a change 764 causes a shift in the location of the DMA buffers and a reduction 765 in the number of available buffers. 766 767 Note that a similar but essentially insoluble problem exists for 768 externally-driven rate changes. All we can do is to flag rate 769 changes in the read/write routines. 770 */ 771 772 switch (rate) { 773 case 32000: 774 if (current_rate > 48000) { 775 reject_if_open = 1; 776 } 777 rate_bits = HDSPM_Frequency32KHz; 778 break; 779 case 44100: 780 if (current_rate > 48000) { 781 reject_if_open = 1; 782 } 783 rate_bits = HDSPM_Frequency44_1KHz; 784 break; 785 case 48000: 786 if (current_rate > 48000) { 787 reject_if_open = 1; 788 } 789 rate_bits = HDSPM_Frequency48KHz; 790 break; 791 case 64000: 792 if (current_rate <= 48000) { 793 reject_if_open = 1; 794 } 795 rate_bits = HDSPM_Frequency64KHz; 796 break; 797 case 88200: 798 if (current_rate <= 48000) { 799 reject_if_open = 1; 800 } 801 rate_bits = HDSPM_Frequency88_2KHz; 802 break; 803 case 96000: 804 if (current_rate <= 48000) { 805 reject_if_open = 1; 806 } 807 rate_bits = HDSPM_Frequency96KHz; 808 break; 809 default: 810 return -EINVAL; 811 } 812 813 if (reject_if_open 814 && (hdspm->capture_pid >= 0 || hdspm->playback_pid >= 0)) { 815 snd_printk 816 (KERN_ERR "HDSPM: cannot change between single- and double-speed mode (capture PID = %d, playback PID = %d)\n", 817 hdspm->capture_pid, hdspm->playback_pid); 818 return -EBUSY; 819 } 820 821 hdspm->control_register &= ~HDSPM_FrequencyMask; 822 hdspm->control_register |= rate_bits; 823 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 824 825 if (rate > 64000) 826 hdspm->channel_map = channel_map_madi_qs; 827 else if (rate > 48000) 828 hdspm->channel_map = channel_map_madi_ds; 829 else 830 hdspm->channel_map = channel_map_madi_ss; 831 832 hdspm->system_sample_rate = rate; 833 834 if (not_set != 0) 835 return -1; 836 837 return 0; 838 } 839 840 /* mainly for init to 0 on load */ 841 static void all_in_all_mixer(hdspm_t * hdspm, int sgain) 842 { 843 int i, j; 844 unsigned int gain = 845 (sgain > UNITY_GAIN) ? UNITY_GAIN : (sgain < 0) ? 0 : sgain; 846 847 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++) 848 for (j = 0; j < HDSPM_MIXER_CHANNELS; j++) { 849 hdspm_write_in_gain(hdspm, i, j, gain); 850 hdspm_write_pb_gain(hdspm, i, j, gain); 851 } 852 } 853 854 /*---------------------------------------------------------------------------- 855 MIDI 856 ----------------------------------------------------------------------------*/ 857 858 static inline unsigned char snd_hdspm_midi_read_byte (hdspm_t *hdspm, int id) 859 { 860 /* the hardware already does the relevant bit-mask with 0xff */ 861 if (id) 862 return hdspm_read(hdspm, HDSPM_midiDataIn1); 863 else 864 return hdspm_read(hdspm, HDSPM_midiDataIn0); 865 } 866 867 static inline void snd_hdspm_midi_write_byte (hdspm_t *hdspm, int id, int val) 868 { 869 /* the hardware already does the relevant bit-mask with 0xff */ 870 if (id) 871 return hdspm_write(hdspm, HDSPM_midiDataOut1, val); 872 else 873 return hdspm_write(hdspm, HDSPM_midiDataOut0, val); 874 } 875 876 static inline int snd_hdspm_midi_input_available (hdspm_t *hdspm, int id) 877 { 878 if (id) 879 return (hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff); 880 else 881 return (hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff); 882 } 883 884 static inline int snd_hdspm_midi_output_possible (hdspm_t *hdspm, int id) 885 { 886 int fifo_bytes_used; 887 888 if (id) 889 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xff; 890 else 891 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xff; 892 893 if (fifo_bytes_used < 128) 894 return 128 - fifo_bytes_used; 895 else 896 return 0; 897 } 898 899 static inline void snd_hdspm_flush_midi_input (hdspm_t *hdspm, int id) 900 { 901 while (snd_hdspm_midi_input_available (hdspm, id)) 902 snd_hdspm_midi_read_byte (hdspm, id); 903 } 904 905 static int snd_hdspm_midi_output_write (hdspm_midi_t *hmidi) 906 { 907 unsigned long flags; 908 int n_pending; 909 int to_write; 910 int i; 911 unsigned char buf[128]; 912 913 /* Output is not interrupt driven */ 914 915 spin_lock_irqsave (&hmidi->lock, flags); 916 if (hmidi->output) { 917 if (!snd_rawmidi_transmit_empty (hmidi->output)) { 918 if ((n_pending = snd_hdspm_midi_output_possible (hmidi->hdspm, hmidi->id)) > 0) { 919 if (n_pending > (int)sizeof (buf)) 920 n_pending = sizeof (buf); 921 922 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) { 923 for (i = 0; i < to_write; ++i) 924 snd_hdspm_midi_write_byte (hmidi->hdspm, hmidi->id, buf[i]); 925 } 926 } 927 } 928 } 929 spin_unlock_irqrestore (&hmidi->lock, flags); 930 return 0; 931 } 932 933 static int snd_hdspm_midi_input_read (hdspm_midi_t *hmidi) 934 { 935 unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */ 936 unsigned long flags; 937 int n_pending; 938 int i; 939 940 spin_lock_irqsave (&hmidi->lock, flags); 941 if ((n_pending = snd_hdspm_midi_input_available (hmidi->hdspm, hmidi->id)) > 0) { 942 if (hmidi->input) { 943 if (n_pending > (int)sizeof (buf)) { 944 n_pending = sizeof (buf); 945 } 946 for (i = 0; i < n_pending; ++i) { 947 buf[i] = snd_hdspm_midi_read_byte (hmidi->hdspm, hmidi->id); 948 } 949 if (n_pending) { 950 snd_rawmidi_receive (hmidi->input, buf, n_pending); 951 } 952 } else { 953 /* flush the MIDI input FIFO */ 954 while (n_pending--) { 955 snd_hdspm_midi_read_byte (hmidi->hdspm, hmidi->id); 956 } 957 } 958 } 959 hmidi->pending = 0; 960 if (hmidi->id) { 961 hmidi->hdspm->control_register |= HDSPM_Midi1InterruptEnable; 962 } else { 963 hmidi->hdspm->control_register |= HDSPM_Midi0InterruptEnable; 964 } 965 hdspm_write(hmidi->hdspm, HDSPM_controlRegister, hmidi->hdspm->control_register); 966 spin_unlock_irqrestore (&hmidi->lock, flags); 967 return snd_hdspm_midi_output_write (hmidi); 968 } 969 970 static void snd_hdspm_midi_input_trigger(snd_rawmidi_substream_t * substream, int up) 971 { 972 hdspm_t *hdspm; 973 hdspm_midi_t *hmidi; 974 unsigned long flags; 975 u32 ie; 976 977 hmidi = (hdspm_midi_t *) substream->rmidi->private_data; 978 hdspm = hmidi->hdspm; 979 ie = hmidi->id ? HDSPM_Midi1InterruptEnable : HDSPM_Midi0InterruptEnable; 980 spin_lock_irqsave (&hdspm->lock, flags); 981 if (up) { 982 if (!(hdspm->control_register & ie)) { 983 snd_hdspm_flush_midi_input (hdspm, hmidi->id); 984 hdspm->control_register |= ie; 985 } 986 } else { 987 hdspm->control_register &= ~ie; 988 } 989 990 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 991 spin_unlock_irqrestore (&hdspm->lock, flags); 992 } 993 994 static void snd_hdspm_midi_output_timer(unsigned long data) 995 { 996 hdspm_midi_t *hmidi = (hdspm_midi_t *) data; 997 unsigned long flags; 998 999 snd_hdspm_midi_output_write(hmidi); 1000 spin_lock_irqsave (&hmidi->lock, flags); 1001 1002 /* this does not bump hmidi->istimer, because the 1003 kernel automatically removed the timer when it 1004 expired, and we are now adding it back, thus 1005 leaving istimer wherever it was set before. 1006 */ 1007 1008 if (hmidi->istimer) { 1009 hmidi->timer.expires = 1 + jiffies; 1010 add_timer(&hmidi->timer); 1011 } 1012 1013 spin_unlock_irqrestore (&hmidi->lock, flags); 1014 } 1015 1016 static void snd_hdspm_midi_output_trigger(snd_rawmidi_substream_t * substream, int up) 1017 { 1018 hdspm_midi_t *hmidi; 1019 unsigned long flags; 1020 1021 hmidi = (hdspm_midi_t *) substream->rmidi->private_data; 1022 spin_lock_irqsave (&hmidi->lock, flags); 1023 if (up) { 1024 if (!hmidi->istimer) { 1025 init_timer(&hmidi->timer); 1026 hmidi->timer.function = snd_hdspm_midi_output_timer; 1027 hmidi->timer.data = (unsigned long) hmidi; 1028 hmidi->timer.expires = 1 + jiffies; 1029 add_timer(&hmidi->timer); 1030 hmidi->istimer++; 1031 } 1032 } else { 1033 if (hmidi->istimer && --hmidi->istimer <= 0) { 1034 del_timer (&hmidi->timer); 1035 } 1036 } 1037 spin_unlock_irqrestore (&hmidi->lock, flags); 1038 if (up) 1039 snd_hdspm_midi_output_write(hmidi); 1040 } 1041 1042 static int snd_hdspm_midi_input_open(snd_rawmidi_substream_t * substream) 1043 { 1044 hdspm_midi_t *hmidi; 1045 1046 hmidi = (hdspm_midi_t *) substream->rmidi->private_data; 1047 spin_lock_irq (&hmidi->lock); 1048 snd_hdspm_flush_midi_input (hmidi->hdspm, hmidi->id); 1049 hmidi->input = substream; 1050 spin_unlock_irq (&hmidi->lock); 1051 1052 return 0; 1053 } 1054 1055 static int snd_hdspm_midi_output_open(snd_rawmidi_substream_t * substream) 1056 { 1057 hdspm_midi_t *hmidi; 1058 1059 hmidi = (hdspm_midi_t *) substream->rmidi->private_data; 1060 spin_lock_irq (&hmidi->lock); 1061 hmidi->output = substream; 1062 spin_unlock_irq (&hmidi->lock); 1063 1064 return 0; 1065 } 1066 1067 static int snd_hdspm_midi_input_close(snd_rawmidi_substream_t * substream) 1068 { 1069 hdspm_midi_t *hmidi; 1070 1071 snd_hdspm_midi_input_trigger (substream, 0); 1072 1073 hmidi = (hdspm_midi_t *) substream->rmidi->private_data; 1074 spin_lock_irq (&hmidi->lock); 1075 hmidi->input = NULL; 1076 spin_unlock_irq (&hmidi->lock); 1077 1078 return 0; 1079 } 1080 1081 static int snd_hdspm_midi_output_close(snd_rawmidi_substream_t * substream) 1082 { 1083 hdspm_midi_t *hmidi; 1084 1085 snd_hdspm_midi_output_trigger (substream, 0); 1086 1087 hmidi = (hdspm_midi_t *) substream->rmidi->private_data; 1088 spin_lock_irq (&hmidi->lock); 1089 hmidi->output = NULL; 1090 spin_unlock_irq (&hmidi->lock); 1091 1092 return 0; 1093 } 1094 1095 static snd_rawmidi_ops_t snd_hdspm_midi_output = 1096 { 1097 .open = snd_hdspm_midi_output_open, 1098 .close = snd_hdspm_midi_output_close, 1099 .trigger = snd_hdspm_midi_output_trigger, 1100 }; 1101 1102 static snd_rawmidi_ops_t snd_hdspm_midi_input = 1103 { 1104 .open = snd_hdspm_midi_input_open, 1105 .close = snd_hdspm_midi_input_close, 1106 .trigger = snd_hdspm_midi_input_trigger, 1107 }; 1108 1109 static int __devinit snd_hdspm_create_midi (snd_card_t *card, hdspm_t *hdspm, int id) 1110 { 1111 int err; 1112 char buf[32]; 1113 1114 hdspm->midi[id].id = id; 1115 hdspm->midi[id].rmidi = NULL; 1116 hdspm->midi[id].input = NULL; 1117 hdspm->midi[id].output = NULL; 1118 hdspm->midi[id].hdspm = hdspm; 1119 hdspm->midi[id].istimer = 0; 1120 hdspm->midi[id].pending = 0; 1121 spin_lock_init (&hdspm->midi[id].lock); 1122 1123 sprintf (buf, "%s MIDI %d", card->shortname, id+1); 1124 if ((err = snd_rawmidi_new (card, buf, id, 1, 1, &hdspm->midi[id].rmidi)) < 0) 1125 return err; 1126 1127 sprintf (hdspm->midi[id].rmidi->name, "%s MIDI %d", card->id, id+1); 1128 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id]; 1129 1130 snd_rawmidi_set_ops (hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdspm_midi_output); 1131 snd_rawmidi_set_ops (hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdspm_midi_input); 1132 1133 hdspm->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | 1134 SNDRV_RAWMIDI_INFO_INPUT | 1135 SNDRV_RAWMIDI_INFO_DUPLEX; 1136 1137 return 0; 1138 } 1139 1140 1141 static void hdspm_midi_tasklet(unsigned long arg) 1142 { 1143 hdspm_t *hdspm = (hdspm_t *)arg; 1144 1145 if (hdspm->midi[0].pending) 1146 snd_hdspm_midi_input_read (&hdspm->midi[0]); 1147 if (hdspm->midi[1].pending) 1148 snd_hdspm_midi_input_read (&hdspm->midi[1]); 1149 } 1150 1151 1152 /*----------------------------------------------------------------------------- 1153 Status Interface 1154 ----------------------------------------------------------------------------*/ 1155 1156 /* get the system sample rate which is set */ 1157 1158 #define HDSPM_SYSTEM_SAMPLE_RATE(xname, xindex) \ 1159 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1160 .name = xname, \ 1161 .index = xindex, \ 1162 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 1163 .info = snd_hdspm_info_system_sample_rate, \ 1164 .get = snd_hdspm_get_system_sample_rate \ 1165 } 1166 1167 static int snd_hdspm_info_system_sample_rate(snd_kcontrol_t * kcontrol, 1168 snd_ctl_elem_info_t * uinfo) 1169 { 1170 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1171 uinfo->count = 1; 1172 return 0; 1173 } 1174 1175 static int snd_hdspm_get_system_sample_rate(snd_kcontrol_t * kcontrol, 1176 snd_ctl_elem_value_t * 1177 ucontrol) 1178 { 1179 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1180 1181 ucontrol->value.enumerated.item[0] = hdspm->system_sample_rate; 1182 return 0; 1183 } 1184 1185 #define HDSPM_AUTOSYNC_SAMPLE_RATE(xname, xindex) \ 1186 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1187 .name = xname, \ 1188 .index = xindex, \ 1189 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 1190 .info = snd_hdspm_info_autosync_sample_rate, \ 1191 .get = snd_hdspm_get_autosync_sample_rate \ 1192 } 1193 1194 static int snd_hdspm_info_autosync_sample_rate(snd_kcontrol_t * kcontrol, 1195 snd_ctl_elem_info_t * uinfo) 1196 { 1197 static char *texts[] = { "32000", "44100", "48000", 1198 "64000", "88200", "96000", 1199 "128000", "176400", "192000", 1200 "None" 1201 }; 1202 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1203 uinfo->count = 1; 1204 uinfo->value.enumerated.items = 10; 1205 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1206 uinfo->value.enumerated.item = 1207 uinfo->value.enumerated.items - 1; 1208 strcpy(uinfo->value.enumerated.name, 1209 texts[uinfo->value.enumerated.item]); 1210 return 0; 1211 } 1212 1213 static int snd_hdspm_get_autosync_sample_rate(snd_kcontrol_t * kcontrol, 1214 snd_ctl_elem_value_t * 1215 ucontrol) 1216 { 1217 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1218 1219 switch (hdspm_external_sample_rate(hdspm)) { 1220 case 32000: 1221 ucontrol->value.enumerated.item[0] = 0; 1222 break; 1223 case 44100: 1224 ucontrol->value.enumerated.item[0] = 1; 1225 break; 1226 case 48000: 1227 ucontrol->value.enumerated.item[0] = 2; 1228 break; 1229 case 64000: 1230 ucontrol->value.enumerated.item[0] = 3; 1231 break; 1232 case 88200: 1233 ucontrol->value.enumerated.item[0] = 4; 1234 break; 1235 case 96000: 1236 ucontrol->value.enumerated.item[0] = 5; 1237 break; 1238 case 128000: 1239 ucontrol->value.enumerated.item[0] = 6; 1240 break; 1241 case 176400: 1242 ucontrol->value.enumerated.item[0] = 7; 1243 break; 1244 case 192000: 1245 ucontrol->value.enumerated.item[0] = 8; 1246 break; 1247 1248 default: 1249 ucontrol->value.enumerated.item[0] = 9; 1250 } 1251 return 0; 1252 } 1253 1254 #define HDSPM_SYSTEM_CLOCK_MODE(xname, xindex) \ 1255 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1256 .name = xname, \ 1257 .index = xindex, \ 1258 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 1259 .info = snd_hdspm_info_system_clock_mode, \ 1260 .get = snd_hdspm_get_system_clock_mode, \ 1261 } 1262 1263 1264 1265 static int hdspm_system_clock_mode(hdspm_t * hdspm) 1266 { 1267 /* Always reflect the hardware info, rme is never wrong !!!! */ 1268 1269 if (hdspm->control_register & HDSPM_ClockModeMaster) 1270 return 0; 1271 return 1; 1272 } 1273 1274 static int snd_hdspm_info_system_clock_mode(snd_kcontrol_t * kcontrol, 1275 snd_ctl_elem_info_t * uinfo) 1276 { 1277 static char *texts[] = { "Master", "Slave" }; 1278 1279 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1280 uinfo->count = 1; 1281 uinfo->value.enumerated.items = 2; 1282 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1283 uinfo->value.enumerated.item = 1284 uinfo->value.enumerated.items - 1; 1285 strcpy(uinfo->value.enumerated.name, 1286 texts[uinfo->value.enumerated.item]); 1287 return 0; 1288 } 1289 1290 static int snd_hdspm_get_system_clock_mode(snd_kcontrol_t * kcontrol, 1291 snd_ctl_elem_value_t * ucontrol) 1292 { 1293 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1294 1295 ucontrol->value.enumerated.item[0] = 1296 hdspm_system_clock_mode(hdspm); 1297 return 0; 1298 } 1299 1300 #define HDSPM_CLOCK_SOURCE(xname, xindex) \ 1301 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1302 .name = xname, \ 1303 .index = xindex, \ 1304 .info = snd_hdspm_info_clock_source, \ 1305 .get = snd_hdspm_get_clock_source, \ 1306 .put = snd_hdspm_put_clock_source \ 1307 } 1308 1309 static int hdspm_clock_source(hdspm_t * hdspm) 1310 { 1311 if (hdspm->control_register & HDSPM_ClockModeMaster) { 1312 switch (hdspm->system_sample_rate) { 1313 case 32000: 1314 return 1; 1315 case 44100: 1316 return 2; 1317 case 48000: 1318 return 3; 1319 case 64000: 1320 return 4; 1321 case 88200: 1322 return 5; 1323 case 96000: 1324 return 6; 1325 case 128000: 1326 return 7; 1327 case 176400: 1328 return 8; 1329 case 192000: 1330 return 9; 1331 default: 1332 return 3; 1333 } 1334 } else { 1335 return 0; 1336 } 1337 } 1338 1339 static int hdspm_set_clock_source(hdspm_t * hdspm, int mode) 1340 { 1341 int rate; 1342 switch (mode) { 1343 1344 case HDSPM_CLOCK_SOURCE_AUTOSYNC: 1345 if (hdspm_external_sample_rate(hdspm) != 0) { 1346 hdspm->control_register &= ~HDSPM_ClockModeMaster; 1347 hdspm_write(hdspm, HDSPM_controlRegister, 1348 hdspm->control_register); 1349 return 0; 1350 } 1351 return -1; 1352 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ: 1353 rate = 32000; 1354 break; 1355 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ: 1356 rate = 44100; 1357 break; 1358 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ: 1359 rate = 48000; 1360 break; 1361 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ: 1362 rate = 64000; 1363 break; 1364 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ: 1365 rate = 88200; 1366 break; 1367 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ: 1368 rate = 96000; 1369 break; 1370 case HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ: 1371 rate = 128000; 1372 break; 1373 case HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ: 1374 rate = 176400; 1375 break; 1376 case HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ: 1377 rate = 192000; 1378 break; 1379 1380 default: 1381 rate = 44100; 1382 } 1383 hdspm->control_register |= HDSPM_ClockModeMaster; 1384 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1385 hdspm_set_rate(hdspm, rate, 1); 1386 return 0; 1387 } 1388 1389 static int snd_hdspm_info_clock_source(snd_kcontrol_t * kcontrol, 1390 snd_ctl_elem_info_t * uinfo) 1391 { 1392 static char *texts[] = { "AutoSync", 1393 "Internal 32.0 kHz", "Internal 44.1 kHz", 1394 "Internal 48.0 kHz", 1395 "Internal 64.0 kHz", "Internal 88.2 kHz", 1396 "Internal 96.0 kHz", 1397 "Internal 128.0 kHz", "Internal 176.4 kHz", 1398 "Internal 192.0 kHz" 1399 }; 1400 1401 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1402 uinfo->count = 1; 1403 uinfo->value.enumerated.items = 10; 1404 1405 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1406 uinfo->value.enumerated.item = 1407 uinfo->value.enumerated.items - 1; 1408 1409 strcpy(uinfo->value.enumerated.name, 1410 texts[uinfo->value.enumerated.item]); 1411 1412 return 0; 1413 } 1414 1415 static int snd_hdspm_get_clock_source(snd_kcontrol_t * kcontrol, 1416 snd_ctl_elem_value_t * ucontrol) 1417 { 1418 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1419 1420 ucontrol->value.enumerated.item[0] = hdspm_clock_source(hdspm); 1421 return 0; 1422 } 1423 1424 static int snd_hdspm_put_clock_source(snd_kcontrol_t * kcontrol, 1425 snd_ctl_elem_value_t * ucontrol) 1426 { 1427 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1428 int change; 1429 int val; 1430 1431 if (!snd_hdspm_use_is_exclusive(hdspm)) 1432 return -EBUSY; 1433 val = ucontrol->value.enumerated.item[0]; 1434 if (val < 0) 1435 val = 0; 1436 if (val > 6) 1437 val = 6; 1438 spin_lock_irq(&hdspm->lock); 1439 if (val != hdspm_clock_source(hdspm)) 1440 change = (hdspm_set_clock_source(hdspm, val) == 0) ? 1 : 0; 1441 else 1442 change = 0; 1443 spin_unlock_irq(&hdspm->lock); 1444 return change; 1445 } 1446 1447 #define HDSPM_PREF_SYNC_REF(xname, xindex) \ 1448 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1449 .name = xname, \ 1450 .index = xindex, \ 1451 .info = snd_hdspm_info_pref_sync_ref, \ 1452 .get = snd_hdspm_get_pref_sync_ref, \ 1453 .put = snd_hdspm_put_pref_sync_ref \ 1454 } 1455 1456 static int hdspm_pref_sync_ref(hdspm_t * hdspm) 1457 { 1458 /* Notice that this looks at the requested sync source, 1459 not the one actually in use. 1460 */ 1461 switch (hdspm->control_register & HDSPM_SyncRefMask) { 1462 case HDSPM_SyncRef_Word: 1463 return HDSPM_SYNC_FROM_WORD; 1464 case HDSPM_SyncRef_MADI: 1465 return HDSPM_SYNC_FROM_MADI; 1466 } 1467 1468 return HDSPM_SYNC_FROM_WORD; 1469 } 1470 1471 static int hdspm_set_pref_sync_ref(hdspm_t * hdspm, int pref) 1472 { 1473 hdspm->control_register &= ~HDSPM_SyncRefMask; 1474 1475 switch (pref) { 1476 case HDSPM_SYNC_FROM_MADI: 1477 hdspm->control_register |= HDSPM_SyncRef_MADI; 1478 break; 1479 case HDSPM_SYNC_FROM_WORD: 1480 hdspm->control_register |= HDSPM_SyncRef_Word; 1481 break; 1482 default: 1483 return -1; 1484 } 1485 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1486 return 0; 1487 } 1488 1489 static int snd_hdspm_info_pref_sync_ref(snd_kcontrol_t * kcontrol, 1490 snd_ctl_elem_info_t * uinfo) 1491 { 1492 static char *texts[] = { "Word", "MADI" }; 1493 1494 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1495 uinfo->count = 1; 1496 1497 uinfo->value.enumerated.items = 2; 1498 1499 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1500 uinfo->value.enumerated.item = 1501 uinfo->value.enumerated.items - 1; 1502 strcpy(uinfo->value.enumerated.name, 1503 texts[uinfo->value.enumerated.item]); 1504 return 0; 1505 } 1506 1507 static int snd_hdspm_get_pref_sync_ref(snd_kcontrol_t * kcontrol, 1508 snd_ctl_elem_value_t * ucontrol) 1509 { 1510 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1511 1512 ucontrol->value.enumerated.item[0] = hdspm_pref_sync_ref(hdspm); 1513 return 0; 1514 } 1515 1516 static int snd_hdspm_put_pref_sync_ref(snd_kcontrol_t * kcontrol, 1517 snd_ctl_elem_value_t * ucontrol) 1518 { 1519 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1520 int change, max; 1521 unsigned int val; 1522 1523 max = 2; 1524 1525 if (!snd_hdspm_use_is_exclusive(hdspm)) 1526 return -EBUSY; 1527 1528 val = ucontrol->value.enumerated.item[0] % max; 1529 1530 spin_lock_irq(&hdspm->lock); 1531 change = (int) val != hdspm_pref_sync_ref(hdspm); 1532 hdspm_set_pref_sync_ref(hdspm, val); 1533 spin_unlock_irq(&hdspm->lock); 1534 return change; 1535 } 1536 1537 #define HDSPM_AUTOSYNC_REF(xname, xindex) \ 1538 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1539 .name = xname, \ 1540 .index = xindex, \ 1541 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 1542 .info = snd_hdspm_info_autosync_ref, \ 1543 .get = snd_hdspm_get_autosync_ref, \ 1544 } 1545 1546 static int hdspm_autosync_ref(hdspm_t * hdspm) 1547 { 1548 /* This looks at the autosync selected sync reference */ 1549 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 1550 1551 switch (status2 & HDSPM_SelSyncRefMask) { 1552 1553 case HDSPM_SelSyncRef_WORD: 1554 return HDSPM_AUTOSYNC_FROM_WORD; 1555 1556 case HDSPM_SelSyncRef_MADI: 1557 return HDSPM_AUTOSYNC_FROM_MADI; 1558 1559 case HDSPM_SelSyncRef_NVALID: 1560 return HDSPM_AUTOSYNC_FROM_NONE; 1561 1562 default: 1563 return 0; 1564 } 1565 1566 return 0; 1567 } 1568 1569 static int snd_hdspm_info_autosync_ref(snd_kcontrol_t * kcontrol, 1570 snd_ctl_elem_info_t * uinfo) 1571 { 1572 static char *texts[] = { "WordClock", "MADI", "None" }; 1573 1574 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1575 uinfo->count = 1; 1576 uinfo->value.enumerated.items = 3; 1577 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1578 uinfo->value.enumerated.item = 1579 uinfo->value.enumerated.items - 1; 1580 strcpy(uinfo->value.enumerated.name, 1581 texts[uinfo->value.enumerated.item]); 1582 return 0; 1583 } 1584 1585 static int snd_hdspm_get_autosync_ref(snd_kcontrol_t * kcontrol, 1586 snd_ctl_elem_value_t * ucontrol) 1587 { 1588 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1589 1590 ucontrol->value.enumerated.item[0] = hdspm_pref_sync_ref(hdspm); 1591 return 0; 1592 } 1593 1594 #define HDSPM_LINE_OUT(xname, xindex) \ 1595 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1596 .name = xname, \ 1597 .index = xindex, \ 1598 .info = snd_hdspm_info_line_out, \ 1599 .get = snd_hdspm_get_line_out, \ 1600 .put = snd_hdspm_put_line_out \ 1601 } 1602 1603 static int hdspm_line_out(hdspm_t * hdspm) 1604 { 1605 return (hdspm->control_register & HDSPM_LineOut) ? 1 : 0; 1606 } 1607 1608 1609 static int hdspm_set_line_output(hdspm_t * hdspm, int out) 1610 { 1611 if (out) 1612 hdspm->control_register |= HDSPM_LineOut; 1613 else 1614 hdspm->control_register &= ~HDSPM_LineOut; 1615 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1616 1617 return 0; 1618 } 1619 1620 static int snd_hdspm_info_line_out(snd_kcontrol_t * kcontrol, 1621 snd_ctl_elem_info_t * uinfo) 1622 { 1623 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1624 uinfo->count = 1; 1625 uinfo->value.integer.min = 0; 1626 uinfo->value.integer.max = 1; 1627 return 0; 1628 } 1629 1630 static int snd_hdspm_get_line_out(snd_kcontrol_t * kcontrol, 1631 snd_ctl_elem_value_t * ucontrol) 1632 { 1633 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1634 1635 spin_lock_irq(&hdspm->lock); 1636 ucontrol->value.integer.value[0] = hdspm_line_out(hdspm); 1637 spin_unlock_irq(&hdspm->lock); 1638 return 0; 1639 } 1640 1641 static int snd_hdspm_put_line_out(snd_kcontrol_t * kcontrol, 1642 snd_ctl_elem_value_t * ucontrol) 1643 { 1644 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1645 int change; 1646 unsigned int val; 1647 1648 if (!snd_hdspm_use_is_exclusive(hdspm)) 1649 return -EBUSY; 1650 val = ucontrol->value.integer.value[0] & 1; 1651 spin_lock_irq(&hdspm->lock); 1652 change = (int) val != hdspm_line_out(hdspm); 1653 hdspm_set_line_output(hdspm, val); 1654 spin_unlock_irq(&hdspm->lock); 1655 return change; 1656 } 1657 1658 #define HDSPM_TX_64(xname, xindex) \ 1659 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1660 .name = xname, \ 1661 .index = xindex, \ 1662 .info = snd_hdspm_info_tx_64, \ 1663 .get = snd_hdspm_get_tx_64, \ 1664 .put = snd_hdspm_put_tx_64 \ 1665 } 1666 1667 static int hdspm_tx_64(hdspm_t * hdspm) 1668 { 1669 return (hdspm->control_register & HDSPM_TX_64ch) ? 1 : 0; 1670 } 1671 1672 static int hdspm_set_tx_64(hdspm_t * hdspm, int out) 1673 { 1674 if (out) 1675 hdspm->control_register |= HDSPM_TX_64ch; 1676 else 1677 hdspm->control_register &= ~HDSPM_TX_64ch; 1678 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1679 1680 return 0; 1681 } 1682 1683 static int snd_hdspm_info_tx_64(snd_kcontrol_t * kcontrol, 1684 snd_ctl_elem_info_t * uinfo) 1685 { 1686 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1687 uinfo->count = 1; 1688 uinfo->value.integer.min = 0; 1689 uinfo->value.integer.max = 1; 1690 return 0; 1691 } 1692 1693 static int snd_hdspm_get_tx_64(snd_kcontrol_t * kcontrol, 1694 snd_ctl_elem_value_t * ucontrol) 1695 { 1696 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1697 1698 spin_lock_irq(&hdspm->lock); 1699 ucontrol->value.integer.value[0] = hdspm_tx_64(hdspm); 1700 spin_unlock_irq(&hdspm->lock); 1701 return 0; 1702 } 1703 1704 static int snd_hdspm_put_tx_64(snd_kcontrol_t * kcontrol, 1705 snd_ctl_elem_value_t * ucontrol) 1706 { 1707 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1708 int change; 1709 unsigned int val; 1710 1711 if (!snd_hdspm_use_is_exclusive(hdspm)) 1712 return -EBUSY; 1713 val = ucontrol->value.integer.value[0] & 1; 1714 spin_lock_irq(&hdspm->lock); 1715 change = (int) val != hdspm_tx_64(hdspm); 1716 hdspm_set_tx_64(hdspm, val); 1717 spin_unlock_irq(&hdspm->lock); 1718 return change; 1719 } 1720 1721 #define HDSPM_C_TMS(xname, xindex) \ 1722 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1723 .name = xname, \ 1724 .index = xindex, \ 1725 .info = snd_hdspm_info_c_tms, \ 1726 .get = snd_hdspm_get_c_tms, \ 1727 .put = snd_hdspm_put_c_tms \ 1728 } 1729 1730 static int hdspm_c_tms(hdspm_t * hdspm) 1731 { 1732 return (hdspm->control_register & HDSPM_clr_tms) ? 1 : 0; 1733 } 1734 1735 static int hdspm_set_c_tms(hdspm_t * hdspm, int out) 1736 { 1737 if (out) 1738 hdspm->control_register |= HDSPM_clr_tms; 1739 else 1740 hdspm->control_register &= ~HDSPM_clr_tms; 1741 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1742 1743 return 0; 1744 } 1745 1746 static int snd_hdspm_info_c_tms(snd_kcontrol_t * kcontrol, 1747 snd_ctl_elem_info_t * uinfo) 1748 { 1749 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1750 uinfo->count = 1; 1751 uinfo->value.integer.min = 0; 1752 uinfo->value.integer.max = 1; 1753 return 0; 1754 } 1755 1756 static int snd_hdspm_get_c_tms(snd_kcontrol_t * kcontrol, 1757 snd_ctl_elem_value_t * ucontrol) 1758 { 1759 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1760 1761 spin_lock_irq(&hdspm->lock); 1762 ucontrol->value.integer.value[0] = hdspm_c_tms(hdspm); 1763 spin_unlock_irq(&hdspm->lock); 1764 return 0; 1765 } 1766 1767 static int snd_hdspm_put_c_tms(snd_kcontrol_t * kcontrol, 1768 snd_ctl_elem_value_t * ucontrol) 1769 { 1770 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1771 int change; 1772 unsigned int val; 1773 1774 if (!snd_hdspm_use_is_exclusive(hdspm)) 1775 return -EBUSY; 1776 val = ucontrol->value.integer.value[0] & 1; 1777 spin_lock_irq(&hdspm->lock); 1778 change = (int) val != hdspm_c_tms(hdspm); 1779 hdspm_set_c_tms(hdspm, val); 1780 spin_unlock_irq(&hdspm->lock); 1781 return change; 1782 } 1783 1784 #define HDSPM_SAFE_MODE(xname, xindex) \ 1785 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1786 .name = xname, \ 1787 .index = xindex, \ 1788 .info = snd_hdspm_info_safe_mode, \ 1789 .get = snd_hdspm_get_safe_mode, \ 1790 .put = snd_hdspm_put_safe_mode \ 1791 } 1792 1793 static int hdspm_safe_mode(hdspm_t * hdspm) 1794 { 1795 return (hdspm->control_register & HDSPM_AutoInp) ? 1 : 0; 1796 } 1797 1798 static int hdspm_set_safe_mode(hdspm_t * hdspm, int out) 1799 { 1800 if (out) 1801 hdspm->control_register |= HDSPM_AutoInp; 1802 else 1803 hdspm->control_register &= ~HDSPM_AutoInp; 1804 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1805 1806 return 0; 1807 } 1808 1809 static int snd_hdspm_info_safe_mode(snd_kcontrol_t * kcontrol, 1810 snd_ctl_elem_info_t * uinfo) 1811 { 1812 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1813 uinfo->count = 1; 1814 uinfo->value.integer.min = 0; 1815 uinfo->value.integer.max = 1; 1816 return 0; 1817 } 1818 1819 static int snd_hdspm_get_safe_mode(snd_kcontrol_t * kcontrol, 1820 snd_ctl_elem_value_t * ucontrol) 1821 { 1822 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1823 1824 spin_lock_irq(&hdspm->lock); 1825 ucontrol->value.integer.value[0] = hdspm_safe_mode(hdspm); 1826 spin_unlock_irq(&hdspm->lock); 1827 return 0; 1828 } 1829 1830 static int snd_hdspm_put_safe_mode(snd_kcontrol_t * kcontrol, 1831 snd_ctl_elem_value_t * ucontrol) 1832 { 1833 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1834 int change; 1835 unsigned int val; 1836 1837 if (!snd_hdspm_use_is_exclusive(hdspm)) 1838 return -EBUSY; 1839 val = ucontrol->value.integer.value[0] & 1; 1840 spin_lock_irq(&hdspm->lock); 1841 change = (int) val != hdspm_safe_mode(hdspm); 1842 hdspm_set_safe_mode(hdspm, val); 1843 spin_unlock_irq(&hdspm->lock); 1844 return change; 1845 } 1846 1847 #define HDSPM_INPUT_SELECT(xname, xindex) \ 1848 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1849 .name = xname, \ 1850 .index = xindex, \ 1851 .info = snd_hdspm_info_input_select, \ 1852 .get = snd_hdspm_get_input_select, \ 1853 .put = snd_hdspm_put_input_select \ 1854 } 1855 1856 static int hdspm_input_select(hdspm_t * hdspm) 1857 { 1858 return (hdspm->control_register & HDSPM_InputSelect0) ? 1 : 0; 1859 } 1860 1861 static int hdspm_set_input_select(hdspm_t * hdspm, int out) 1862 { 1863 if (out) 1864 hdspm->control_register |= HDSPM_InputSelect0; 1865 else 1866 hdspm->control_register &= ~HDSPM_InputSelect0; 1867 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1868 1869 return 0; 1870 } 1871 1872 static int snd_hdspm_info_input_select(snd_kcontrol_t * kcontrol, 1873 snd_ctl_elem_info_t * uinfo) 1874 { 1875 static char *texts[] = { "optical", "coaxial" }; 1876 1877 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1878 uinfo->count = 1; 1879 uinfo->value.enumerated.items = 2; 1880 1881 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1882 uinfo->value.enumerated.item = 1883 uinfo->value.enumerated.items - 1; 1884 strcpy(uinfo->value.enumerated.name, 1885 texts[uinfo->value.enumerated.item]); 1886 1887 return 0; 1888 } 1889 1890 static int snd_hdspm_get_input_select(snd_kcontrol_t * kcontrol, 1891 snd_ctl_elem_value_t * ucontrol) 1892 { 1893 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1894 1895 spin_lock_irq(&hdspm->lock); 1896 ucontrol->value.enumerated.item[0] = hdspm_input_select(hdspm); 1897 spin_unlock_irq(&hdspm->lock); 1898 return 0; 1899 } 1900 1901 static int snd_hdspm_put_input_select(snd_kcontrol_t * kcontrol, 1902 snd_ctl_elem_value_t * ucontrol) 1903 { 1904 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1905 int change; 1906 unsigned int val; 1907 1908 if (!snd_hdspm_use_is_exclusive(hdspm)) 1909 return -EBUSY; 1910 val = ucontrol->value.integer.value[0] & 1; 1911 spin_lock_irq(&hdspm->lock); 1912 change = (int) val != hdspm_input_select(hdspm); 1913 hdspm_set_input_select(hdspm, val); 1914 spin_unlock_irq(&hdspm->lock); 1915 return change; 1916 } 1917 1918 /* Simple Mixer 1919 deprecated since to much faders ??? 1920 MIXER interface says output (source, destination, value) 1921 where source > MAX_channels are playback channels 1922 on MADICARD 1923 - playback mixer matrix: [channelout+64] [output] [value] 1924 - input(thru) mixer matrix: [channelin] [output] [value] 1925 (better do 2 kontrols for seperation ?) 1926 */ 1927 1928 #define HDSPM_MIXER(xname, xindex) \ 1929 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \ 1930 .name = xname, \ 1931 .index = xindex, \ 1932 .device = 0, \ 1933 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \ 1934 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1935 .info = snd_hdspm_info_mixer, \ 1936 .get = snd_hdspm_get_mixer, \ 1937 .put = snd_hdspm_put_mixer \ 1938 } 1939 1940 static int snd_hdspm_info_mixer(snd_kcontrol_t * kcontrol, 1941 snd_ctl_elem_info_t * uinfo) 1942 { 1943 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1944 uinfo->count = 3; 1945 uinfo->value.integer.min = 0; 1946 uinfo->value.integer.max = 65535; 1947 uinfo->value.integer.step = 1; 1948 return 0; 1949 } 1950 1951 static int snd_hdspm_get_mixer(snd_kcontrol_t * kcontrol, 1952 snd_ctl_elem_value_t * ucontrol) 1953 { 1954 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1955 int source; 1956 int destination; 1957 1958 source = ucontrol->value.integer.value[0]; 1959 if (source < 0) 1960 source = 0; 1961 else if (source >= 2 * HDSPM_MAX_CHANNELS) 1962 source = 2 * HDSPM_MAX_CHANNELS - 1; 1963 1964 destination = ucontrol->value.integer.value[1]; 1965 if (destination < 0) 1966 destination = 0; 1967 else if (destination >= HDSPM_MAX_CHANNELS) 1968 destination = HDSPM_MAX_CHANNELS - 1; 1969 1970 spin_lock_irq(&hdspm->lock); 1971 if (source >= HDSPM_MAX_CHANNELS) 1972 ucontrol->value.integer.value[2] = 1973 hdspm_read_pb_gain(hdspm, destination, 1974 source - HDSPM_MAX_CHANNELS); 1975 else 1976 ucontrol->value.integer.value[2] = 1977 hdspm_read_in_gain(hdspm, destination, source); 1978 1979 spin_unlock_irq(&hdspm->lock); 1980 1981 return 0; 1982 } 1983 1984 static int snd_hdspm_put_mixer(snd_kcontrol_t * kcontrol, 1985 snd_ctl_elem_value_t * ucontrol) 1986 { 1987 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 1988 int change; 1989 int source; 1990 int destination; 1991 int gain; 1992 1993 if (!snd_hdspm_use_is_exclusive(hdspm)) 1994 return -EBUSY; 1995 1996 source = ucontrol->value.integer.value[0]; 1997 destination = ucontrol->value.integer.value[1]; 1998 1999 if (source < 0 || source >= 2 * HDSPM_MAX_CHANNELS) 2000 return -1; 2001 if (destination < 0 || destination >= HDSPM_MAX_CHANNELS) 2002 return -1; 2003 2004 gain = ucontrol->value.integer.value[2]; 2005 2006 spin_lock_irq(&hdspm->lock); 2007 2008 if (source >= HDSPM_MAX_CHANNELS) 2009 change = gain != hdspm_read_pb_gain(hdspm, destination, 2010 source - 2011 HDSPM_MAX_CHANNELS); 2012 else 2013 change = 2014 gain != hdspm_read_in_gain(hdspm, destination, source); 2015 2016 if (change) { 2017 if (source >= HDSPM_MAX_CHANNELS) 2018 hdspm_write_pb_gain(hdspm, destination, 2019 source - HDSPM_MAX_CHANNELS, 2020 gain); 2021 else 2022 hdspm_write_in_gain(hdspm, destination, source, 2023 gain); 2024 } 2025 spin_unlock_irq(&hdspm->lock); 2026 2027 return change; 2028 } 2029 2030 /* The simple mixer control(s) provide gain control for the 2031 basic 1:1 mappings of playback streams to output 2032 streams. 2033 */ 2034 2035 #define HDSPM_PLAYBACK_MIXER \ 2036 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2037 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE | \ 2038 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 2039 .info = snd_hdspm_info_playback_mixer, \ 2040 .get = snd_hdspm_get_playback_mixer, \ 2041 .put = snd_hdspm_put_playback_mixer \ 2042 } 2043 2044 static int snd_hdspm_info_playback_mixer(snd_kcontrol_t * kcontrol, 2045 snd_ctl_elem_info_t * uinfo) 2046 { 2047 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2048 uinfo->count = 1; 2049 uinfo->value.integer.min = 0; 2050 uinfo->value.integer.max = 65536; 2051 uinfo->value.integer.step = 1; 2052 return 0; 2053 } 2054 2055 static int snd_hdspm_get_playback_mixer(snd_kcontrol_t * kcontrol, 2056 snd_ctl_elem_value_t * ucontrol) 2057 { 2058 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 2059 int channel; 2060 int mapped_channel; 2061 2062 channel = ucontrol->id.index - 1; 2063 2064 snd_assert(channel >= 0 2065 || channel < HDSPM_MAX_CHANNELS, return -EINVAL); 2066 2067 if ((mapped_channel = hdspm->channel_map[channel]) < 0) 2068 return -EINVAL; 2069 2070 spin_lock_irq(&hdspm->lock); 2071 ucontrol->value.integer.value[0] = 2072 hdspm_read_pb_gain(hdspm, mapped_channel, mapped_channel); 2073 spin_unlock_irq(&hdspm->lock); 2074 2075 /* snd_printdd("get pb mixer index %d, channel %d, mapped_channel %d, value %d\n", 2076 ucontrol->id.index, channel, mapped_channel, ucontrol->value.integer.value[0]); 2077 */ 2078 2079 return 0; 2080 } 2081 2082 static int snd_hdspm_put_playback_mixer(snd_kcontrol_t * kcontrol, 2083 snd_ctl_elem_value_t * ucontrol) 2084 { 2085 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 2086 int change; 2087 int channel; 2088 int mapped_channel; 2089 int gain; 2090 2091 if (!snd_hdspm_use_is_exclusive(hdspm)) 2092 return -EBUSY; 2093 2094 channel = ucontrol->id.index - 1; 2095 2096 snd_assert(channel >= 0 2097 || channel < HDSPM_MAX_CHANNELS, return -EINVAL); 2098 2099 if ((mapped_channel = hdspm->channel_map[channel]) < 0) 2100 return -EINVAL; 2101 2102 gain = ucontrol->value.integer.value[0]; 2103 2104 spin_lock_irq(&hdspm->lock); 2105 change = 2106 gain != hdspm_read_pb_gain(hdspm, mapped_channel, 2107 mapped_channel); 2108 if (change) 2109 hdspm_write_pb_gain(hdspm, mapped_channel, mapped_channel, 2110 gain); 2111 spin_unlock_irq(&hdspm->lock); 2112 return change; 2113 } 2114 2115 #define HDSPM_WC_SYNC_CHECK(xname, xindex) \ 2116 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2117 .name = xname, \ 2118 .index = xindex, \ 2119 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 2120 .info = snd_hdspm_info_sync_check, \ 2121 .get = snd_hdspm_get_wc_sync_check \ 2122 } 2123 2124 static int snd_hdspm_info_sync_check(snd_kcontrol_t * kcontrol, 2125 snd_ctl_elem_info_t * uinfo) 2126 { 2127 static char *texts[] = { "No Lock", "Lock", "Sync" }; 2128 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2129 uinfo->count = 1; 2130 uinfo->value.enumerated.items = 3; 2131 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 2132 uinfo->value.enumerated.item = 2133 uinfo->value.enumerated.items - 1; 2134 strcpy(uinfo->value.enumerated.name, 2135 texts[uinfo->value.enumerated.item]); 2136 return 0; 2137 } 2138 2139 static int hdspm_wc_sync_check(hdspm_t * hdspm) 2140 { 2141 int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 2142 if (status2 & HDSPM_wcLock) { 2143 if (status2 & HDSPM_wcSync) 2144 return 2; 2145 else 2146 return 1; 2147 } 2148 return 0; 2149 } 2150 2151 static int snd_hdspm_get_wc_sync_check(snd_kcontrol_t * kcontrol, 2152 snd_ctl_elem_value_t * ucontrol) 2153 { 2154 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 2155 2156 ucontrol->value.enumerated.item[0] = hdspm_wc_sync_check(hdspm); 2157 return 0; 2158 } 2159 2160 2161 #define HDSPM_MADI_SYNC_CHECK(xname, xindex) \ 2162 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2163 .name = xname, \ 2164 .index = xindex, \ 2165 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 2166 .info = snd_hdspm_info_sync_check, \ 2167 .get = snd_hdspm_get_madisync_sync_check \ 2168 } 2169 2170 static int hdspm_madisync_sync_check(hdspm_t * hdspm) 2171 { 2172 int status = hdspm_read(hdspm, HDSPM_statusRegister); 2173 if (status & HDSPM_madiLock) { 2174 if (status & HDSPM_madiSync) 2175 return 2; 2176 else 2177 return 1; 2178 } 2179 return 0; 2180 } 2181 2182 static int snd_hdspm_get_madisync_sync_check(snd_kcontrol_t * kcontrol, 2183 snd_ctl_elem_value_t * 2184 ucontrol) 2185 { 2186 hdspm_t *hdspm = snd_kcontrol_chip(kcontrol); 2187 2188 ucontrol->value.enumerated.item[0] = 2189 hdspm_madisync_sync_check(hdspm); 2190 return 0; 2191 } 2192 2193 2194 2195 2196 static snd_kcontrol_new_t snd_hdspm_controls[] = { 2197 2198 HDSPM_MIXER("Mixer", 0), 2199 /* 'Sample Clock Source' complies with the alsa control naming scheme */ 2200 HDSPM_CLOCK_SOURCE("Sample Clock Source", 0), 2201 2202 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0), 2203 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0), 2204 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0), 2205 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0), 2206 /* 'External Rate' complies with the alsa control naming scheme */ 2207 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0), 2208 HDSPM_WC_SYNC_CHECK("Word Clock Lock Status", 0), 2209 HDSPM_MADI_SYNC_CHECK("MADI Sync Lock Status", 0), 2210 HDSPM_LINE_OUT("Line Out", 0), 2211 HDSPM_TX_64("TX 64 channels mode", 0), 2212 HDSPM_C_TMS("Clear Track Marker", 0), 2213 HDSPM_SAFE_MODE("Safe Mode", 0), 2214 HDSPM_INPUT_SELECT("Input Select", 0), 2215 }; 2216 2217 static snd_kcontrol_new_t snd_hdspm_playback_mixer = HDSPM_PLAYBACK_MIXER; 2218 2219 2220 static int hdspm_update_simple_mixer_controls(hdspm_t * hdspm) 2221 { 2222 int i; 2223 2224 for (i = hdspm->ds_channels; i < hdspm->ss_channels; ++i) { 2225 if (hdspm->system_sample_rate > 48000) { 2226 hdspm->playback_mixer_ctls[i]->vd[0].access = 2227 SNDRV_CTL_ELEM_ACCESS_INACTIVE | 2228 SNDRV_CTL_ELEM_ACCESS_READ | 2229 SNDRV_CTL_ELEM_ACCESS_VOLATILE; 2230 } else { 2231 hdspm->playback_mixer_ctls[i]->vd[0].access = 2232 SNDRV_CTL_ELEM_ACCESS_READWRITE | 2233 SNDRV_CTL_ELEM_ACCESS_VOLATILE; 2234 } 2235 snd_ctl_notify(hdspm->card, SNDRV_CTL_EVENT_MASK_VALUE | 2236 SNDRV_CTL_EVENT_MASK_INFO, 2237 &hdspm->playback_mixer_ctls[i]->id); 2238 } 2239 2240 return 0; 2241 } 2242 2243 2244 static int snd_hdspm_create_controls(snd_card_t * card, hdspm_t * hdspm) 2245 { 2246 unsigned int idx, limit; 2247 int err; 2248 snd_kcontrol_t *kctl; 2249 2250 /* add control list first */ 2251 2252 for (idx = 0; idx < ARRAY_SIZE(snd_hdspm_controls); idx++) { 2253 if ((err = 2254 snd_ctl_add(card, kctl = 2255 snd_ctl_new1(&snd_hdspm_controls[idx], 2256 hdspm))) < 0) { 2257 return err; 2258 } 2259 } 2260 2261 /* Channel playback mixer as default control 2262 Note: the whole matrix would be 128*HDSPM_MIXER_CHANNELS Faders, thats to big for any alsamixer 2263 they are accesible via special IOCTL on hwdep 2264 and the mixer 2dimensional mixer control */ 2265 2266 snd_hdspm_playback_mixer.name = "Chn"; 2267 limit = HDSPM_MAX_CHANNELS; 2268 2269 /* The index values are one greater than the channel ID so that alsamixer 2270 will display them correctly. We want to use the index for fast lookup 2271 of the relevant channel, but if we use it at all, most ALSA software 2272 does the wrong thing with it ... 2273 */ 2274 2275 for (idx = 0; idx < limit; ++idx) { 2276 snd_hdspm_playback_mixer.index = idx + 1; 2277 if ((err = snd_ctl_add(card, 2278 kctl = 2279 snd_ctl_new1 2280 (&snd_hdspm_playback_mixer, 2281 hdspm)))) { 2282 return err; 2283 } 2284 hdspm->playback_mixer_ctls[idx] = kctl; 2285 } 2286 2287 return 0; 2288 } 2289 2290 /*------------------------------------------------------------ 2291 /proc interface 2292 ------------------------------------------------------------*/ 2293 2294 static void 2295 snd_hdspm_proc_read(snd_info_entry_t * entry, snd_info_buffer_t * buffer) 2296 { 2297 hdspm_t *hdspm = (hdspm_t *) entry->private_data; 2298 unsigned int status; 2299 unsigned int status2; 2300 char *pref_sync_ref; 2301 char *autosync_ref; 2302 char *system_clock_mode; 2303 char *clock_source; 2304 char *insel; 2305 char *syncref; 2306 int x, x2; 2307 2308 status = hdspm_read(hdspm, HDSPM_statusRegister); 2309 status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 2310 2311 snd_iprintf(buffer, "%s (Card #%d) Rev.%x Status2first3bits: %x\n", 2312 hdspm->card_name, hdspm->card->number + 1, 2313 hdspm->firmware_rev, 2314 (status2 & HDSPM_version0) | 2315 (status2 & HDSPM_version1) | (status2 & 2316 HDSPM_version2)); 2317 2318 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", 2319 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase); 2320 2321 snd_iprintf(buffer, "--- System ---\n"); 2322 2323 snd_iprintf(buffer, 2324 "IRQ Pending: Audio=%d, MIDI0=%d, MIDI1=%d, IRQcount=%d\n", 2325 status & HDSPM_audioIRQPending, 2326 (status & HDSPM_midi0IRQPending) ? 1 : 0, 2327 (status & HDSPM_midi1IRQPending) ? 1 : 0, 2328 hdspm->irq_count); 2329 snd_iprintf(buffer, 2330 "HW pointer: id = %d, rawptr = %d (%d->%d) estimated= %ld (bytes)\n", 2331 ((status & HDSPM_BufferID) ? 1 : 0), 2332 (status & HDSPM_BufferPositionMask), 2333 (status & HDSPM_BufferPositionMask) % (2 * 2334 (int)hdspm-> 2335 period_bytes), 2336 ((status & HDSPM_BufferPositionMask) - 2337 64) % (2 * (int)hdspm->period_bytes), 2338 (long) hdspm_hw_pointer(hdspm) * 4); 2339 2340 snd_iprintf(buffer, 2341 "MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n", 2342 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF, 2343 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF, 2344 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF, 2345 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF); 2346 snd_iprintf(buffer, 2347 "Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, status2=0x%x\n", 2348 hdspm->control_register, hdspm->control2_register, 2349 status, status2); 2350 2351 snd_iprintf(buffer, "--- Settings ---\n"); 2352 2353 x = 1 << (6 + 2354 hdspm_decode_latency(hdspm-> 2355 control_register & 2356 HDSPM_LatencyMask)); 2357 2358 snd_iprintf(buffer, 2359 "Size (Latency): %d samples (2 periods of %lu bytes)\n", 2360 x, (unsigned long) hdspm->period_bytes); 2361 2362 snd_iprintf(buffer, "Line out: %s, Precise Pointer: %s\n", 2363 (hdspm-> 2364 control_register & HDSPM_LineOut) ? "on " : "off", 2365 (hdspm->precise_ptr) ? "on" : "off"); 2366 2367 switch (hdspm->control_register & HDSPM_InputMask) { 2368 case HDSPM_InputOptical: 2369 insel = "Optical"; 2370 break; 2371 case HDSPM_InputCoaxial: 2372 insel = "Coaxial"; 2373 break; 2374 default: 2375 insel = "Unkown"; 2376 } 2377 2378 switch (hdspm->control_register & HDSPM_SyncRefMask) { 2379 case HDSPM_SyncRef_Word: 2380 syncref = "WordClock"; 2381 break; 2382 case HDSPM_SyncRef_MADI: 2383 syncref = "MADI"; 2384 break; 2385 default: 2386 syncref = "Unkown"; 2387 } 2388 snd_iprintf(buffer, "Inputsel = %s, SyncRef = %s\n", insel, 2389 syncref); 2390 2391 snd_iprintf(buffer, 2392 "ClearTrackMarker = %s, Transmit in %s Channel Mode, Auto Input %s\n", 2393 (hdspm-> 2394 control_register & HDSPM_clr_tms) ? "on" : "off", 2395 (hdspm-> 2396 control_register & HDSPM_TX_64ch) ? "64" : "56", 2397 (hdspm-> 2398 control_register & HDSPM_AutoInp) ? "on" : "off"); 2399 2400 switch (hdspm_clock_source(hdspm)) { 2401 case HDSPM_CLOCK_SOURCE_AUTOSYNC: 2402 clock_source = "AutoSync"; 2403 break; 2404 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ: 2405 clock_source = "Internal 32 kHz"; 2406 break; 2407 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ: 2408 clock_source = "Internal 44.1 kHz"; 2409 break; 2410 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ: 2411 clock_source = "Internal 48 kHz"; 2412 break; 2413 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ: 2414 clock_source = "Internal 64 kHz"; 2415 break; 2416 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ: 2417 clock_source = "Internal 88.2 kHz"; 2418 break; 2419 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ: 2420 clock_source = "Internal 96 kHz"; 2421 break; 2422 default: 2423 clock_source = "Error"; 2424 } 2425 snd_iprintf(buffer, "Sample Clock Source: %s\n", clock_source); 2426 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) { 2427 system_clock_mode = "Slave"; 2428 } else { 2429 system_clock_mode = "Master"; 2430 } 2431 snd_iprintf(buffer, "System Clock Mode: %s\n", system_clock_mode); 2432 2433 switch (hdspm_pref_sync_ref(hdspm)) { 2434 case HDSPM_SYNC_FROM_WORD: 2435 pref_sync_ref = "Word Clock"; 2436 break; 2437 case HDSPM_SYNC_FROM_MADI: 2438 pref_sync_ref = "MADI Sync"; 2439 break; 2440 default: 2441 pref_sync_ref = "XXXX Clock"; 2442 break; 2443 } 2444 snd_iprintf(buffer, "Preferred Sync Reference: %s\n", 2445 pref_sync_ref); 2446 2447 snd_iprintf(buffer, "System Clock Frequency: %d\n", 2448 hdspm->system_sample_rate); 2449 2450 2451 snd_iprintf(buffer, "--- Status:\n"); 2452 2453 x = status & HDSPM_madiSync; 2454 x2 = status2 & HDSPM_wcSync; 2455 2456 snd_iprintf(buffer, "Inputs MADI=%s, WordClock=%s\n", 2457 (status & HDSPM_madiLock) ? (x ? "Sync" : "Lock") : 2458 "NoLock", 2459 (status2 & HDSPM_wcLock) ? (x2 ? "Sync" : "Lock") : 2460 "NoLock"); 2461 2462 switch (hdspm_autosync_ref(hdspm)) { 2463 case HDSPM_AUTOSYNC_FROM_WORD: 2464 autosync_ref = "Word Clock"; 2465 break; 2466 case HDSPM_AUTOSYNC_FROM_MADI: 2467 autosync_ref = "MADI Sync"; 2468 break; 2469 case HDSPM_AUTOSYNC_FROM_NONE: 2470 autosync_ref = "Input not valid"; 2471 break; 2472 default: 2473 autosync_ref = "---"; 2474 break; 2475 } 2476 snd_iprintf(buffer, 2477 "AutoSync: Reference= %s, Freq=%d (MADI = %d, Word = %d)\n", 2478 autosync_ref, hdspm_external_sample_rate(hdspm), 2479 (status & HDSPM_madiFreqMask) >> 22, 2480 (status2 & HDSPM_wcFreqMask) >> 5); 2481 2482 snd_iprintf(buffer, "Input: %s, Mode=%s\n", 2483 (status & HDSPM_AB_int) ? "Coax" : "Optical", 2484 (status & HDSPM_RX_64ch) ? "64 channels" : 2485 "56 channels"); 2486 2487 snd_iprintf(buffer, "\n"); 2488 } 2489 2490 static void __devinit snd_hdspm_proc_init(hdspm_t * hdspm) 2491 { 2492 snd_info_entry_t *entry; 2493 2494 if (!snd_card_proc_new(hdspm->card, "hdspm", &entry)) 2495 snd_info_set_text_ops(entry, hdspm, 1024, 2496 snd_hdspm_proc_read); 2497 } 2498 2499 /*------------------------------------------------------------ 2500 hdspm intitialize 2501 ------------------------------------------------------------*/ 2502 2503 static int snd_hdspm_set_defaults(hdspm_t * hdspm) 2504 { 2505 unsigned int i; 2506 2507 /* ASSUMPTION: hdspm->lock is either held, or there is no need to 2508 hold it (e.g. during module initalization). 2509 */ 2510 2511 /* set defaults: */ 2512 2513 hdspm->control_register = HDSPM_ClockModeMaster | /* Master Cloack Mode on */ 2514 hdspm_encode_latency(7) | /* latency maximum = 8192 samples */ 2515 HDSPM_InputCoaxial | /* Input Coax not Optical */ 2516 HDSPM_SyncRef_MADI | /* Madi is syncclock */ 2517 HDSPM_LineOut | /* Analog output in */ 2518 HDSPM_TX_64ch | /* transmit in 64ch mode */ 2519 HDSPM_AutoInp; /* AutoInput chossing (takeover) */ 2520 2521 /* ! HDSPM_Frequency0|HDSPM_Frequency1 = 44.1khz */ 2522 /* ! HDSPM_DoubleSpeed HDSPM_QuadSpeed = normal speed */ 2523 /* ! HDSPM_clr_tms = do not clear bits in track marks */ 2524 2525 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 2526 2527 #ifdef SNDRV_BIG_ENDIAN 2528 hdspm->control2_register = HDSPM_BIGENDIAN_MODE; 2529 #else 2530 hdspm->control2_register = 0; 2531 #endif 2532 2533 hdspm_write(hdspm, HDSPM_control2Reg, hdspm->control2_register); 2534 hdspm_compute_period_size(hdspm); 2535 2536 /* silence everything */ 2537 2538 all_in_all_mixer(hdspm, 0 * UNITY_GAIN); 2539 2540 if (line_outs_monitor[hdspm->dev]) { 2541 2542 snd_printk(KERN_INFO "HDSPM: sending all playback streams to line outs.\n"); 2543 2544 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++) { 2545 if (hdspm_write_pb_gain(hdspm, i, i, UNITY_GAIN)) 2546 return -EIO; 2547 } 2548 } 2549 2550 /* set a default rate so that the channel map is set up. */ 2551 hdspm->channel_map = channel_map_madi_ss; 2552 hdspm_set_rate(hdspm, 44100, 1); 2553 2554 return 0; 2555 } 2556 2557 2558 /*------------------------------------------------------------ 2559 interupt 2560 ------------------------------------------------------------*/ 2561 2562 static irqreturn_t snd_hdspm_interrupt(int irq, void *dev_id, 2563 struct pt_regs *regs) 2564 { 2565 hdspm_t *hdspm = (hdspm_t *) dev_id; 2566 unsigned int status; 2567 int audio; 2568 int midi0; 2569 int midi1; 2570 unsigned int midi0status; 2571 unsigned int midi1status; 2572 int schedule = 0; 2573 2574 status = hdspm_read(hdspm, HDSPM_statusRegister); 2575 2576 audio = status & HDSPM_audioIRQPending; 2577 midi0 = status & HDSPM_midi0IRQPending; 2578 midi1 = status & HDSPM_midi1IRQPending; 2579 2580 if (!audio && !midi0 && !midi1) 2581 return IRQ_NONE; 2582 2583 hdspm_write(hdspm, HDSPM_interruptConfirmation, 0); 2584 hdspm->irq_count++; 2585 2586 midi0status = hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff; 2587 midi1status = hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff; 2588 2589 if (audio) { 2590 2591 if (hdspm->capture_substream) 2592 snd_pcm_period_elapsed(hdspm->pcm-> 2593 streams 2594 [SNDRV_PCM_STREAM_CAPTURE]. 2595 substream); 2596 2597 if (hdspm->playback_substream) 2598 snd_pcm_period_elapsed(hdspm->pcm-> 2599 streams 2600 [SNDRV_PCM_STREAM_PLAYBACK]. 2601 substream); 2602 } 2603 2604 if (midi0 && midi0status) { 2605 /* we disable interrupts for this input until processing is done */ 2606 hdspm->control_register &= ~HDSPM_Midi0InterruptEnable; 2607 hdspm_write(hdspm, HDSPM_controlRegister, 2608 hdspm->control_register); 2609 hdspm->midi[0].pending = 1; 2610 schedule = 1; 2611 } 2612 if (midi1 && midi1status) { 2613 /* we disable interrupts for this input until processing is done */ 2614 hdspm->control_register &= ~HDSPM_Midi1InterruptEnable; 2615 hdspm_write(hdspm, HDSPM_controlRegister, 2616 hdspm->control_register); 2617 hdspm->midi[1].pending = 1; 2618 schedule = 1; 2619 } 2620 if (schedule) 2621 tasklet_hi_schedule(&hdspm->midi_tasklet); 2622 return IRQ_HANDLED; 2623 } 2624 2625 /*------------------------------------------------------------ 2626 pcm interface 2627 ------------------------------------------------------------*/ 2628 2629 2630 static snd_pcm_uframes_t snd_hdspm_hw_pointer(snd_pcm_substream_t * 2631 substream) 2632 { 2633 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 2634 return hdspm_hw_pointer(hdspm); 2635 } 2636 2637 static char *hdspm_channel_buffer_location(hdspm_t * hdspm, 2638 int stream, int channel) 2639 { 2640 int mapped_channel; 2641 2642 snd_assert(channel >= 0 2643 || channel < HDSPM_MAX_CHANNELS, return NULL); 2644 2645 if ((mapped_channel = hdspm->channel_map[channel]) < 0) 2646 return NULL; 2647 2648 if (stream == SNDRV_PCM_STREAM_CAPTURE) { 2649 return hdspm->capture_buffer + 2650 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES; 2651 } else { 2652 return hdspm->playback_buffer + 2653 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES; 2654 } 2655 } 2656 2657 2658 /* dont know why need it ??? */ 2659 static int snd_hdspm_playback_copy(snd_pcm_substream_t * substream, 2660 int channel, snd_pcm_uframes_t pos, 2661 void __user *src, snd_pcm_uframes_t count) 2662 { 2663 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 2664 char *channel_buf; 2665 2666 snd_assert(pos + count <= HDSPM_CHANNEL_BUFFER_BYTES / 4, 2667 return -EINVAL); 2668 2669 channel_buf = hdspm_channel_buffer_location(hdspm, 2670 substream->pstr-> 2671 stream, channel); 2672 2673 snd_assert(channel_buf != NULL, return -EIO); 2674 2675 return copy_from_user(channel_buf + pos * 4, src, count * 4); 2676 } 2677 2678 static int snd_hdspm_capture_copy(snd_pcm_substream_t * substream, 2679 int channel, snd_pcm_uframes_t pos, 2680 void __user *dst, snd_pcm_uframes_t count) 2681 { 2682 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 2683 char *channel_buf; 2684 2685 snd_assert(pos + count <= HDSPM_CHANNEL_BUFFER_BYTES / 4, 2686 return -EINVAL); 2687 2688 channel_buf = hdspm_channel_buffer_location(hdspm, 2689 substream->pstr-> 2690 stream, channel); 2691 snd_assert(channel_buf != NULL, return -EIO); 2692 return copy_to_user(dst, channel_buf + pos * 4, count * 4); 2693 } 2694 2695 static int snd_hdspm_hw_silence(snd_pcm_substream_t * substream, 2696 int channel, snd_pcm_uframes_t pos, 2697 snd_pcm_uframes_t count) 2698 { 2699 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 2700 char *channel_buf; 2701 2702 channel_buf = 2703 hdspm_channel_buffer_location(hdspm, substream->pstr->stream, 2704 channel); 2705 snd_assert(channel_buf != NULL, return -EIO); 2706 memset(channel_buf + pos * 4, 0, count * 4); 2707 return 0; 2708 } 2709 2710 static int snd_hdspm_reset(snd_pcm_substream_t * substream) 2711 { 2712 snd_pcm_runtime_t *runtime = substream->runtime; 2713 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 2714 snd_pcm_substream_t *other; 2715 2716 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2717 other = hdspm->capture_substream; 2718 else 2719 other = hdspm->playback_substream; 2720 2721 if (hdspm->running) 2722 runtime->status->hw_ptr = hdspm_hw_pointer(hdspm); 2723 else 2724 runtime->status->hw_ptr = 0; 2725 if (other) { 2726 struct list_head *pos; 2727 snd_pcm_substream_t *s; 2728 snd_pcm_runtime_t *oruntime = other->runtime; 2729 snd_pcm_group_for_each(pos, substream) { 2730 s = snd_pcm_group_substream_entry(pos); 2731 if (s == other) { 2732 oruntime->status->hw_ptr = 2733 runtime->status->hw_ptr; 2734 break; 2735 } 2736 } 2737 } 2738 return 0; 2739 } 2740 2741 static int snd_hdspm_hw_params(snd_pcm_substream_t * substream, 2742 snd_pcm_hw_params_t * params) 2743 { 2744 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 2745 int err; 2746 int i; 2747 pid_t this_pid; 2748 pid_t other_pid; 2749 struct snd_sg_buf *sgbuf; 2750 2751 2752 spin_lock_irq(&hdspm->lock); 2753 2754 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { 2755 this_pid = hdspm->playback_pid; 2756 other_pid = hdspm->capture_pid; 2757 } else { 2758 this_pid = hdspm->capture_pid; 2759 other_pid = hdspm->playback_pid; 2760 } 2761 2762 if ((other_pid > 0) && (this_pid != other_pid)) { 2763 2764 /* The other stream is open, and not by the same 2765 task as this one. Make sure that the parameters 2766 that matter are the same. 2767 */ 2768 2769 if (params_rate(params) != hdspm->system_sample_rate) { 2770 spin_unlock_irq(&hdspm->lock); 2771 _snd_pcm_hw_param_setempty(params, 2772 SNDRV_PCM_HW_PARAM_RATE); 2773 return -EBUSY; 2774 } 2775 2776 if (params_period_size(params) != hdspm->period_bytes / 4) { 2777 spin_unlock_irq(&hdspm->lock); 2778 _snd_pcm_hw_param_setempty(params, 2779 SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2780 return -EBUSY; 2781 } 2782 2783 } 2784 /* We're fine. */ 2785 spin_unlock_irq(&hdspm->lock); 2786 2787 /* how to make sure that the rate matches an externally-set one ? */ 2788 2789 spin_lock_irq(&hdspm->lock); 2790 if ((err = hdspm_set_rate(hdspm, params_rate(params), 0)) < 0) { 2791 spin_unlock_irq(&hdspm->lock); 2792 _snd_pcm_hw_param_setempty(params, 2793 SNDRV_PCM_HW_PARAM_RATE); 2794 return err; 2795 } 2796 spin_unlock_irq(&hdspm->lock); 2797 2798 if ((err = 2799 hdspm_set_interrupt_interval(hdspm, 2800 params_period_size(params))) < 2801 0) { 2802 _snd_pcm_hw_param_setempty(params, 2803 SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2804 return err; 2805 } 2806 2807 /* Memory allocation, takashi's method, dont know if we should spinlock */ 2808 /* malloc all buffer even if not enabled to get sure */ 2809 /* malloc only needed bytes */ 2810 err = 2811 snd_pcm_lib_malloc_pages(substream, 2812 HDSPM_CHANNEL_BUFFER_BYTES * 2813 params_channels(params)); 2814 if (err < 0) 2815 return err; 2816 2817 sgbuf = snd_pcm_substream_sgbuf(substream); 2818 2819 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 2820 2821 hdspm_set_sgbuf(hdspm, sgbuf, HDSPM_pageAddressBufferOut, 2822 params_channels(params)); 2823 2824 for (i = 0; i < params_channels(params); ++i) 2825 snd_hdspm_enable_out(hdspm, i, 1); 2826 2827 hdspm->playback_buffer = 2828 (unsigned char *) substream->runtime->dma_area; 2829 } else { 2830 hdspm_set_sgbuf(hdspm, sgbuf, HDSPM_pageAddressBufferIn, 2831 params_channels(params)); 2832 2833 for (i = 0; i < params_channels(params); ++i) 2834 snd_hdspm_enable_in(hdspm, i, 1); 2835 2836 hdspm->capture_buffer = 2837 (unsigned char *) substream->runtime->dma_area; 2838 } 2839 return 0; 2840 } 2841 2842 static int snd_hdspm_hw_free(snd_pcm_substream_t * substream) 2843 { 2844 int i; 2845 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 2846 2847 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 2848 2849 /* params_channels(params) should be enough, 2850 but to get sure in case of error */ 2851 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) 2852 snd_hdspm_enable_out(hdspm, i, 0); 2853 2854 hdspm->playback_buffer = NULL; 2855 } else { 2856 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) 2857 snd_hdspm_enable_in(hdspm, i, 0); 2858 2859 hdspm->capture_buffer = NULL; 2860 2861 } 2862 2863 snd_pcm_lib_free_pages(substream); 2864 2865 return 0; 2866 } 2867 2868 static int snd_hdspm_channel_info(snd_pcm_substream_t * substream, 2869 snd_pcm_channel_info_t * info) 2870 { 2871 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 2872 int mapped_channel; 2873 2874 snd_assert(info->channel < HDSPM_MAX_CHANNELS, return -EINVAL); 2875 2876 if ((mapped_channel = hdspm->channel_map[info->channel]) < 0) 2877 return -EINVAL; 2878 2879 info->offset = mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES; 2880 info->first = 0; 2881 info->step = 32; 2882 return 0; 2883 } 2884 2885 static int snd_hdspm_ioctl(snd_pcm_substream_t * substream, 2886 unsigned int cmd, void *arg) 2887 { 2888 switch (cmd) { 2889 case SNDRV_PCM_IOCTL1_RESET: 2890 { 2891 return snd_hdspm_reset(substream); 2892 } 2893 2894 case SNDRV_PCM_IOCTL1_CHANNEL_INFO: 2895 { 2896 snd_pcm_channel_info_t *info = arg; 2897 return snd_hdspm_channel_info(substream, info); 2898 } 2899 default: 2900 break; 2901 } 2902 2903 return snd_pcm_lib_ioctl(substream, cmd, arg); 2904 } 2905 2906 static int snd_hdspm_trigger(snd_pcm_substream_t * substream, int cmd) 2907 { 2908 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 2909 snd_pcm_substream_t *other; 2910 int running; 2911 2912 spin_lock(&hdspm->lock); 2913 running = hdspm->running; 2914 switch (cmd) { 2915 case SNDRV_PCM_TRIGGER_START: 2916 running |= 1 << substream->stream; 2917 break; 2918 case SNDRV_PCM_TRIGGER_STOP: 2919 running &= ~(1 << substream->stream); 2920 break; 2921 default: 2922 snd_BUG(); 2923 spin_unlock(&hdspm->lock); 2924 return -EINVAL; 2925 } 2926 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2927 other = hdspm->capture_substream; 2928 else 2929 other = hdspm->playback_substream; 2930 2931 if (other) { 2932 struct list_head *pos; 2933 snd_pcm_substream_t *s; 2934 snd_pcm_group_for_each(pos, substream) { 2935 s = snd_pcm_group_substream_entry(pos); 2936 if (s == other) { 2937 snd_pcm_trigger_done(s, substream); 2938 if (cmd == SNDRV_PCM_TRIGGER_START) 2939 running |= 1 << s->stream; 2940 else 2941 running &= ~(1 << s->stream); 2942 goto _ok; 2943 } 2944 } 2945 if (cmd == SNDRV_PCM_TRIGGER_START) { 2946 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) 2947 && substream->stream == 2948 SNDRV_PCM_STREAM_CAPTURE) 2949 hdspm_silence_playback(hdspm); 2950 } else { 2951 if (running && 2952 substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2953 hdspm_silence_playback(hdspm); 2954 } 2955 } else { 2956 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2957 hdspm_silence_playback(hdspm); 2958 } 2959 _ok: 2960 snd_pcm_trigger_done(substream, substream); 2961 if (!hdspm->running && running) 2962 hdspm_start_audio(hdspm); 2963 else if (hdspm->running && !running) 2964 hdspm_stop_audio(hdspm); 2965 hdspm->running = running; 2966 spin_unlock(&hdspm->lock); 2967 2968 return 0; 2969 } 2970 2971 static int snd_hdspm_prepare(snd_pcm_substream_t * substream) 2972 { 2973 return 0; 2974 } 2975 2976 static unsigned int period_sizes[] = 2977 { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; 2978 2979 static snd_pcm_hardware_t snd_hdspm_playback_subinfo = { 2980 .info = (SNDRV_PCM_INFO_MMAP | 2981 SNDRV_PCM_INFO_MMAP_VALID | 2982 SNDRV_PCM_INFO_NONINTERLEAVED | 2983 SNDRV_PCM_INFO_SYNC_START | SNDRV_PCM_INFO_DOUBLE), 2984 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2985 .rates = (SNDRV_PCM_RATE_32000 | 2986 SNDRV_PCM_RATE_44100 | 2987 SNDRV_PCM_RATE_48000 | 2988 SNDRV_PCM_RATE_64000 | 2989 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000), 2990 .rate_min = 32000, 2991 .rate_max = 96000, 2992 .channels_min = 1, 2993 .channels_max = HDSPM_MAX_CHANNELS, 2994 .buffer_bytes_max = 2995 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS, 2996 .period_bytes_min = (64 * 4), 2997 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS, 2998 .periods_min = 2, 2999 .periods_max = 2, 3000 .fifo_size = 0 3001 }; 3002 3003 static snd_pcm_hardware_t snd_hdspm_capture_subinfo = { 3004 .info = (SNDRV_PCM_INFO_MMAP | 3005 SNDRV_PCM_INFO_MMAP_VALID | 3006 SNDRV_PCM_INFO_NONINTERLEAVED | 3007 SNDRV_PCM_INFO_SYNC_START), 3008 .formats = SNDRV_PCM_FMTBIT_S32_LE, 3009 .rates = (SNDRV_PCM_RATE_32000 | 3010 SNDRV_PCM_RATE_44100 | 3011 SNDRV_PCM_RATE_48000 | 3012 SNDRV_PCM_RATE_64000 | 3013 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000), 3014 .rate_min = 32000, 3015 .rate_max = 96000, 3016 .channels_min = 1, 3017 .channels_max = HDSPM_MAX_CHANNELS, 3018 .buffer_bytes_max = 3019 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS, 3020 .period_bytes_min = (64 * 4), 3021 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS, 3022 .periods_min = 2, 3023 .periods_max = 2, 3024 .fifo_size = 0 3025 }; 3026 3027 static snd_pcm_hw_constraint_list_t hw_constraints_period_sizes = { 3028 .count = ARRAY_SIZE(period_sizes), 3029 .list = period_sizes, 3030 .mask = 0 3031 }; 3032 3033 3034 static int snd_hdspm_hw_rule_channels_rate(snd_pcm_hw_params_t * params, 3035 snd_pcm_hw_rule_t * rule) 3036 { 3037 hdspm_t *hdspm = rule->private; 3038 snd_interval_t *c = 3039 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 3040 snd_interval_t *r = 3041 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 3042 3043 if (r->min > 48000) { 3044 snd_interval_t t = { 3045 .min = 1, 3046 .max = hdspm->ds_channels, 3047 .integer = 1, 3048 }; 3049 return snd_interval_refine(c, &t); 3050 } else if (r->max < 64000) { 3051 snd_interval_t t = { 3052 .min = 1, 3053 .max = hdspm->ss_channels, 3054 .integer = 1, 3055 }; 3056 return snd_interval_refine(c, &t); 3057 } 3058 return 0; 3059 } 3060 3061 static int snd_hdspm_hw_rule_rate_channels(snd_pcm_hw_params_t * params, 3062 snd_pcm_hw_rule_t * rule) 3063 { 3064 hdspm_t *hdspm = rule->private; 3065 snd_interval_t *c = 3066 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 3067 snd_interval_t *r = 3068 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 3069 3070 if (c->min <= hdspm->ss_channels) { 3071 snd_interval_t t = { 3072 .min = 32000, 3073 .max = 48000, 3074 .integer = 1, 3075 }; 3076 return snd_interval_refine(r, &t); 3077 } else if (c->max > hdspm->ss_channels) { 3078 snd_interval_t t = { 3079 .min = 64000, 3080 .max = 96000, 3081 .integer = 1, 3082 }; 3083 3084 return snd_interval_refine(r, &t); 3085 } 3086 return 0; 3087 } 3088 3089 static int snd_hdspm_playback_open(snd_pcm_substream_t * substream) 3090 { 3091 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 3092 snd_pcm_runtime_t *runtime = substream->runtime; 3093 3094 snd_printdd("Open device substream %d\n", substream->stream); 3095 3096 spin_lock_irq(&hdspm->lock); 3097 3098 snd_pcm_set_sync(substream); 3099 3100 runtime->hw = snd_hdspm_playback_subinfo; 3101 3102 if (hdspm->capture_substream == NULL) 3103 hdspm_stop_audio(hdspm); 3104 3105 hdspm->playback_pid = current->pid; 3106 hdspm->playback_substream = substream; 3107 3108 spin_unlock_irq(&hdspm->lock); 3109 3110 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 3111 3112 snd_pcm_hw_constraint_list(runtime, 0, 3113 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 3114 &hw_constraints_period_sizes); 3115 3116 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 3117 snd_hdspm_hw_rule_channels_rate, hdspm, 3118 SNDRV_PCM_HW_PARAM_RATE, -1); 3119 3120 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 3121 snd_hdspm_hw_rule_rate_channels, hdspm, 3122 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 3123 3124 return 0; 3125 } 3126 3127 static int snd_hdspm_playback_release(snd_pcm_substream_t * substream) 3128 { 3129 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 3130 3131 spin_lock_irq(&hdspm->lock); 3132 3133 hdspm->playback_pid = -1; 3134 hdspm->playback_substream = NULL; 3135 3136 spin_unlock_irq(&hdspm->lock); 3137 3138 return 0; 3139 } 3140 3141 3142 static int snd_hdspm_capture_open(snd_pcm_substream_t * substream) 3143 { 3144 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 3145 snd_pcm_runtime_t *runtime = substream->runtime; 3146 3147 spin_lock_irq(&hdspm->lock); 3148 snd_pcm_set_sync(substream); 3149 runtime->hw = snd_hdspm_capture_subinfo; 3150 3151 if (hdspm->playback_substream == NULL) 3152 hdspm_stop_audio(hdspm); 3153 3154 hdspm->capture_pid = current->pid; 3155 hdspm->capture_substream = substream; 3156 3157 spin_unlock_irq(&hdspm->lock); 3158 3159 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 3160 snd_pcm_hw_constraint_list(runtime, 0, 3161 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 3162 &hw_constraints_period_sizes); 3163 3164 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 3165 snd_hdspm_hw_rule_channels_rate, hdspm, 3166 SNDRV_PCM_HW_PARAM_RATE, -1); 3167 3168 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 3169 snd_hdspm_hw_rule_rate_channels, hdspm, 3170 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 3171 return 0; 3172 } 3173 3174 static int snd_hdspm_capture_release(snd_pcm_substream_t * substream) 3175 { 3176 hdspm_t *hdspm = snd_pcm_substream_chip(substream); 3177 3178 spin_lock_irq(&hdspm->lock); 3179 3180 hdspm->capture_pid = -1; 3181 hdspm->capture_substream = NULL; 3182 3183 spin_unlock_irq(&hdspm->lock); 3184 return 0; 3185 } 3186 3187 static int snd_hdspm_hwdep_dummy_op(snd_hwdep_t * hw, struct file *file) 3188 { 3189 /* we have nothing to initialize but the call is required */ 3190 return 0; 3191 } 3192 3193 3194 static int snd_hdspm_hwdep_ioctl(snd_hwdep_t * hw, struct file *file, 3195 unsigned int cmd, unsigned long arg) 3196 { 3197 hdspm_t *hdspm = (hdspm_t *) hw->private_data; 3198 struct sndrv_hdspm_mixer_ioctl mixer; 3199 hdspm_config_info_t info; 3200 hdspm_version_t hdspm_version; 3201 struct sndrv_hdspm_peak_rms_ioctl rms; 3202 3203 switch (cmd) { 3204 3205 3206 case SNDRV_HDSPM_IOCTL_GET_PEAK_RMS: 3207 if (copy_from_user(&rms, (void __user *)arg, sizeof(rms))) 3208 return -EFAULT; 3209 /* maybe there is a chance to memorymap in future so dont touch just copy */ 3210 if(copy_to_user_fromio((void __user *)rms.peak, 3211 hdspm->iobase+HDSPM_MADI_peakrmsbase, 3212 sizeof(hdspm_peak_rms_t)) != 0 ) 3213 return -EFAULT; 3214 3215 break; 3216 3217 3218 case SNDRV_HDSPM_IOCTL_GET_CONFIG_INFO: 3219 3220 spin_lock_irq(&hdspm->lock); 3221 info.pref_sync_ref = 3222 (unsigned char) hdspm_pref_sync_ref(hdspm); 3223 info.wordclock_sync_check = 3224 (unsigned char) hdspm_wc_sync_check(hdspm); 3225 3226 info.system_sample_rate = hdspm->system_sample_rate; 3227 info.autosync_sample_rate = 3228 hdspm_external_sample_rate(hdspm); 3229 info.system_clock_mode = 3230 (unsigned char) hdspm_system_clock_mode(hdspm); 3231 info.clock_source = 3232 (unsigned char) hdspm_clock_source(hdspm); 3233 info.autosync_ref = 3234 (unsigned char) hdspm_autosync_ref(hdspm); 3235 info.line_out = (unsigned char) hdspm_line_out(hdspm); 3236 info.passthru = 0; 3237 spin_unlock_irq(&hdspm->lock); 3238 if (copy_to_user((void __user *) arg, &info, sizeof(info))) 3239 return -EFAULT; 3240 break; 3241 3242 case SNDRV_HDSPM_IOCTL_GET_VERSION: 3243 hdspm_version.firmware_rev = hdspm->firmware_rev; 3244 if (copy_to_user((void __user *) arg, &hdspm_version, 3245 sizeof(hdspm_version))) 3246 return -EFAULT; 3247 break; 3248 3249 case SNDRV_HDSPM_IOCTL_GET_MIXER: 3250 if (copy_from_user(&mixer, (void __user *)arg, sizeof(mixer))) 3251 return -EFAULT; 3252 if (copy_to_user 3253 ((void __user *)mixer.mixer, hdspm->mixer, sizeof(hdspm_mixer_t))) 3254 return -EFAULT; 3255 break; 3256 3257 default: 3258 return -EINVAL; 3259 } 3260 return 0; 3261 } 3262 3263 static snd_pcm_ops_t snd_hdspm_playback_ops = { 3264 .open = snd_hdspm_playback_open, 3265 .close = snd_hdspm_playback_release, 3266 .ioctl = snd_hdspm_ioctl, 3267 .hw_params = snd_hdspm_hw_params, 3268 .hw_free = snd_hdspm_hw_free, 3269 .prepare = snd_hdspm_prepare, 3270 .trigger = snd_hdspm_trigger, 3271 .pointer = snd_hdspm_hw_pointer, 3272 .copy = snd_hdspm_playback_copy, 3273 .silence = snd_hdspm_hw_silence, 3274 .page = snd_pcm_sgbuf_ops_page, 3275 }; 3276 3277 static snd_pcm_ops_t snd_hdspm_capture_ops = { 3278 .open = snd_hdspm_capture_open, 3279 .close = snd_hdspm_capture_release, 3280 .ioctl = snd_hdspm_ioctl, 3281 .hw_params = snd_hdspm_hw_params, 3282 .hw_free = snd_hdspm_hw_free, 3283 .prepare = snd_hdspm_prepare, 3284 .trigger = snd_hdspm_trigger, 3285 .pointer = snd_hdspm_hw_pointer, 3286 .copy = snd_hdspm_capture_copy, 3287 .page = snd_pcm_sgbuf_ops_page, 3288 }; 3289 3290 static int __devinit snd_hdspm_create_hwdep(snd_card_t * card, 3291 hdspm_t * hdspm) 3292 { 3293 snd_hwdep_t *hw; 3294 int err; 3295 3296 if ((err = snd_hwdep_new(card, "HDSPM hwdep", 0, &hw)) < 0) 3297 return err; 3298 3299 hdspm->hwdep = hw; 3300 hw->private_data = hdspm; 3301 strcpy(hw->name, "HDSPM hwdep interface"); 3302 3303 hw->ops.open = snd_hdspm_hwdep_dummy_op; 3304 hw->ops.ioctl = snd_hdspm_hwdep_ioctl; 3305 hw->ops.release = snd_hdspm_hwdep_dummy_op; 3306 3307 return 0; 3308 } 3309 3310 3311 /*------------------------------------------------------------ 3312 memory interface 3313 ------------------------------------------------------------*/ 3314 static int __devinit snd_hdspm_preallocate_memory(hdspm_t * hdspm) 3315 { 3316 int err; 3317 snd_pcm_t *pcm; 3318 size_t wanted; 3319 3320 pcm = hdspm->pcm; 3321 3322 wanted = HDSPM_DMA_AREA_BYTES + 4096; /* dont know why, but it works */ 3323 3324 if ((err = 3325 snd_pcm_lib_preallocate_pages_for_all(pcm, 3326 SNDRV_DMA_TYPE_DEV_SG, 3327 snd_dma_pci_data(hdspm->pci), 3328 wanted, 3329 wanted)) < 0) { 3330 snd_printdd("Could not preallocate %d Bytes\n", wanted); 3331 3332 return err; 3333 } else 3334 snd_printdd(" Preallocated %d Bytes\n", wanted); 3335 3336 return 0; 3337 } 3338 3339 static int snd_hdspm_memory_free(hdspm_t * hdspm) 3340 { 3341 snd_printdd("memory_free_for_all %p\n", hdspm->pcm); 3342 3343 snd_pcm_lib_preallocate_free_for_all(hdspm->pcm); 3344 return 0; 3345 } 3346 3347 3348 static void hdspm_set_sgbuf(hdspm_t * hdspm, struct snd_sg_buf *sgbuf, 3349 unsigned int reg, int channels) 3350 { 3351 int i; 3352 for (i = 0; i < (channels * 16); i++) 3353 hdspm_write(hdspm, reg + 4 * i, 3354 snd_pcm_sgbuf_get_addr(sgbuf, 3355 (size_t) 4096 * i)); 3356 } 3357 3358 /* ------------- ALSA Devices ---------------------------- */ 3359 static int __devinit snd_hdspm_create_pcm(snd_card_t * card, 3360 hdspm_t * hdspm) 3361 { 3362 snd_pcm_t *pcm; 3363 int err; 3364 3365 if ((err = snd_pcm_new(card, hdspm->card_name, 0, 1, 1, &pcm)) < 0) 3366 return err; 3367 3368 hdspm->pcm = pcm; 3369 pcm->private_data = hdspm; 3370 strcpy(pcm->name, hdspm->card_name); 3371 3372 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 3373 &snd_hdspm_playback_ops); 3374 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 3375 &snd_hdspm_capture_ops); 3376 3377 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 3378 3379 if ((err = snd_hdspm_preallocate_memory(hdspm)) < 0) 3380 return err; 3381 3382 return 0; 3383 } 3384 3385 static inline void snd_hdspm_initialize_midi_flush(hdspm_t * hdspm) 3386 { 3387 snd_hdspm_flush_midi_input(hdspm, 0); 3388 snd_hdspm_flush_midi_input(hdspm, 1); 3389 } 3390 3391 static int __devinit snd_hdspm_create_alsa_devices(snd_card_t * card, 3392 hdspm_t * hdspm) 3393 { 3394 int err; 3395 3396 snd_printdd("Create card...\n"); 3397 if ((err = snd_hdspm_create_pcm(card, hdspm)) < 0) 3398 return err; 3399 3400 if ((err = snd_hdspm_create_midi(card, hdspm, 0)) < 0) 3401 return err; 3402 3403 if ((err = snd_hdspm_create_midi(card, hdspm, 1)) < 0) 3404 return err; 3405 3406 if ((err = snd_hdspm_create_controls(card, hdspm)) < 0) 3407 return err; 3408 3409 if ((err = snd_hdspm_create_hwdep(card, hdspm)) < 0) 3410 return err; 3411 3412 snd_printdd("proc init...\n"); 3413 snd_hdspm_proc_init(hdspm); 3414 3415 hdspm->system_sample_rate = -1; 3416 hdspm->last_external_sample_rate = -1; 3417 hdspm->last_internal_sample_rate = -1; 3418 hdspm->playback_pid = -1; 3419 hdspm->capture_pid = -1; 3420 hdspm->capture_substream = NULL; 3421 hdspm->playback_substream = NULL; 3422 3423 snd_printdd("Set defaults...\n"); 3424 if ((err = snd_hdspm_set_defaults(hdspm)) < 0) 3425 return err; 3426 3427 snd_printdd("Update mixer controls...\n"); 3428 hdspm_update_simple_mixer_controls(hdspm); 3429 3430 snd_printdd("Initializeing complete ???\n"); 3431 3432 if ((err = snd_card_register(card)) < 0) { 3433 snd_printk(KERN_ERR "HDSPM: error registering card\n"); 3434 return err; 3435 } 3436 3437 snd_printdd("... yes now\n"); 3438 3439 return 0; 3440 } 3441 3442 static int __devinit snd_hdspm_create(snd_card_t * card, hdspm_t * hdspm, 3443 int precise_ptr, int enable_monitor) 3444 { 3445 struct pci_dev *pci = hdspm->pci; 3446 int err; 3447 int i; 3448 3449 unsigned long io_extent; 3450 3451 hdspm->irq = -1; 3452 hdspm->irq_count = 0; 3453 3454 hdspm->midi[0].rmidi = NULL; 3455 hdspm->midi[1].rmidi = NULL; 3456 hdspm->midi[0].input = NULL; 3457 hdspm->midi[1].input = NULL; 3458 hdspm->midi[0].output = NULL; 3459 hdspm->midi[1].output = NULL; 3460 spin_lock_init(&hdspm->midi[0].lock); 3461 spin_lock_init(&hdspm->midi[1].lock); 3462 hdspm->iobase = NULL; 3463 hdspm->control_register = 0; 3464 hdspm->control2_register = 0; 3465 3466 hdspm->playback_buffer = NULL; 3467 hdspm->capture_buffer = NULL; 3468 3469 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) 3470 hdspm->playback_mixer_ctls[i] = NULL; 3471 hdspm->mixer = NULL; 3472 3473 hdspm->card = card; 3474 3475 spin_lock_init(&hdspm->lock); 3476 3477 tasklet_init(&hdspm->midi_tasklet, 3478 hdspm_midi_tasklet, (unsigned long) hdspm); 3479 3480 pci_read_config_word(hdspm->pci, 3481 PCI_CLASS_REVISION, &hdspm->firmware_rev); 3482 3483 strcpy(card->driver, "HDSPM"); 3484 strcpy(card->mixername, "Xilinx FPGA"); 3485 hdspm->card_name = "RME HDSPM MADI"; 3486 3487 if ((err = pci_enable_device(pci)) < 0) 3488 return err; 3489 3490 pci_set_master(hdspm->pci); 3491 3492 if ((err = pci_request_regions(pci, "hdspm")) < 0) 3493 return err; 3494 3495 hdspm->port = pci_resource_start(pci, 0); 3496 io_extent = pci_resource_len(pci, 0); 3497 3498 snd_printdd("grabbed memory region 0x%lx-0x%lx\n", 3499 hdspm->port, hdspm->port + io_extent - 1); 3500 3501 3502 if ((hdspm->iobase = ioremap_nocache(hdspm->port, io_extent)) == NULL) { 3503 snd_printk(KERN_ERR "HDSPM: unable to remap region 0x%lx-0x%lx\n", 3504 hdspm->port, hdspm->port + io_extent - 1); 3505 return -EBUSY; 3506 } 3507 snd_printdd("remapped region (0x%lx) 0x%lx-0x%lx\n", 3508 (unsigned long)hdspm->iobase, hdspm->port, 3509 hdspm->port + io_extent - 1); 3510 3511 if (request_irq(pci->irq, snd_hdspm_interrupt, 3512 SA_INTERRUPT | SA_SHIRQ, "hdspm", 3513 (void *) hdspm)) { 3514 snd_printk(KERN_ERR "HDSPM: unable to use IRQ %d\n", pci->irq); 3515 return -EBUSY; 3516 } 3517 3518 snd_printdd("use IRQ %d\n", pci->irq); 3519 3520 hdspm->irq = pci->irq; 3521 hdspm->precise_ptr = precise_ptr; 3522 3523 hdspm->monitor_outs = enable_monitor; 3524 3525 snd_printdd("kmalloc Mixer memory of %d Bytes\n", 3526 sizeof(hdspm_mixer_t)); 3527 if ((hdspm->mixer = 3528 (hdspm_mixer_t *) kmalloc(sizeof(hdspm_mixer_t), GFP_KERNEL)) 3529 == NULL) { 3530 snd_printk(KERN_ERR "HDSPM: unable to kmalloc Mixer memory of %d Bytes\n", 3531 (int)sizeof(hdspm_mixer_t)); 3532 return err; 3533 } 3534 3535 hdspm->ss_channels = MADI_SS_CHANNELS; 3536 hdspm->ds_channels = MADI_DS_CHANNELS; 3537 hdspm->qs_channels = MADI_QS_CHANNELS; 3538 3539 snd_printdd("create alsa devices.\n"); 3540 if ((err = snd_hdspm_create_alsa_devices(card, hdspm)) < 0) 3541 return err; 3542 3543 snd_hdspm_initialize_midi_flush(hdspm); 3544 3545 return 0; 3546 } 3547 3548 static int snd_hdspm_free(hdspm_t * hdspm) 3549 { 3550 3551 if (hdspm->port) { 3552 3553 /* stop th audio, and cancel all interrupts */ 3554 hdspm->control_register &= 3555 ~(HDSPM_Start | HDSPM_AudioInterruptEnable 3556 | HDSPM_Midi0InterruptEnable | 3557 HDSPM_Midi1InterruptEnable); 3558 hdspm_write(hdspm, HDSPM_controlRegister, 3559 hdspm->control_register); 3560 } 3561 3562 if (hdspm->irq >= 0) 3563 free_irq(hdspm->irq, (void *) hdspm); 3564 3565 3566 if (hdspm->mixer) 3567 kfree(hdspm->mixer); 3568 3569 if (hdspm->iobase) 3570 iounmap(hdspm->iobase); 3571 3572 snd_hdspm_memory_free(hdspm); 3573 3574 if (hdspm->port) 3575 pci_release_regions(hdspm->pci); 3576 3577 pci_disable_device(hdspm->pci); 3578 return 0; 3579 } 3580 3581 static void snd_hdspm_card_free(snd_card_t * card) 3582 { 3583 hdspm_t *hdspm = (hdspm_t *) card->private_data; 3584 3585 if (hdspm) 3586 snd_hdspm_free(hdspm); 3587 } 3588 3589 static int __devinit snd_hdspm_probe(struct pci_dev *pci, 3590 const struct pci_device_id *pci_id) 3591 { 3592 static int dev; 3593 hdspm_t *hdspm; 3594 snd_card_t *card; 3595 int err; 3596 3597 if (dev >= SNDRV_CARDS) 3598 return -ENODEV; 3599 if (!enable[dev]) { 3600 dev++; 3601 return -ENOENT; 3602 } 3603 3604 if (!(card = snd_card_new(index[dev], id[dev], 3605 THIS_MODULE, sizeof(hdspm_t)))) 3606 return -ENOMEM; 3607 3608 hdspm = (hdspm_t *) card->private_data; 3609 card->private_free = snd_hdspm_card_free; 3610 hdspm->dev = dev; 3611 hdspm->pci = pci; 3612 3613 if ((err = 3614 snd_hdspm_create(card, hdspm, precise_ptr[dev], 3615 enable_monitor[dev])) < 0) { 3616 snd_card_free(card); 3617 return err; 3618 } 3619 3620 strcpy(card->shortname, "HDSPM MADI"); 3621 sprintf(card->longname, "%s at 0x%lx, irq %d", hdspm->card_name, 3622 hdspm->port, hdspm->irq); 3623 3624 if ((err = snd_card_register(card)) < 0) { 3625 snd_card_free(card); 3626 return err; 3627 } 3628 3629 pci_set_drvdata(pci, card); 3630 3631 dev++; 3632 return 0; 3633 } 3634 3635 static void __devexit snd_hdspm_remove(struct pci_dev *pci) 3636 { 3637 snd_card_free(pci_get_drvdata(pci)); 3638 pci_set_drvdata(pci, NULL); 3639 } 3640 3641 static struct pci_driver driver = { 3642 .name = "RME Hammerfall DSP MADI", 3643 .owner = THIS_MODULE, 3644 .id_table = snd_hdspm_ids, 3645 .probe = snd_hdspm_probe, 3646 .remove = __devexit_p(snd_hdspm_remove), 3647 }; 3648 3649 3650 static int __init alsa_card_hdspm_init(void) 3651 { 3652 return pci_register_driver(&driver); 3653 } 3654 3655 static void __exit alsa_card_hdspm_exit(void) 3656 { 3657 pci_unregister_driver(&driver); 3658 } 3659 3660 module_init(alsa_card_hdspm_init) 3661 module_exit(alsa_card_hdspm_exit) 3662