1 /* 2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) 3 * VIA VT1720 (Envy24PT) 4 * 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 6 * 2002 James Stafford <jstafford@ampltd.com> 7 * 2003 Takashi Iwai <tiwai@suse.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 */ 24 25 #include <linux/io.h> 26 #include <linux/delay.h> 27 #include <linux/interrupt.h> 28 #include <linux/init.h> 29 #include <linux/pci.h> 30 #include <linux/slab.h> 31 #include <linux/module.h> 32 #include <linux/mutex.h> 33 #include <sound/core.h> 34 #include <sound/info.h> 35 #include <sound/rawmidi.h> 36 #include <sound/initval.h> 37 38 #include <sound/asoundef.h> 39 40 #include "ice1712.h" 41 #include "envy24ht.h" 42 43 /* lowlevel routines */ 44 #include "amp.h" 45 #include "revo.h" 46 #include "aureon.h" 47 #include "vt1720_mobo.h" 48 #include "pontis.h" 49 #include "prodigy192.h" 50 #include "prodigy_hifi.h" 51 #include "juli.h" 52 #include "maya44.h" 53 #include "phase.h" 54 #include "wtm.h" 55 #include "se.h" 56 #include "quartet.h" 57 58 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 59 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); 60 MODULE_LICENSE("GPL"); 61 MODULE_SUPPORTED_DEVICE("{" 62 REVO_DEVICE_DESC 63 AMP_AUDIO2000_DEVICE_DESC 64 AUREON_DEVICE_DESC 65 VT1720_MOBO_DEVICE_DESC 66 PONTIS_DEVICE_DESC 67 PRODIGY192_DEVICE_DESC 68 PRODIGY_HIFI_DEVICE_DESC 69 JULI_DEVICE_DESC 70 MAYA44_DEVICE_DESC 71 PHASE_DEVICE_DESC 72 WTM_DEVICE_DESC 73 SE_DEVICE_DESC 74 QTET_DEVICE_DESC 75 "{VIA,VT1720}," 76 "{VIA,VT1724}," 77 "{ICEnsemble,Generic ICE1724}," 78 "{ICEnsemble,Generic Envy24HT}" 79 "{ICEnsemble,Generic Envy24PT}}"); 80 81 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 82 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 83 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 84 static char *model[SNDRV_CARDS]; 85 86 module_param_array(index, int, NULL, 0444); 87 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); 88 module_param_array(id, charp, NULL, 0444); 89 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); 90 module_param_array(enable, bool, NULL, 0444); 91 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); 92 module_param_array(model, charp, NULL, 0444); 93 MODULE_PARM_DESC(model, "Use the given board model."); 94 95 96 /* Both VT1720 and VT1724 have the same PCI IDs */ 97 static DEFINE_PCI_DEVICE_TABLE(snd_vt1724_ids) = { 98 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 }, 99 { 0, } 100 }; 101 102 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); 103 104 105 static int PRO_RATE_LOCKED; 106 static int PRO_RATE_RESET = 1; 107 static unsigned int PRO_RATE_DEFAULT = 44100; 108 109 static char *ext_clock_names[1] = { "IEC958 In" }; 110 111 /* 112 * Basic I/O 113 */ 114 115 /* 116 * default rates, default clock routines 117 */ 118 119 /* check whether the clock mode is spdif-in */ 120 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice) 121 { 122 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 123 } 124 125 /* 126 * locking rate makes sense only for internal clock mode 127 */ 128 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 129 { 130 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED; 131 } 132 133 /* 134 * ac97 section 135 */ 136 137 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) 138 { 139 unsigned char old_cmd; 140 int tm; 141 for (tm = 0; tm < 0x10000; tm++) { 142 old_cmd = inb(ICEMT1724(ice, AC97_CMD)); 143 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) 144 continue; 145 if (!(old_cmd & VT1724_AC97_READY)) 146 continue; 147 return old_cmd; 148 } 149 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n"); 150 return old_cmd; 151 } 152 153 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) 154 { 155 int tm; 156 for (tm = 0; tm < 0x10000; tm++) 157 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) 158 return 0; 159 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n"); 160 return -EIO; 161 } 162 163 static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, 164 unsigned short reg, 165 unsigned short val) 166 { 167 struct snd_ice1712 *ice = ac97->private_data; 168 unsigned char old_cmd; 169 170 old_cmd = snd_vt1724_ac97_ready(ice); 171 old_cmd &= ~VT1724_AC97_ID_MASK; 172 old_cmd |= ac97->num; 173 outb(reg, ICEMT1724(ice, AC97_INDEX)); 174 outw(val, ICEMT1724(ice, AC97_DATA)); 175 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); 176 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); 177 } 178 179 static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 180 { 181 struct snd_ice1712 *ice = ac97->private_data; 182 unsigned char old_cmd; 183 184 old_cmd = snd_vt1724_ac97_ready(ice); 185 old_cmd &= ~VT1724_AC97_ID_MASK; 186 old_cmd |= ac97->num; 187 outb(reg, ICEMT1724(ice, AC97_INDEX)); 188 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); 189 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) 190 return ~0; 191 return inw(ICEMT1724(ice, AC97_DATA)); 192 } 193 194 195 /* 196 * GPIO operations 197 */ 198 199 /* set gpio direction 0 = read, 1 = write */ 200 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 201 { 202 outl(data, ICEREG1724(ice, GPIO_DIRECTION)); 203 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ 204 } 205 206 /* get gpio direction 0 = read, 1 = write */ 207 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice) 208 { 209 return inl(ICEREG1724(ice, GPIO_DIRECTION)); 210 } 211 212 /* set the gpio mask (0 = writable) */ 213 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 214 { 215 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); 216 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */ 217 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); 218 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ 219 } 220 221 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice) 222 { 223 unsigned int mask; 224 if (!ice->vt1720) 225 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22)); 226 else 227 mask = 0; 228 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); 229 return mask; 230 } 231 232 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) 233 { 234 outw(data, ICEREG1724(ice, GPIO_DATA)); 235 if (!ice->vt1720) 236 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); 237 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ 238 } 239 240 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) 241 { 242 unsigned int data; 243 if (!ice->vt1720) 244 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); 245 else 246 data = 0; 247 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); 248 return data; 249 } 250 251 /* 252 * MIDI 253 */ 254 255 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice) 256 { 257 unsigned int count; 258 259 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count) 260 inb(ICEREG1724(ice, MPU_DATA)); 261 } 262 263 static inline struct snd_rawmidi_substream * 264 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream) 265 { 266 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams, 267 struct snd_rawmidi_substream, list); 268 } 269 270 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable); 271 272 static void vt1724_midi_write(struct snd_ice1712 *ice) 273 { 274 struct snd_rawmidi_substream *s; 275 int count, i; 276 u8 buffer[32]; 277 278 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT); 279 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO)); 280 if (count > 0) { 281 count = snd_rawmidi_transmit(s, buffer, count); 282 for (i = 0; i < count; ++i) 283 outb(buffer[i], ICEREG1724(ice, MPU_DATA)); 284 } 285 /* mask irq when all bytes have been transmitted. 286 * enabled again in output_trigger when the new data comes in. 287 */ 288 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 289 !snd_rawmidi_transmit_empty(s)); 290 } 291 292 static void vt1724_midi_read(struct snd_ice1712 *ice) 293 { 294 struct snd_rawmidi_substream *s; 295 int count, i; 296 u8 buffer[32]; 297 298 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT); 299 count = inb(ICEREG1724(ice, MPU_RXFIFO)); 300 if (count > 0) { 301 count = min(count, 32); 302 for (i = 0; i < count; ++i) 303 buffer[i] = inb(ICEREG1724(ice, MPU_DATA)); 304 snd_rawmidi_receive(s, buffer, count); 305 } 306 } 307 308 /* call with ice->reg_lock */ 309 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable) 310 { 311 u8 mask = inb(ICEREG1724(ice, IRQMASK)); 312 if (enable) 313 mask &= ~flag; 314 else 315 mask |= flag; 316 outb(mask, ICEREG1724(ice, IRQMASK)); 317 } 318 319 static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream, 320 u8 flag, int enable) 321 { 322 struct snd_ice1712 *ice = substream->rmidi->private_data; 323 324 spin_lock_irq(&ice->reg_lock); 325 enable_midi_irq(ice, flag, enable); 326 spin_unlock_irq(&ice->reg_lock); 327 } 328 329 static int vt1724_midi_output_open(struct snd_rawmidi_substream *s) 330 { 331 return 0; 332 } 333 334 static int vt1724_midi_output_close(struct snd_rawmidi_substream *s) 335 { 336 return 0; 337 } 338 339 static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up) 340 { 341 struct snd_ice1712 *ice = s->rmidi->private_data; 342 unsigned long flags; 343 344 spin_lock_irqsave(&ice->reg_lock, flags); 345 if (up) { 346 ice->midi_output = 1; 347 vt1724_midi_write(ice); 348 } else { 349 ice->midi_output = 0; 350 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 351 } 352 spin_unlock_irqrestore(&ice->reg_lock, flags); 353 } 354 355 static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s) 356 { 357 struct snd_ice1712 *ice = s->rmidi->private_data; 358 unsigned long timeout; 359 360 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0); 361 /* 32 bytes should be transmitted in less than about 12 ms */ 362 timeout = jiffies + msecs_to_jiffies(15); 363 do { 364 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY) 365 break; 366 schedule_timeout_uninterruptible(1); 367 } while (time_after(timeout, jiffies)); 368 } 369 370 static struct snd_rawmidi_ops vt1724_midi_output_ops = { 371 .open = vt1724_midi_output_open, 372 .close = vt1724_midi_output_close, 373 .trigger = vt1724_midi_output_trigger, 374 .drain = vt1724_midi_output_drain, 375 }; 376 377 static int vt1724_midi_input_open(struct snd_rawmidi_substream *s) 378 { 379 vt1724_midi_clear_rx(s->rmidi->private_data); 380 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1); 381 return 0; 382 } 383 384 static int vt1724_midi_input_close(struct snd_rawmidi_substream *s) 385 { 386 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0); 387 return 0; 388 } 389 390 static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up) 391 { 392 struct snd_ice1712 *ice = s->rmidi->private_data; 393 unsigned long flags; 394 395 spin_lock_irqsave(&ice->reg_lock, flags); 396 if (up) { 397 ice->midi_input = 1; 398 vt1724_midi_read(ice); 399 } else { 400 ice->midi_input = 0; 401 } 402 spin_unlock_irqrestore(&ice->reg_lock, flags); 403 } 404 405 static struct snd_rawmidi_ops vt1724_midi_input_ops = { 406 .open = vt1724_midi_input_open, 407 .close = vt1724_midi_input_close, 408 .trigger = vt1724_midi_input_trigger, 409 }; 410 411 412 /* 413 * Interrupt handler 414 */ 415 416 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id) 417 { 418 struct snd_ice1712 *ice = dev_id; 419 unsigned char status; 420 unsigned char status_mask = 421 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM; 422 int handled = 0; 423 int timeout = 0; 424 425 while (1) { 426 status = inb(ICEREG1724(ice, IRQSTAT)); 427 status &= status_mask; 428 if (status == 0) 429 break; 430 spin_lock(&ice->reg_lock); 431 if (++timeout > 10) { 432 status = inb(ICEREG1724(ice, IRQSTAT)); 433 printk(KERN_ERR "ice1724: Too long irq loop, " 434 "status = 0x%x\n", status); 435 if (status & VT1724_IRQ_MPU_TX) { 436 printk(KERN_ERR "ice1724: Disabling MPU_TX\n"); 437 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 438 } 439 spin_unlock(&ice->reg_lock); 440 break; 441 } 442 handled = 1; 443 if (status & VT1724_IRQ_MPU_TX) { 444 if (ice->midi_output) 445 vt1724_midi_write(ice); 446 else 447 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 448 /* Due to mysterical reasons, MPU_TX is always 449 * generated (and can't be cleared) when a PCM 450 * playback is going. So let's ignore at the 451 * next loop. 452 */ 453 status_mask &= ~VT1724_IRQ_MPU_TX; 454 } 455 if (status & VT1724_IRQ_MPU_RX) { 456 if (ice->midi_input) 457 vt1724_midi_read(ice); 458 else 459 vt1724_midi_clear_rx(ice); 460 } 461 /* ack MPU irq */ 462 outb(status, ICEREG1724(ice, IRQSTAT)); 463 spin_unlock(&ice->reg_lock); 464 if (status & VT1724_IRQ_MTPCM) { 465 /* 466 * Multi-track PCM 467 * PCM assignment are: 468 * Playback DMA0 (M/C) = playback_pro_substream 469 * Playback DMA1 = playback_con_substream_ds[0] 470 * Playback DMA2 = playback_con_substream_ds[1] 471 * Playback DMA3 = playback_con_substream_ds[2] 472 * Playback DMA4 (SPDIF) = playback_con_substream 473 * Record DMA0 = capture_pro_substream 474 * Record DMA1 = capture_con_substream 475 */ 476 unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); 477 if (mtstat & VT1724_MULTI_PDMA0) { 478 if (ice->playback_pro_substream) 479 snd_pcm_period_elapsed(ice->playback_pro_substream); 480 } 481 if (mtstat & VT1724_MULTI_RDMA0) { 482 if (ice->capture_pro_substream) 483 snd_pcm_period_elapsed(ice->capture_pro_substream); 484 } 485 if (mtstat & VT1724_MULTI_PDMA1) { 486 if (ice->playback_con_substream_ds[0]) 487 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); 488 } 489 if (mtstat & VT1724_MULTI_PDMA2) { 490 if (ice->playback_con_substream_ds[1]) 491 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); 492 } 493 if (mtstat & VT1724_MULTI_PDMA3) { 494 if (ice->playback_con_substream_ds[2]) 495 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); 496 } 497 if (mtstat & VT1724_MULTI_PDMA4) { 498 if (ice->playback_con_substream) 499 snd_pcm_period_elapsed(ice->playback_con_substream); 500 } 501 if (mtstat & VT1724_MULTI_RDMA1) { 502 if (ice->capture_con_substream) 503 snd_pcm_period_elapsed(ice->capture_con_substream); 504 } 505 /* ack anyway to avoid freeze */ 506 outb(mtstat, ICEMT1724(ice, IRQ)); 507 /* ought to really handle this properly */ 508 if (mtstat & VT1724_MULTI_FIFO_ERR) { 509 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); 510 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); 511 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); 512 /* If I don't do this, I get machine lockup due to continual interrupts */ 513 } 514 515 } 516 } 517 return IRQ_RETVAL(handled); 518 } 519 520 /* 521 * PCM code - professional part (multitrack) 522 */ 523 524 static unsigned int rates[] = { 525 8000, 9600, 11025, 12000, 16000, 22050, 24000, 526 32000, 44100, 48000, 64000, 88200, 96000, 527 176400, 192000, 528 }; 529 530 static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { 531 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ 532 .list = rates, 533 .mask = 0, 534 }; 535 536 static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { 537 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ 538 .list = rates, 539 .mask = 0, 540 }; 541 542 static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { 543 .count = ARRAY_SIZE(rates), 544 .list = rates, 545 .mask = 0, 546 }; 547 548 struct vt1724_pcm_reg { 549 unsigned int addr; /* ADDR register offset */ 550 unsigned int size; /* SIZE register offset */ 551 unsigned int count; /* COUNT register offset */ 552 unsigned int start; /* start & pause bit */ 553 }; 554 555 static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 556 { 557 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 558 unsigned char what; 559 unsigned char old; 560 struct snd_pcm_substream *s; 561 562 what = 0; 563 snd_pcm_group_for_each_entry(s, substream) { 564 if (snd_pcm_substream_chip(s) == ice) { 565 const struct vt1724_pcm_reg *reg; 566 reg = s->runtime->private_data; 567 what |= reg->start; 568 snd_pcm_trigger_done(s, substream); 569 } 570 } 571 572 switch (cmd) { 573 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 574 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 575 spin_lock(&ice->reg_lock); 576 old = inb(ICEMT1724(ice, DMA_PAUSE)); 577 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 578 old |= what; 579 else 580 old &= ~what; 581 outb(old, ICEMT1724(ice, DMA_PAUSE)); 582 spin_unlock(&ice->reg_lock); 583 break; 584 585 case SNDRV_PCM_TRIGGER_START: 586 case SNDRV_PCM_TRIGGER_STOP: 587 case SNDRV_PCM_TRIGGER_SUSPEND: 588 spin_lock(&ice->reg_lock); 589 old = inb(ICEMT1724(ice, DMA_CONTROL)); 590 if (cmd == SNDRV_PCM_TRIGGER_START) 591 old |= what; 592 else 593 old &= ~what; 594 outb(old, ICEMT1724(ice, DMA_CONTROL)); 595 spin_unlock(&ice->reg_lock); 596 break; 597 598 case SNDRV_PCM_TRIGGER_RESUME: 599 /* apps will have to restart stream */ 600 break; 601 602 default: 603 return -EINVAL; 604 } 605 return 0; 606 } 607 608 /* 609 */ 610 611 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ 612 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) 613 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 614 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 615 616 static const unsigned int stdclock_rate_list[16] = { 617 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100, 618 22050, 11025, 88200, 176400, 0, 192000, 64000 619 }; 620 621 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice) 622 { 623 unsigned int rate; 624 rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15]; 625 return rate; 626 } 627 628 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate) 629 { 630 int i; 631 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) { 632 if (stdclock_rate_list[i] == rate) { 633 outb(i, ICEMT1724(ice, RATE)); 634 return; 635 } 636 } 637 } 638 639 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice, 640 unsigned int rate) 641 { 642 unsigned char val, old; 643 /* check MT02 */ 644 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 645 val = old = inb(ICEMT1724(ice, I2S_FORMAT)); 646 if (rate > 96000) 647 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ 648 else 649 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ 650 if (val != old) { 651 outb(val, ICEMT1724(ice, I2S_FORMAT)); 652 /* master clock changed */ 653 return 1; 654 } 655 } 656 /* no change in master clock */ 657 return 0; 658 } 659 660 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 661 int force) 662 { 663 unsigned long flags; 664 unsigned char mclk_change; 665 unsigned int i, old_rate; 666 667 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1]) 668 return -EINVAL; 669 670 spin_lock_irqsave(&ice->reg_lock, flags); 671 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 672 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 673 /* running? we cannot change the rate now... */ 674 spin_unlock_irqrestore(&ice->reg_lock, flags); 675 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY; 676 } 677 if (!force && is_pro_rate_locked(ice)) { 678 /* comparing required and current rate - makes sense for 679 * internal clock only */ 680 spin_unlock_irqrestore(&ice->reg_lock, flags); 681 return (rate == ice->cur_rate) ? 0 : -EBUSY; 682 } 683 684 if (force || !ice->is_spdif_master(ice)) { 685 /* force means the rate was switched by ucontrol, otherwise 686 * setting clock rate for internal clock mode */ 687 old_rate = ice->get_rate(ice); 688 if (force || (old_rate != rate)) 689 ice->set_rate(ice, rate); 690 else if (rate == ice->cur_rate) { 691 spin_unlock_irqrestore(&ice->reg_lock, flags); 692 return 0; 693 } 694 } 695 696 ice->cur_rate = rate; 697 698 /* setting master clock */ 699 mclk_change = ice->set_mclk(ice, rate); 700 701 spin_unlock_irqrestore(&ice->reg_lock, flags); 702 703 if (mclk_change && ice->gpio.i2s_mclk_changed) 704 ice->gpio.i2s_mclk_changed(ice); 705 if (ice->gpio.set_pro_rate) 706 ice->gpio.set_pro_rate(ice, rate); 707 708 /* set up codecs */ 709 for (i = 0; i < ice->akm_codecs; i++) { 710 if (ice->akm[i].ops.set_rate_val) 711 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 712 } 713 if (ice->spdif.ops.setup_rate) 714 ice->spdif.ops.setup_rate(ice, rate); 715 716 return 0; 717 } 718 719 static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, 720 struct snd_pcm_hw_params *hw_params) 721 { 722 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 723 int i, chs, err; 724 725 chs = params_channels(hw_params); 726 mutex_lock(&ice->open_mutex); 727 /* mark surround channels */ 728 if (substream == ice->playback_pro_substream) { 729 /* PDMA0 can be multi-channel up to 8 */ 730 chs = chs / 2 - 1; 731 for (i = 0; i < chs; i++) { 732 if (ice->pcm_reserved[i] && 733 ice->pcm_reserved[i] != substream) { 734 mutex_unlock(&ice->open_mutex); 735 return -EBUSY; 736 } 737 ice->pcm_reserved[i] = substream; 738 } 739 for (; i < 3; i++) { 740 if (ice->pcm_reserved[i] == substream) 741 ice->pcm_reserved[i] = NULL; 742 } 743 } else { 744 for (i = 0; i < 3; i++) { 745 /* check individual playback stream */ 746 if (ice->playback_con_substream_ds[i] == substream) { 747 if (ice->pcm_reserved[i] && 748 ice->pcm_reserved[i] != substream) { 749 mutex_unlock(&ice->open_mutex); 750 return -EBUSY; 751 } 752 ice->pcm_reserved[i] = substream; 753 break; 754 } 755 } 756 } 757 mutex_unlock(&ice->open_mutex); 758 759 err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); 760 if (err < 0) 761 return err; 762 763 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 764 } 765 766 static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) 767 { 768 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 769 int i; 770 771 mutex_lock(&ice->open_mutex); 772 /* unmark surround channels */ 773 for (i = 0; i < 3; i++) 774 if (ice->pcm_reserved[i] == substream) 775 ice->pcm_reserved[i] = NULL; 776 mutex_unlock(&ice->open_mutex); 777 return snd_pcm_lib_free_pages(substream); 778 } 779 780 static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) 781 { 782 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 783 unsigned char val; 784 unsigned int size; 785 786 spin_lock_irq(&ice->reg_lock); 787 val = (8 - substream->runtime->channels) >> 1; 788 outb(val, ICEMT1724(ice, BURST)); 789 790 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); 791 792 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; 793 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */ 794 outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); 795 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); 796 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 797 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */ 798 outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); 799 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); 800 801 spin_unlock_irq(&ice->reg_lock); 802 803 /* 804 printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, " 805 "buffer = 0x%x, period = 0x%x\n", 806 substream->runtime->channels, 807 (unsigned int)substream->runtime->dma_addr, 808 snd_pcm_lib_buffer_bytes(substream), 809 snd_pcm_lib_period_bytes(substream)); 810 */ 811 return 0; 812 } 813 814 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) 815 { 816 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 817 size_t ptr; 818 819 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) 820 return 0; 821 #if 0 /* read PLAYBACK_ADDR */ 822 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); 823 if (ptr < substream->runtime->dma_addr) { 824 snd_printd("ice1724: invalid negative ptr\n"); 825 return 0; 826 } 827 ptr -= substream->runtime->dma_addr; 828 ptr = bytes_to_frames(substream->runtime, ptr); 829 if (ptr >= substream->runtime->buffer_size) { 830 snd_printd("ice1724: invalid ptr %d (size=%d)\n", 831 (int)ptr, (int)substream->runtime->period_size); 832 return 0; 833 } 834 #else /* read PLAYBACK_SIZE */ 835 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; 836 ptr = (ptr + 1) << 2; 837 ptr = bytes_to_frames(substream->runtime, ptr); 838 if (!ptr) 839 ; 840 else if (ptr <= substream->runtime->buffer_size) 841 ptr = substream->runtime->buffer_size - ptr; 842 else { 843 snd_printd("ice1724: invalid ptr %d (size=%d)\n", 844 (int)ptr, (int)substream->runtime->buffer_size); 845 ptr = 0; 846 } 847 #endif 848 return ptr; 849 } 850 851 static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) 852 { 853 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 854 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 855 856 spin_lock_irq(&ice->reg_lock); 857 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); 858 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, 859 ice->profi_port + reg->size); 860 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, 861 ice->profi_port + reg->count); 862 spin_unlock_irq(&ice->reg_lock); 863 return 0; 864 } 865 866 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) 867 { 868 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 869 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 870 size_t ptr; 871 872 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) 873 return 0; 874 #if 0 /* use ADDR register */ 875 ptr = inl(ice->profi_port + reg->addr); 876 ptr -= substream->runtime->dma_addr; 877 return bytes_to_frames(substream->runtime, ptr); 878 #else /* use SIZE register */ 879 ptr = inw(ice->profi_port + reg->size); 880 ptr = (ptr + 1) << 2; 881 ptr = bytes_to_frames(substream->runtime, ptr); 882 if (!ptr) 883 ; 884 else if (ptr <= substream->runtime->buffer_size) 885 ptr = substream->runtime->buffer_size - ptr; 886 else { 887 snd_printd("ice1724: invalid ptr %d (size=%d)\n", 888 (int)ptr, (int)substream->runtime->buffer_size); 889 ptr = 0; 890 } 891 return ptr; 892 #endif 893 } 894 895 static const struct vt1724_pcm_reg vt1724_pdma0_reg = { 896 .addr = VT1724_MT_PLAYBACK_ADDR, 897 .size = VT1724_MT_PLAYBACK_SIZE, 898 .count = VT1724_MT_PLAYBACK_COUNT, 899 .start = VT1724_PDMA0_START, 900 }; 901 902 static const struct vt1724_pcm_reg vt1724_pdma4_reg = { 903 .addr = VT1724_MT_PDMA4_ADDR, 904 .size = VT1724_MT_PDMA4_SIZE, 905 .count = VT1724_MT_PDMA4_COUNT, 906 .start = VT1724_PDMA4_START, 907 }; 908 909 static const struct vt1724_pcm_reg vt1724_rdma0_reg = { 910 .addr = VT1724_MT_CAPTURE_ADDR, 911 .size = VT1724_MT_CAPTURE_SIZE, 912 .count = VT1724_MT_CAPTURE_COUNT, 913 .start = VT1724_RDMA0_START, 914 }; 915 916 static const struct vt1724_pcm_reg vt1724_rdma1_reg = { 917 .addr = VT1724_MT_RDMA1_ADDR, 918 .size = VT1724_MT_RDMA1_SIZE, 919 .count = VT1724_MT_RDMA1_COUNT, 920 .start = VT1724_RDMA1_START, 921 }; 922 923 #define vt1724_playback_pro_reg vt1724_pdma0_reg 924 #define vt1724_playback_spdif_reg vt1724_pdma4_reg 925 #define vt1724_capture_pro_reg vt1724_rdma0_reg 926 #define vt1724_capture_spdif_reg vt1724_rdma1_reg 927 928 static const struct snd_pcm_hardware snd_vt1724_playback_pro = { 929 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 930 SNDRV_PCM_INFO_BLOCK_TRANSFER | 931 SNDRV_PCM_INFO_MMAP_VALID | 932 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 933 .formats = SNDRV_PCM_FMTBIT_S32_LE, 934 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 935 .rate_min = 8000, 936 .rate_max = 192000, 937 .channels_min = 2, 938 .channels_max = 8, 939 .buffer_bytes_max = (1UL << 21), /* 19bits dword */ 940 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ 941 .period_bytes_max = (1UL << 21), 942 .periods_min = 2, 943 .periods_max = 1024, 944 }; 945 946 static const struct snd_pcm_hardware snd_vt1724_spdif = { 947 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 948 SNDRV_PCM_INFO_BLOCK_TRANSFER | 949 SNDRV_PCM_INFO_MMAP_VALID | 950 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 951 .formats = SNDRV_PCM_FMTBIT_S32_LE, 952 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| 953 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| 954 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| 955 SNDRV_PCM_RATE_192000), 956 .rate_min = 32000, 957 .rate_max = 192000, 958 .channels_min = 2, 959 .channels_max = 2, 960 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 961 .period_bytes_min = 2 * 4 * 2, 962 .period_bytes_max = (1UL << 18), 963 .periods_min = 2, 964 .periods_max = 1024, 965 }; 966 967 static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = { 968 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 969 SNDRV_PCM_INFO_BLOCK_TRANSFER | 970 SNDRV_PCM_INFO_MMAP_VALID | 971 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 972 .formats = SNDRV_PCM_FMTBIT_S32_LE, 973 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 974 .rate_min = 8000, 975 .rate_max = 192000, 976 .channels_min = 2, 977 .channels_max = 2, 978 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 979 .period_bytes_min = 2 * 4 * 2, 980 .period_bytes_max = (1UL << 18), 981 .periods_min = 2, 982 .periods_max = 1024, 983 }; 984 985 /* 986 * set rate constraints 987 */ 988 static void set_std_hw_rates(struct snd_ice1712 *ice) 989 { 990 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 991 /* I2S */ 992 /* VT1720 doesn't support more than 96kHz */ 993 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 994 ice->hw_rates = &hw_constraints_rates_192; 995 else 996 ice->hw_rates = &hw_constraints_rates_96; 997 } else { 998 /* ACLINK */ 999 ice->hw_rates = &hw_constraints_rates_48; 1000 } 1001 } 1002 1003 static int set_rate_constraints(struct snd_ice1712 *ice, 1004 struct snd_pcm_substream *substream) 1005 { 1006 struct snd_pcm_runtime *runtime = substream->runtime; 1007 1008 runtime->hw.rate_min = ice->hw_rates->list[0]; 1009 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; 1010 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 1011 return snd_pcm_hw_constraint_list(runtime, 0, 1012 SNDRV_PCM_HW_PARAM_RATE, 1013 ice->hw_rates); 1014 } 1015 1016 /* multi-channel playback needs alignment 8x32bit regardless of the channels 1017 * actually used 1018 */ 1019 #define VT1724_BUFFER_ALIGN 0x20 1020 1021 static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) 1022 { 1023 struct snd_pcm_runtime *runtime = substream->runtime; 1024 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1025 int chs, num_indeps; 1026 1027 runtime->private_data = (void *)&vt1724_playback_pro_reg; 1028 ice->playback_pro_substream = substream; 1029 runtime->hw = snd_vt1724_playback_pro; 1030 snd_pcm_set_sync(substream); 1031 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1032 set_rate_constraints(ice, substream); 1033 mutex_lock(&ice->open_mutex); 1034 /* calculate the currently available channels */ 1035 num_indeps = ice->num_total_dacs / 2 - 1; 1036 for (chs = 0; chs < num_indeps; chs++) { 1037 if (ice->pcm_reserved[chs]) 1038 break; 1039 } 1040 chs = (chs + 1) * 2; 1041 runtime->hw.channels_max = chs; 1042 if (chs > 2) /* channels must be even */ 1043 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1044 mutex_unlock(&ice->open_mutex); 1045 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1046 VT1724_BUFFER_ALIGN); 1047 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1048 VT1724_BUFFER_ALIGN); 1049 if (ice->pro_open) 1050 ice->pro_open(ice, substream); 1051 return 0; 1052 } 1053 1054 static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) 1055 { 1056 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1057 struct snd_pcm_runtime *runtime = substream->runtime; 1058 1059 runtime->private_data = (void *)&vt1724_capture_pro_reg; 1060 ice->capture_pro_substream = substream; 1061 runtime->hw = snd_vt1724_2ch_stereo; 1062 snd_pcm_set_sync(substream); 1063 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1064 set_rate_constraints(ice, substream); 1065 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1066 VT1724_BUFFER_ALIGN); 1067 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1068 VT1724_BUFFER_ALIGN); 1069 if (ice->pro_open) 1070 ice->pro_open(ice, substream); 1071 return 0; 1072 } 1073 1074 static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) 1075 { 1076 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1077 1078 if (PRO_RATE_RESET) 1079 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1080 ice->playback_pro_substream = NULL; 1081 1082 return 0; 1083 } 1084 1085 static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) 1086 { 1087 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1088 1089 if (PRO_RATE_RESET) 1090 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1091 ice->capture_pro_substream = NULL; 1092 return 0; 1093 } 1094 1095 static struct snd_pcm_ops snd_vt1724_playback_pro_ops = { 1096 .open = snd_vt1724_playback_pro_open, 1097 .close = snd_vt1724_playback_pro_close, 1098 .ioctl = snd_pcm_lib_ioctl, 1099 .hw_params = snd_vt1724_pcm_hw_params, 1100 .hw_free = snd_vt1724_pcm_hw_free, 1101 .prepare = snd_vt1724_playback_pro_prepare, 1102 .trigger = snd_vt1724_pcm_trigger, 1103 .pointer = snd_vt1724_playback_pro_pointer, 1104 }; 1105 1106 static struct snd_pcm_ops snd_vt1724_capture_pro_ops = { 1107 .open = snd_vt1724_capture_pro_open, 1108 .close = snd_vt1724_capture_pro_close, 1109 .ioctl = snd_pcm_lib_ioctl, 1110 .hw_params = snd_vt1724_pcm_hw_params, 1111 .hw_free = snd_vt1724_pcm_hw_free, 1112 .prepare = snd_vt1724_pcm_prepare, 1113 .trigger = snd_vt1724_pcm_trigger, 1114 .pointer = snd_vt1724_pcm_pointer, 1115 }; 1116 1117 static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device) 1118 { 1119 struct snd_pcm *pcm; 1120 int capt, err; 1121 1122 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) == 1123 VT1724_CFG_ADC_NONE) 1124 capt = 0; 1125 else 1126 capt = 1; 1127 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm); 1128 if (err < 0) 1129 return err; 1130 1131 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); 1132 if (capt) 1133 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1134 &snd_vt1724_capture_pro_ops); 1135 1136 pcm->private_data = ice; 1137 pcm->info_flags = 0; 1138 strcpy(pcm->name, "ICE1724"); 1139 1140 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1141 snd_dma_pci_data(ice->pci), 1142 256*1024, 256*1024); 1143 1144 ice->pcm_pro = pcm; 1145 1146 return 0; 1147 } 1148 1149 1150 /* 1151 * SPDIF PCM 1152 */ 1153 1154 /* update spdif control bits; call with reg_lock */ 1155 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) 1156 { 1157 unsigned char cbit, disabled; 1158 1159 cbit = inb(ICEREG1724(ice, SPDIF_CFG)); 1160 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; 1161 if (cbit != disabled) 1162 outb(disabled, ICEREG1724(ice, SPDIF_CFG)); 1163 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1164 if (cbit != disabled) 1165 outb(cbit, ICEREG1724(ice, SPDIF_CFG)); 1166 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1167 } 1168 1169 /* update SPDIF control bits according to the given rate */ 1170 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) 1171 { 1172 unsigned int val, nval; 1173 unsigned long flags; 1174 1175 spin_lock_irqsave(&ice->reg_lock, flags); 1176 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1177 nval &= ~(7 << 12); 1178 switch (rate) { 1179 case 44100: break; 1180 case 48000: nval |= 2 << 12; break; 1181 case 32000: nval |= 3 << 12; break; 1182 case 88200: nval |= 4 << 12; break; 1183 case 96000: nval |= 5 << 12; break; 1184 case 192000: nval |= 6 << 12; break; 1185 case 176400: nval |= 7 << 12; break; 1186 } 1187 if (val != nval) 1188 update_spdif_bits(ice, nval); 1189 spin_unlock_irqrestore(&ice->reg_lock, flags); 1190 } 1191 1192 static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) 1193 { 1194 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1195 if (!ice->force_pdma4) 1196 update_spdif_rate(ice, substream->runtime->rate); 1197 return snd_vt1724_pcm_prepare(substream); 1198 } 1199 1200 static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) 1201 { 1202 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1203 struct snd_pcm_runtime *runtime = substream->runtime; 1204 1205 runtime->private_data = (void *)&vt1724_playback_spdif_reg; 1206 ice->playback_con_substream = substream; 1207 if (ice->force_pdma4) { 1208 runtime->hw = snd_vt1724_2ch_stereo; 1209 set_rate_constraints(ice, substream); 1210 } else 1211 runtime->hw = snd_vt1724_spdif; 1212 snd_pcm_set_sync(substream); 1213 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1214 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1215 VT1724_BUFFER_ALIGN); 1216 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1217 VT1724_BUFFER_ALIGN); 1218 if (ice->spdif.ops.open) 1219 ice->spdif.ops.open(ice, substream); 1220 return 0; 1221 } 1222 1223 static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) 1224 { 1225 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1226 1227 if (PRO_RATE_RESET) 1228 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1229 ice->playback_con_substream = NULL; 1230 if (ice->spdif.ops.close) 1231 ice->spdif.ops.close(ice, substream); 1232 1233 return 0; 1234 } 1235 1236 static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) 1237 { 1238 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1239 struct snd_pcm_runtime *runtime = substream->runtime; 1240 1241 runtime->private_data = (void *)&vt1724_capture_spdif_reg; 1242 ice->capture_con_substream = substream; 1243 if (ice->force_rdma1) { 1244 runtime->hw = snd_vt1724_2ch_stereo; 1245 set_rate_constraints(ice, substream); 1246 } else 1247 runtime->hw = snd_vt1724_spdif; 1248 snd_pcm_set_sync(substream); 1249 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1250 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1251 VT1724_BUFFER_ALIGN); 1252 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1253 VT1724_BUFFER_ALIGN); 1254 if (ice->spdif.ops.open) 1255 ice->spdif.ops.open(ice, substream); 1256 return 0; 1257 } 1258 1259 static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) 1260 { 1261 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1262 1263 if (PRO_RATE_RESET) 1264 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1265 ice->capture_con_substream = NULL; 1266 if (ice->spdif.ops.close) 1267 ice->spdif.ops.close(ice, substream); 1268 1269 return 0; 1270 } 1271 1272 static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { 1273 .open = snd_vt1724_playback_spdif_open, 1274 .close = snd_vt1724_playback_spdif_close, 1275 .ioctl = snd_pcm_lib_ioctl, 1276 .hw_params = snd_vt1724_pcm_hw_params, 1277 .hw_free = snd_vt1724_pcm_hw_free, 1278 .prepare = snd_vt1724_playback_spdif_prepare, 1279 .trigger = snd_vt1724_pcm_trigger, 1280 .pointer = snd_vt1724_pcm_pointer, 1281 }; 1282 1283 static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { 1284 .open = snd_vt1724_capture_spdif_open, 1285 .close = snd_vt1724_capture_spdif_close, 1286 .ioctl = snd_pcm_lib_ioctl, 1287 .hw_params = snd_vt1724_pcm_hw_params, 1288 .hw_free = snd_vt1724_pcm_hw_free, 1289 .prepare = snd_vt1724_pcm_prepare, 1290 .trigger = snd_vt1724_pcm_trigger, 1291 .pointer = snd_vt1724_pcm_pointer, 1292 }; 1293 1294 1295 static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device) 1296 { 1297 char *name; 1298 struct snd_pcm *pcm; 1299 int play, capt; 1300 int err; 1301 1302 if (ice->force_pdma4 || 1303 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { 1304 play = 1; 1305 ice->has_spdif = 1; 1306 } else 1307 play = 0; 1308 if (ice->force_rdma1 || 1309 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { 1310 capt = 1; 1311 ice->has_spdif = 1; 1312 } else 1313 capt = 0; 1314 if (!play && !capt) 1315 return 0; /* no spdif device */ 1316 1317 if (ice->force_pdma4 || ice->force_rdma1) 1318 name = "ICE1724 Secondary"; 1319 else 1320 name = "ICE1724 IEC958"; 1321 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); 1322 if (err < 0) 1323 return err; 1324 1325 if (play) 1326 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1327 &snd_vt1724_playback_spdif_ops); 1328 if (capt) 1329 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1330 &snd_vt1724_capture_spdif_ops); 1331 1332 pcm->private_data = ice; 1333 pcm->info_flags = 0; 1334 strcpy(pcm->name, name); 1335 1336 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1337 snd_dma_pci_data(ice->pci), 1338 256*1024, 256*1024); 1339 1340 ice->pcm = pcm; 1341 1342 return 0; 1343 } 1344 1345 1346 /* 1347 * independent surround PCMs 1348 */ 1349 1350 static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { 1351 { 1352 .addr = VT1724_MT_PDMA1_ADDR, 1353 .size = VT1724_MT_PDMA1_SIZE, 1354 .count = VT1724_MT_PDMA1_COUNT, 1355 .start = VT1724_PDMA1_START, 1356 }, 1357 { 1358 .addr = VT1724_MT_PDMA2_ADDR, 1359 .size = VT1724_MT_PDMA2_SIZE, 1360 .count = VT1724_MT_PDMA2_COUNT, 1361 .start = VT1724_PDMA2_START, 1362 }, 1363 { 1364 .addr = VT1724_MT_PDMA3_ADDR, 1365 .size = VT1724_MT_PDMA3_SIZE, 1366 .count = VT1724_MT_PDMA3_COUNT, 1367 .start = VT1724_PDMA3_START, 1368 }, 1369 }; 1370 1371 static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) 1372 { 1373 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1374 unsigned char val; 1375 1376 spin_lock_irq(&ice->reg_lock); 1377 val = 3 - substream->number; 1378 if (inb(ICEMT1724(ice, BURST)) < val) 1379 outb(val, ICEMT1724(ice, BURST)); 1380 spin_unlock_irq(&ice->reg_lock); 1381 return snd_vt1724_pcm_prepare(substream); 1382 } 1383 1384 static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) 1385 { 1386 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1387 struct snd_pcm_runtime *runtime = substream->runtime; 1388 1389 mutex_lock(&ice->open_mutex); 1390 /* already used by PDMA0? */ 1391 if (ice->pcm_reserved[substream->number]) { 1392 mutex_unlock(&ice->open_mutex); 1393 return -EBUSY; /* FIXME: should handle blocking mode properly */ 1394 } 1395 mutex_unlock(&ice->open_mutex); 1396 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number]; 1397 ice->playback_con_substream_ds[substream->number] = substream; 1398 runtime->hw = snd_vt1724_2ch_stereo; 1399 snd_pcm_set_sync(substream); 1400 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1401 set_rate_constraints(ice, substream); 1402 return 0; 1403 } 1404 1405 static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) 1406 { 1407 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1408 1409 if (PRO_RATE_RESET) 1410 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1411 ice->playback_con_substream_ds[substream->number] = NULL; 1412 ice->pcm_reserved[substream->number] = NULL; 1413 1414 return 0; 1415 } 1416 1417 static struct snd_pcm_ops snd_vt1724_playback_indep_ops = { 1418 .open = snd_vt1724_playback_indep_open, 1419 .close = snd_vt1724_playback_indep_close, 1420 .ioctl = snd_pcm_lib_ioctl, 1421 .hw_params = snd_vt1724_pcm_hw_params, 1422 .hw_free = snd_vt1724_pcm_hw_free, 1423 .prepare = snd_vt1724_playback_indep_prepare, 1424 .trigger = snd_vt1724_pcm_trigger, 1425 .pointer = snd_vt1724_pcm_pointer, 1426 }; 1427 1428 1429 static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device) 1430 { 1431 struct snd_pcm *pcm; 1432 int play; 1433 int err; 1434 1435 play = ice->num_total_dacs / 2 - 1; 1436 if (play <= 0) 1437 return 0; 1438 1439 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); 1440 if (err < 0) 1441 return err; 1442 1443 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1444 &snd_vt1724_playback_indep_ops); 1445 1446 pcm->private_data = ice; 1447 pcm->info_flags = 0; 1448 strcpy(pcm->name, "ICE1724 Surround PCM"); 1449 1450 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1451 snd_dma_pci_data(ice->pci), 1452 256*1024, 256*1024); 1453 1454 ice->pcm_ds = pcm; 1455 1456 return 0; 1457 } 1458 1459 1460 /* 1461 * Mixer section 1462 */ 1463 1464 static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice) 1465 { 1466 int err; 1467 1468 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { 1469 struct snd_ac97_bus *pbus; 1470 struct snd_ac97_template ac97; 1471 static struct snd_ac97_bus_ops ops = { 1472 .write = snd_vt1724_ac97_write, 1473 .read = snd_vt1724_ac97_read, 1474 }; 1475 1476 /* cold reset */ 1477 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 1478 mdelay(5); /* FIXME */ 1479 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 1480 1481 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus); 1482 if (err < 0) 1483 return err; 1484 memset(&ac97, 0, sizeof(ac97)); 1485 ac97.private_data = ice; 1486 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1487 if (err < 0) 1488 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n"); 1489 else 1490 return 0; 1491 } 1492 /* I2S mixer only */ 1493 strcat(ice->card->mixername, "ICE1724 - multitrack"); 1494 return 0; 1495 } 1496 1497 /* 1498 * 1499 */ 1500 1501 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) 1502 { 1503 return (unsigned int)ice->eeprom.data[idx] | \ 1504 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ 1505 ((unsigned int)ice->eeprom.data[idx + 2] << 16); 1506 } 1507 1508 static void snd_vt1724_proc_read(struct snd_info_entry *entry, 1509 struct snd_info_buffer *buffer) 1510 { 1511 struct snd_ice1712 *ice = entry->private_data; 1512 unsigned int idx; 1513 1514 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1515 snd_iprintf(buffer, "EEPROM:\n"); 1516 1517 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1518 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1519 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1520 snd_iprintf(buffer, " System Config : 0x%x\n", 1521 ice->eeprom.data[ICE_EEP2_SYSCONF]); 1522 snd_iprintf(buffer, " ACLink : 0x%x\n", 1523 ice->eeprom.data[ICE_EEP2_ACLINK]); 1524 snd_iprintf(buffer, " I2S : 0x%x\n", 1525 ice->eeprom.data[ICE_EEP2_I2S]); 1526 snd_iprintf(buffer, " S/PDIF : 0x%x\n", 1527 ice->eeprom.data[ICE_EEP2_SPDIF]); 1528 snd_iprintf(buffer, " GPIO direction : 0x%x\n", 1529 ice->eeprom.gpiodir); 1530 snd_iprintf(buffer, " GPIO mask : 0x%x\n", 1531 ice->eeprom.gpiomask); 1532 snd_iprintf(buffer, " GPIO state : 0x%x\n", 1533 ice->eeprom.gpiostate); 1534 for (idx = 0x12; idx < ice->eeprom.size; idx++) 1535 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", 1536 idx, ice->eeprom.data[idx]); 1537 1538 snd_iprintf(buffer, "\nRegisters:\n"); 1539 1540 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", 1541 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); 1542 for (idx = 0x0; idx < 0x20 ; idx++) 1543 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", 1544 idx, inb(ice->port+idx)); 1545 for (idx = 0x0; idx < 0x30 ; idx++) 1546 snd_iprintf(buffer, " MT%02x : 0x%02x\n", 1547 idx, inb(ice->profi_port+idx)); 1548 } 1549 1550 static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice) 1551 { 1552 struct snd_info_entry *entry; 1553 1554 if (!snd_card_proc_new(ice->card, "ice1724", &entry)) 1555 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read); 1556 } 1557 1558 /* 1559 * 1560 */ 1561 1562 static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, 1563 struct snd_ctl_elem_info *uinfo) 1564 { 1565 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1566 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1567 return 0; 1568 } 1569 1570 static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, 1571 struct snd_ctl_elem_value *ucontrol) 1572 { 1573 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1574 1575 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1576 return 0; 1577 } 1578 1579 static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = { 1580 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1581 .name = "ICE1724 EEPROM", 1582 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1583 .info = snd_vt1724_eeprom_info, 1584 .get = snd_vt1724_eeprom_get 1585 }; 1586 1587 /* 1588 */ 1589 static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, 1590 struct snd_ctl_elem_info *uinfo) 1591 { 1592 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1593 uinfo->count = 1; 1594 return 0; 1595 } 1596 1597 static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) 1598 { 1599 unsigned int val, rbits; 1600 1601 val = diga->status[0] & 0x03; /* professional, non-audio */ 1602 if (val & 0x01) { 1603 /* professional */ 1604 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == 1605 IEC958_AES0_PRO_EMPHASIS_5015) 1606 val |= 1U << 3; 1607 rbits = (diga->status[4] >> 3) & 0x0f; 1608 if (rbits) { 1609 switch (rbits) { 1610 case 2: val |= 5 << 12; break; /* 96k */ 1611 case 3: val |= 6 << 12; break; /* 192k */ 1612 case 10: val |= 4 << 12; break; /* 88.2k */ 1613 case 11: val |= 7 << 12; break; /* 176.4k */ 1614 } 1615 } else { 1616 switch (diga->status[0] & IEC958_AES0_PRO_FS) { 1617 case IEC958_AES0_PRO_FS_44100: 1618 break; 1619 case IEC958_AES0_PRO_FS_32000: 1620 val |= 3U << 12; 1621 break; 1622 default: 1623 val |= 2U << 12; 1624 break; 1625 } 1626 } 1627 } else { 1628 /* consumer */ 1629 val |= diga->status[1] & 0x04; /* copyright */ 1630 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == 1631 IEC958_AES0_CON_EMPHASIS_5015) 1632 val |= 1U << 3; 1633 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ 1634 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ 1635 } 1636 return val; 1637 } 1638 1639 static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) 1640 { 1641 memset(diga->status, 0, sizeof(diga->status)); 1642 diga->status[0] = val & 0x03; /* professional, non-audio */ 1643 if (val & 0x01) { 1644 /* professional */ 1645 if (val & (1U << 3)) 1646 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; 1647 switch ((val >> 12) & 0x7) { 1648 case 0: 1649 break; 1650 case 2: 1651 diga->status[0] |= IEC958_AES0_PRO_FS_32000; 1652 break; 1653 default: 1654 diga->status[0] |= IEC958_AES0_PRO_FS_48000; 1655 break; 1656 } 1657 } else { 1658 /* consumer */ 1659 diga->status[0] |= val & (1U << 2); /* copyright */ 1660 if (val & (1U << 3)) 1661 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; 1662 diga->status[1] |= (val >> 4) & 0x3f; /* category */ 1663 diga->status[3] |= (val >> 12) & 0x07; /* fs */ 1664 } 1665 } 1666 1667 static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, 1668 struct snd_ctl_elem_value *ucontrol) 1669 { 1670 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1671 unsigned int val; 1672 val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1673 decode_spdif_bits(&ucontrol->value.iec958, val); 1674 return 0; 1675 } 1676 1677 static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, 1678 struct snd_ctl_elem_value *ucontrol) 1679 { 1680 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1681 unsigned int val, old; 1682 1683 val = encode_spdif_bits(&ucontrol->value.iec958); 1684 spin_lock_irq(&ice->reg_lock); 1685 old = inw(ICEMT1724(ice, SPDIF_CTRL)); 1686 if (val != old) 1687 update_spdif_bits(ice, val); 1688 spin_unlock_irq(&ice->reg_lock); 1689 return val != old; 1690 } 1691 1692 static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata = 1693 { 1694 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1695 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1696 .info = snd_vt1724_spdif_info, 1697 .get = snd_vt1724_spdif_default_get, 1698 .put = snd_vt1724_spdif_default_put 1699 }; 1700 1701 static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1702 struct snd_ctl_elem_value *ucontrol) 1703 { 1704 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1705 IEC958_AES0_PROFESSIONAL | 1706 IEC958_AES0_CON_NOT_COPYRIGHT | 1707 IEC958_AES0_CON_EMPHASIS; 1708 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1709 IEC958_AES1_CON_CATEGORY; 1710 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1711 return 0; 1712 } 1713 1714 static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1715 struct snd_ctl_elem_value *ucontrol) 1716 { 1717 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1718 IEC958_AES0_PROFESSIONAL | 1719 IEC958_AES0_PRO_FS | 1720 IEC958_AES0_PRO_EMPHASIS; 1721 return 0; 1722 } 1723 1724 static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata = 1725 { 1726 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1727 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1728 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1729 .info = snd_vt1724_spdif_info, 1730 .get = snd_vt1724_spdif_maskc_get, 1731 }; 1732 1733 static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata = 1734 { 1735 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1736 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1737 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1738 .info = snd_vt1724_spdif_info, 1739 .get = snd_vt1724_spdif_maskp_get, 1740 }; 1741 1742 #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info 1743 1744 static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, 1745 struct snd_ctl_elem_value *ucontrol) 1746 { 1747 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1748 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & 1749 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; 1750 return 0; 1751 } 1752 1753 static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, 1754 struct snd_ctl_elem_value *ucontrol) 1755 { 1756 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1757 unsigned char old, val; 1758 1759 spin_lock_irq(&ice->reg_lock); 1760 old = val = inb(ICEREG1724(ice, SPDIF_CFG)); 1761 val &= ~VT1724_CFG_SPDIF_OUT_EN; 1762 if (ucontrol->value.integer.value[0]) 1763 val |= VT1724_CFG_SPDIF_OUT_EN; 1764 if (old != val) 1765 outb(val, ICEREG1724(ice, SPDIF_CFG)); 1766 spin_unlock_irq(&ice->reg_lock); 1767 return old != val; 1768 } 1769 1770 static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata = 1771 { 1772 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1773 /* FIXME: the following conflict with IEC958 Playback Route */ 1774 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */ 1775 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH), 1776 .info = snd_vt1724_spdif_sw_info, 1777 .get = snd_vt1724_spdif_sw_get, 1778 .put = snd_vt1724_spdif_sw_put 1779 }; 1780 1781 1782 #if 0 /* NOT USED YET */ 1783 /* 1784 * GPIO access from extern 1785 */ 1786 1787 #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info 1788 1789 int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, 1790 struct snd_ctl_elem_value *ucontrol) 1791 { 1792 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1793 int shift = kcontrol->private_value & 0xff; 1794 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1795 1796 snd_ice1712_save_gpio_status(ice); 1797 ucontrol->value.integer.value[0] = 1798 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; 1799 snd_ice1712_restore_gpio_status(ice); 1800 return 0; 1801 } 1802 1803 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1804 struct snd_ctl_elem_value *ucontrol) 1805 { 1806 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1807 int shift = kcontrol->private_value & 0xff; 1808 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1809 unsigned int val, nval; 1810 1811 if (kcontrol->private_value & (1 << 31)) 1812 return -EPERM; 1813 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; 1814 snd_ice1712_save_gpio_status(ice); 1815 val = snd_ice1712_gpio_read(ice); 1816 nval |= val & ~(1 << shift); 1817 if (val != nval) 1818 snd_ice1712_gpio_write(ice, nval); 1819 snd_ice1712_restore_gpio_status(ice); 1820 return val != nval; 1821 } 1822 #endif /* NOT USED YET */ 1823 1824 /* 1825 * rate 1826 */ 1827 static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1828 struct snd_ctl_elem_info *uinfo) 1829 { 1830 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1831 int hw_rates_count = ice->hw_rates->count; 1832 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1833 uinfo->count = 1; 1834 1835 /* internal clocks */ 1836 uinfo->value.enumerated.items = hw_rates_count; 1837 /* external clocks */ 1838 if (ice->force_rdma1 || 1839 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) 1840 uinfo->value.enumerated.items += ice->ext_clock_count; 1841 /* upper limit - keep at top */ 1842 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1843 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1844 if (uinfo->value.enumerated.item >= hw_rates_count) 1845 /* ext_clock items */ 1846 strcpy(uinfo->value.enumerated.name, 1847 ice->ext_clock_names[ 1848 uinfo->value.enumerated.item - hw_rates_count]); 1849 else 1850 /* int clock items */ 1851 sprintf(uinfo->value.enumerated.name, "%d", 1852 ice->hw_rates->list[uinfo->value.enumerated.item]); 1853 return 0; 1854 } 1855 1856 static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1857 struct snd_ctl_elem_value *ucontrol) 1858 { 1859 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1860 unsigned int i, rate; 1861 1862 spin_lock_irq(&ice->reg_lock); 1863 if (ice->is_spdif_master(ice)) { 1864 ucontrol->value.enumerated.item[0] = ice->hw_rates->count + 1865 ice->get_spdif_master_type(ice); 1866 } else { 1867 rate = ice->get_rate(ice); 1868 ucontrol->value.enumerated.item[0] = 0; 1869 for (i = 0; i < ice->hw_rates->count; i++) { 1870 if (ice->hw_rates->list[i] == rate) { 1871 ucontrol->value.enumerated.item[0] = i; 1872 break; 1873 } 1874 } 1875 } 1876 spin_unlock_irq(&ice->reg_lock); 1877 return 0; 1878 } 1879 1880 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice) 1881 { 1882 /* standard external clock - only single type - SPDIF IN */ 1883 return 0; 1884 } 1885 1886 /* setting clock to external - SPDIF */ 1887 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type) 1888 { 1889 unsigned char oval; 1890 unsigned char i2s_oval; 1891 oval = inb(ICEMT1724(ice, RATE)); 1892 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1893 /* setting 256fs */ 1894 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1895 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT)); 1896 return 0; 1897 } 1898 1899 1900 static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1901 struct snd_ctl_elem_value *ucontrol) 1902 { 1903 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1904 unsigned int old_rate, new_rate; 1905 unsigned int item = ucontrol->value.enumerated.item[0]; 1906 unsigned int first_ext_clock = ice->hw_rates->count; 1907 1908 if (item > first_ext_clock + ice->ext_clock_count - 1) 1909 return -EINVAL; 1910 1911 /* if rate = 0 => external clock */ 1912 spin_lock_irq(&ice->reg_lock); 1913 if (ice->is_spdif_master(ice)) 1914 old_rate = 0; 1915 else 1916 old_rate = ice->get_rate(ice); 1917 if (item >= first_ext_clock) { 1918 /* switching to external clock */ 1919 ice->set_spdif_clock(ice, item - first_ext_clock); 1920 new_rate = 0; 1921 } else { 1922 /* internal on-card clock */ 1923 new_rate = ice->hw_rates->list[item]; 1924 ice->pro_rate_default = new_rate; 1925 spin_unlock_irq(&ice->reg_lock); 1926 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 1927 spin_lock_irq(&ice->reg_lock); 1928 } 1929 spin_unlock_irq(&ice->reg_lock); 1930 1931 /* the first switch to the ext. clock mode? */ 1932 if (old_rate != new_rate && !new_rate) { 1933 /* notify akm chips as well */ 1934 unsigned int i; 1935 if (ice->gpio.set_pro_rate) 1936 ice->gpio.set_pro_rate(ice, 0); 1937 for (i = 0; i < ice->akm_codecs; i++) { 1938 if (ice->akm[i].ops.set_rate_val) 1939 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1940 } 1941 } 1942 return old_rate != new_rate; 1943 } 1944 1945 static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = { 1946 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1947 .name = "Multi Track Internal Clock", 1948 .info = snd_vt1724_pro_internal_clock_info, 1949 .get = snd_vt1724_pro_internal_clock_get, 1950 .put = snd_vt1724_pro_internal_clock_put 1951 }; 1952 1953 #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info 1954 1955 static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1956 struct snd_ctl_elem_value *ucontrol) 1957 { 1958 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1959 return 0; 1960 } 1961 1962 static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1963 struct snd_ctl_elem_value *ucontrol) 1964 { 1965 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1966 int change = 0, nval; 1967 1968 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1969 spin_lock_irq(&ice->reg_lock); 1970 change = PRO_RATE_LOCKED != nval; 1971 PRO_RATE_LOCKED = nval; 1972 spin_unlock_irq(&ice->reg_lock); 1973 return change; 1974 } 1975 1976 static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = { 1977 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1978 .name = "Multi Track Rate Locking", 1979 .info = snd_vt1724_pro_rate_locking_info, 1980 .get = snd_vt1724_pro_rate_locking_get, 1981 .put = snd_vt1724_pro_rate_locking_put 1982 }; 1983 1984 #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info 1985 1986 static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1987 struct snd_ctl_elem_value *ucontrol) 1988 { 1989 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; 1990 return 0; 1991 } 1992 1993 static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1994 struct snd_ctl_elem_value *ucontrol) 1995 { 1996 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1997 int change = 0, nval; 1998 1999 nval = ucontrol->value.integer.value[0] ? 1 : 0; 2000 spin_lock_irq(&ice->reg_lock); 2001 change = PRO_RATE_RESET != nval; 2002 PRO_RATE_RESET = nval; 2003 spin_unlock_irq(&ice->reg_lock); 2004 return change; 2005 } 2006 2007 static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = { 2008 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2009 .name = "Multi Track Rate Reset", 2010 .info = snd_vt1724_pro_rate_reset_info, 2011 .get = snd_vt1724_pro_rate_reset_get, 2012 .put = snd_vt1724_pro_rate_reset_put 2013 }; 2014 2015 2016 /* 2017 * routing 2018 */ 2019 static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, 2020 struct snd_ctl_elem_info *uinfo) 2021 { 2022 static char *texts[] = { 2023 "PCM Out", /* 0 */ 2024 "H/W In 0", "H/W In 1", /* 1-2 */ 2025 "IEC958 In L", "IEC958 In R", /* 3-4 */ 2026 }; 2027 2028 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2029 uinfo->count = 1; 2030 uinfo->value.enumerated.items = 5; 2031 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 2032 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 2033 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 2034 return 0; 2035 } 2036 2037 static inline int analog_route_shift(int idx) 2038 { 2039 return (idx % 2) * 12 + ((idx / 2) * 3) + 8; 2040 } 2041 2042 static inline int digital_route_shift(int idx) 2043 { 2044 return idx * 3; 2045 } 2046 2047 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift) 2048 { 2049 unsigned long val; 2050 unsigned char eitem; 2051 static const unsigned char xlate[8] = { 2052 0, 255, 1, 2, 255, 255, 3, 4, 2053 }; 2054 2055 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2056 val >>= shift; 2057 val &= 7; /* we now have 3 bits per output */ 2058 eitem = xlate[val]; 2059 if (eitem == 255) { 2060 snd_BUG(); 2061 return 0; 2062 } 2063 return eitem; 2064 } 2065 2066 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val, 2067 int shift) 2068 { 2069 unsigned int old_val, nval; 2070 int change; 2071 static const unsigned char xroute[8] = { 2072 0, /* PCM */ 2073 2, /* PSDIN0 Left */ 2074 3, /* PSDIN0 Right */ 2075 6, /* SPDIN Left */ 2076 7, /* SPDIN Right */ 2077 }; 2078 2079 nval = xroute[val % 5]; 2080 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2081 val &= ~(0x07 << shift); 2082 val |= nval << shift; 2083 change = val != old_val; 2084 if (change) 2085 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); 2086 return change; 2087 } 2088 2089 static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2090 struct snd_ctl_elem_value *ucontrol) 2091 { 2092 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2093 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2094 ucontrol->value.enumerated.item[0] = 2095 snd_ice1724_get_route_val(ice, analog_route_shift(idx)); 2096 return 0; 2097 } 2098 2099 static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2100 struct snd_ctl_elem_value *ucontrol) 2101 { 2102 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2103 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2104 return snd_ice1724_put_route_val(ice, 2105 ucontrol->value.enumerated.item[0], 2106 analog_route_shift(idx)); 2107 } 2108 2109 static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2110 struct snd_ctl_elem_value *ucontrol) 2111 { 2112 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2113 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2114 ucontrol->value.enumerated.item[0] = 2115 snd_ice1724_get_route_val(ice, digital_route_shift(idx)); 2116 return 0; 2117 } 2118 2119 static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2120 struct snd_ctl_elem_value *ucontrol) 2121 { 2122 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2123 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2124 return snd_ice1724_put_route_val(ice, 2125 ucontrol->value.enumerated.item[0], 2126 digital_route_shift(idx)); 2127 } 2128 2129 static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = 2130 { 2131 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2132 .name = "H/W Playback Route", 2133 .info = snd_vt1724_pro_route_info, 2134 .get = snd_vt1724_pro_route_analog_get, 2135 .put = snd_vt1724_pro_route_analog_put, 2136 }; 2137 2138 static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = { 2139 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2140 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2141 .info = snd_vt1724_pro_route_info, 2142 .get = snd_vt1724_pro_route_spdif_get, 2143 .put = snd_vt1724_pro_route_spdif_put, 2144 .count = 2, 2145 }; 2146 2147 2148 static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, 2149 struct snd_ctl_elem_info *uinfo) 2150 { 2151 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2152 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ 2153 uinfo->value.integer.min = 0; 2154 uinfo->value.integer.max = 255; 2155 return 0; 2156 } 2157 2158 static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, 2159 struct snd_ctl_elem_value *ucontrol) 2160 { 2161 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2162 int idx; 2163 2164 spin_lock_irq(&ice->reg_lock); 2165 for (idx = 0; idx < 22; idx++) { 2166 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); 2167 ucontrol->value.integer.value[idx] = 2168 inb(ICEMT1724(ice, MONITOR_PEAKDATA)); 2169 } 2170 spin_unlock_irq(&ice->reg_lock); 2171 return 0; 2172 } 2173 2174 static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = { 2175 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2176 .name = "Multi Track Peak", 2177 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2178 .info = snd_vt1724_pro_peak_info, 2179 .get = snd_vt1724_pro_peak_get 2180 }; 2181 2182 /* 2183 * 2184 */ 2185 2186 static struct snd_ice1712_card_info no_matched __devinitdata; 2187 2188 2189 /* 2190 ooAoo cards with no controls 2191 */ 2192 static unsigned char ooaoo_sq210_eeprom[] __devinitdata = { 2193 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC, 2194 1xDACs */ 2195 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 2196 [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */ 2197 [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */ 2198 [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */ 2199 [ICE_EEP2_GPIO_DIR1] = 0x00, 2200 [ICE_EEP2_GPIO_DIR2] = 0x00, 2201 [ICE_EEP2_GPIO_MASK] = 0xff, 2202 [ICE_EEP2_GPIO_MASK1] = 0xff, 2203 [ICE_EEP2_GPIO_MASK2] = 0xff, 2204 2205 [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */ 2206 [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW 2207 and GPIO15 always zero */ 2208 [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */ 2209 }; 2210 2211 2212 struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] __devinitdata = { 2213 { 2214 .name = "ooAoo SQ210a", 2215 .model = "sq210a", 2216 .eeprom_size = sizeof(ooaoo_sq210_eeprom), 2217 .eeprom_data = ooaoo_sq210_eeprom, 2218 }, 2219 { } /* terminator */ 2220 }; 2221 2222 static struct snd_ice1712_card_info *card_tables[] __devinitdata = { 2223 snd_vt1724_revo_cards, 2224 snd_vt1724_amp_cards, 2225 snd_vt1724_aureon_cards, 2226 snd_vt1720_mobo_cards, 2227 snd_vt1720_pontis_cards, 2228 snd_vt1724_prodigy_hifi_cards, 2229 snd_vt1724_prodigy192_cards, 2230 snd_vt1724_juli_cards, 2231 snd_vt1724_maya44_cards, 2232 snd_vt1724_phase_cards, 2233 snd_vt1724_wtm_cards, 2234 snd_vt1724_se_cards, 2235 snd_vt1724_qtet_cards, 2236 snd_vt1724_ooaoo_cards, 2237 NULL, 2238 }; 2239 2240 2241 /* 2242 */ 2243 2244 static void wait_i2c_busy(struct snd_ice1712 *ice) 2245 { 2246 int t = 0x10000; 2247 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) 2248 ; 2249 if (t == -1) 2250 printk(KERN_ERR "ice1724: i2c busy timeout\n"); 2251 } 2252 2253 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, 2254 unsigned char dev, unsigned char addr) 2255 { 2256 unsigned char val; 2257 2258 mutex_lock(&ice->i2c_mutex); 2259 wait_i2c_busy(ice); 2260 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2261 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2262 wait_i2c_busy(ice); 2263 val = inb(ICEREG1724(ice, I2C_DATA)); 2264 mutex_unlock(&ice->i2c_mutex); 2265 /* 2266 printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); 2267 */ 2268 return val; 2269 } 2270 2271 void snd_vt1724_write_i2c(struct snd_ice1712 *ice, 2272 unsigned char dev, unsigned char addr, unsigned char data) 2273 { 2274 mutex_lock(&ice->i2c_mutex); 2275 wait_i2c_busy(ice); 2276 /* 2277 printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); 2278 */ 2279 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2280 outb(data, ICEREG1724(ice, I2C_DATA)); 2281 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2282 wait_i2c_busy(ice); 2283 mutex_unlock(&ice->i2c_mutex); 2284 } 2285 2286 static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice, 2287 const char *modelname) 2288 { 2289 const int dev = 0xa0; /* EEPROM device address */ 2290 unsigned int i, size; 2291 struct snd_ice1712_card_info * const *tbl, *c; 2292 2293 if (!modelname || !*modelname) { 2294 ice->eeprom.subvendor = 0; 2295 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) 2296 ice->eeprom.subvendor = 2297 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | 2298 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | 2299 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | 2300 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); 2301 if (ice->eeprom.subvendor == 0 || 2302 ice->eeprom.subvendor == (unsigned int)-1) { 2303 /* invalid subvendor from EEPROM, try the PCI 2304 * subststem ID instead 2305 */ 2306 u16 vendor, device; 2307 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, 2308 &vendor); 2309 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2310 ice->eeprom.subvendor = 2311 ((unsigned int)swab16(vendor) << 16) | swab16(device); 2312 if (ice->eeprom.subvendor == 0 || 2313 ice->eeprom.subvendor == (unsigned int)-1) { 2314 printk(KERN_ERR "ice1724: No valid ID is found\n"); 2315 return -ENXIO; 2316 } 2317 } 2318 } 2319 for (tbl = card_tables; *tbl; tbl++) { 2320 for (c = *tbl; c->name; c++) { 2321 if (modelname && c->model && 2322 !strcmp(modelname, c->model)) { 2323 printk(KERN_INFO "ice1724: Using board model %s\n", 2324 c->name); 2325 ice->eeprom.subvendor = c->subvendor; 2326 } else if (c->subvendor != ice->eeprom.subvendor) 2327 continue; 2328 if (!c->eeprom_size || !c->eeprom_data) 2329 goto found; 2330 /* if the EEPROM is given by the driver, use it */ 2331 snd_printdd("using the defined eeprom..\n"); 2332 ice->eeprom.version = 2; 2333 ice->eeprom.size = c->eeprom_size + 6; 2334 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2335 goto read_skipped; 2336 } 2337 } 2338 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n", 2339 ice->eeprom.subvendor); 2340 2341 found: 2342 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); 2343 if (ice->eeprom.size < 6) 2344 ice->eeprom.size = 32; 2345 else if (ice->eeprom.size > 32) { 2346 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n", 2347 ice->eeprom.size); 2348 return -EIO; 2349 } 2350 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); 2351 if (ice->eeprom.version != 2) 2352 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n", 2353 ice->eeprom.version); 2354 size = ice->eeprom.size - 6; 2355 for (i = 0; i < size; i++) 2356 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); 2357 2358 read_skipped: 2359 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); 2360 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); 2361 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); 2362 2363 return 0; 2364 } 2365 2366 2367 2368 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice) 2369 { 2370 outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); 2371 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2372 msleep(10); 2373 outb(0, ICEREG1724(ice, CONTROL)); 2374 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2375 msleep(10); 2376 } 2377 2378 static int snd_vt1724_chip_init(struct snd_ice1712 *ice) 2379 { 2380 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); 2381 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); 2382 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); 2383 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); 2384 2385 ice->gpio.write_mask = ice->eeprom.gpiomask; 2386 ice->gpio.direction = ice->eeprom.gpiodir; 2387 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); 2388 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); 2389 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); 2390 2391 outb(0, ICEREG1724(ice, POWERDOWN)); 2392 2393 /* MPU_RX and TX irq masks are cleared later dynamically */ 2394 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK)); 2395 2396 /* don't handle FIFO overrun/underruns (just yet), 2397 * since they cause machine lockups 2398 */ 2399 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); 2400 2401 return 0; 2402 } 2403 2404 static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) 2405 { 2406 int err; 2407 struct snd_kcontrol *kctl; 2408 2409 if (snd_BUG_ON(!ice->pcm)) 2410 return -EIO; 2411 2412 if (!ice->own_routing) { 2413 err = snd_ctl_add(ice->card, 2414 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); 2415 if (err < 0) 2416 return err; 2417 } 2418 2419 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); 2420 if (err < 0) 2421 return err; 2422 2423 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice)); 2424 if (err < 0) 2425 return err; 2426 kctl->id.device = ice->pcm->device; 2427 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice)); 2428 if (err < 0) 2429 return err; 2430 kctl->id.device = ice->pcm->device; 2431 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice)); 2432 if (err < 0) 2433 return err; 2434 kctl->id.device = ice->pcm->device; 2435 #if 0 /* use default only */ 2436 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice)); 2437 if (err < 0) 2438 return err; 2439 kctl->id.device = ice->pcm->device; 2440 ice->spdif.stream_ctl = kctl; 2441 #endif 2442 return 0; 2443 } 2444 2445 2446 static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice) 2447 { 2448 int err; 2449 2450 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); 2451 if (err < 0) 2452 return err; 2453 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); 2454 if (err < 0) 2455 return err; 2456 2457 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); 2458 if (err < 0) 2459 return err; 2460 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); 2461 if (err < 0) 2462 return err; 2463 2464 if (!ice->own_routing && ice->num_total_dacs > 0) { 2465 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; 2466 tmp.count = ice->num_total_dacs; 2467 if (ice->vt1720 && tmp.count > 2) 2468 tmp.count = 2; 2469 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2470 if (err < 0) 2471 return err; 2472 } 2473 2474 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); 2475 if (err < 0) 2476 return err; 2477 2478 return 0; 2479 } 2480 2481 static int snd_vt1724_free(struct snd_ice1712 *ice) 2482 { 2483 if (!ice->port) 2484 goto __hw_end; 2485 /* mask all interrupts */ 2486 outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); 2487 outb(0xff, ICEREG1724(ice, IRQMASK)); 2488 /* --- */ 2489 __hw_end: 2490 if (ice->irq >= 0) 2491 free_irq(ice->irq, ice); 2492 pci_release_regions(ice->pci); 2493 snd_ice1712_akm4xxx_free(ice); 2494 pci_disable_device(ice->pci); 2495 kfree(ice->spec); 2496 kfree(ice); 2497 return 0; 2498 } 2499 2500 static int snd_vt1724_dev_free(struct snd_device *device) 2501 { 2502 struct snd_ice1712 *ice = device->device_data; 2503 return snd_vt1724_free(ice); 2504 } 2505 2506 static int __devinit snd_vt1724_create(struct snd_card *card, 2507 struct pci_dev *pci, 2508 const char *modelname, 2509 struct snd_ice1712 **r_ice1712) 2510 { 2511 struct snd_ice1712 *ice; 2512 int err; 2513 static struct snd_device_ops ops = { 2514 .dev_free = snd_vt1724_dev_free, 2515 }; 2516 2517 *r_ice1712 = NULL; 2518 2519 /* enable PCI device */ 2520 err = pci_enable_device(pci); 2521 if (err < 0) 2522 return err; 2523 2524 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2525 if (ice == NULL) { 2526 pci_disable_device(pci); 2527 return -ENOMEM; 2528 } 2529 ice->vt1724 = 1; 2530 spin_lock_init(&ice->reg_lock); 2531 mutex_init(&ice->gpio_mutex); 2532 mutex_init(&ice->open_mutex); 2533 mutex_init(&ice->i2c_mutex); 2534 ice->gpio.set_mask = snd_vt1724_set_gpio_mask; 2535 ice->gpio.get_mask = snd_vt1724_get_gpio_mask; 2536 ice->gpio.set_dir = snd_vt1724_set_gpio_dir; 2537 ice->gpio.get_dir = snd_vt1724_get_gpio_dir; 2538 ice->gpio.set_data = snd_vt1724_set_gpio_data; 2539 ice->gpio.get_data = snd_vt1724_get_gpio_data; 2540 ice->card = card; 2541 ice->pci = pci; 2542 ice->irq = -1; 2543 pci_set_master(pci); 2544 snd_vt1724_proc_init(ice); 2545 synchronize_irq(pci->irq); 2546 2547 card->private_data = ice; 2548 2549 err = pci_request_regions(pci, "ICE1724"); 2550 if (err < 0) { 2551 kfree(ice); 2552 pci_disable_device(pci); 2553 return err; 2554 } 2555 ice->port = pci_resource_start(pci, 0); 2556 ice->profi_port = pci_resource_start(pci, 1); 2557 2558 if (request_irq(pci->irq, snd_vt1724_interrupt, 2559 IRQF_SHARED, KBUILD_MODNAME, ice)) { 2560 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 2561 snd_vt1724_free(ice); 2562 return -EIO; 2563 } 2564 2565 ice->irq = pci->irq; 2566 2567 snd_vt1724_chip_reset(ice); 2568 if (snd_vt1724_read_eeprom(ice, modelname) < 0) { 2569 snd_vt1724_free(ice); 2570 return -EIO; 2571 } 2572 if (snd_vt1724_chip_init(ice) < 0) { 2573 snd_vt1724_free(ice); 2574 return -EIO; 2575 } 2576 2577 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2578 if (err < 0) { 2579 snd_vt1724_free(ice); 2580 return err; 2581 } 2582 2583 snd_card_set_dev(card, &pci->dev); 2584 2585 *r_ice1712 = ice; 2586 return 0; 2587 } 2588 2589 2590 /* 2591 * 2592 * Registration 2593 * 2594 */ 2595 2596 static int __devinit snd_vt1724_probe(struct pci_dev *pci, 2597 const struct pci_device_id *pci_id) 2598 { 2599 static int dev; 2600 struct snd_card *card; 2601 struct snd_ice1712 *ice; 2602 int pcm_dev = 0, err; 2603 struct snd_ice1712_card_info * const *tbl, *c; 2604 2605 if (dev >= SNDRV_CARDS) 2606 return -ENODEV; 2607 if (!enable[dev]) { 2608 dev++; 2609 return -ENOENT; 2610 } 2611 2612 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card); 2613 if (err < 0) 2614 return err; 2615 2616 strcpy(card->driver, "ICE1724"); 2617 strcpy(card->shortname, "ICEnsemble ICE1724"); 2618 2619 err = snd_vt1724_create(card, pci, model[dev], &ice); 2620 if (err < 0) { 2621 snd_card_free(card); 2622 return err; 2623 } 2624 2625 /* field init before calling chip_init */ 2626 ice->ext_clock_count = 0; 2627 2628 for (tbl = card_tables; *tbl; tbl++) { 2629 for (c = *tbl; c->name; c++) { 2630 if ((model[dev] && c->model && 2631 !strcmp(model[dev], c->model)) || 2632 (c->subvendor == ice->eeprom.subvendor)) { 2633 strcpy(card->shortname, c->name); 2634 if (c->driver) /* specific driver? */ 2635 strcpy(card->driver, c->driver); 2636 if (c->chip_init) { 2637 err = c->chip_init(ice); 2638 if (err < 0) { 2639 snd_card_free(card); 2640 return err; 2641 } 2642 } 2643 goto __found; 2644 } 2645 } 2646 } 2647 c = &no_matched; 2648 __found: 2649 /* 2650 * VT1724 has separate DMAs for the analog and the SPDIF streams while 2651 * ICE1712 has only one for both (mixed up). 2652 * 2653 * Confusingly the analog PCM is named "professional" here because it 2654 * was called so in ice1712 driver, and vt1724 driver is derived from 2655 * ice1712 driver. 2656 */ 2657 ice->pro_rate_default = PRO_RATE_DEFAULT; 2658 if (!ice->is_spdif_master) 2659 ice->is_spdif_master = stdclock_is_spdif_master; 2660 if (!ice->get_rate) 2661 ice->get_rate = stdclock_get_rate; 2662 if (!ice->set_rate) 2663 ice->set_rate = stdclock_set_rate; 2664 if (!ice->set_mclk) 2665 ice->set_mclk = stdclock_set_mclk; 2666 if (!ice->set_spdif_clock) 2667 ice->set_spdif_clock = stdclock_set_spdif_clock; 2668 if (!ice->get_spdif_master_type) 2669 ice->get_spdif_master_type = stdclock_get_spdif_master_type; 2670 if (!ice->ext_clock_names) 2671 ice->ext_clock_names = ext_clock_names; 2672 if (!ice->ext_clock_count) 2673 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names); 2674 2675 if (!ice->hw_rates) 2676 set_std_hw_rates(ice); 2677 2678 err = snd_vt1724_pcm_profi(ice, pcm_dev++); 2679 if (err < 0) { 2680 snd_card_free(card); 2681 return err; 2682 } 2683 2684 err = snd_vt1724_pcm_spdif(ice, pcm_dev++); 2685 if (err < 0) { 2686 snd_card_free(card); 2687 return err; 2688 } 2689 2690 err = snd_vt1724_pcm_indep(ice, pcm_dev++); 2691 if (err < 0) { 2692 snd_card_free(card); 2693 return err; 2694 } 2695 2696 err = snd_vt1724_ac97_mixer(ice); 2697 if (err < 0) { 2698 snd_card_free(card); 2699 return err; 2700 } 2701 2702 err = snd_vt1724_build_controls(ice); 2703 if (err < 0) { 2704 snd_card_free(card); 2705 return err; 2706 } 2707 2708 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ 2709 err = snd_vt1724_spdif_build_controls(ice); 2710 if (err < 0) { 2711 snd_card_free(card); 2712 return err; 2713 } 2714 } 2715 2716 if (c->build_controls) { 2717 err = c->build_controls(ice); 2718 if (err < 0) { 2719 snd_card_free(card); 2720 return err; 2721 } 2722 } 2723 2724 if (!c->no_mpu401) { 2725 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { 2726 struct snd_rawmidi *rmidi; 2727 2728 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi); 2729 if (err < 0) { 2730 snd_card_free(card); 2731 return err; 2732 } 2733 ice->rmidi[0] = rmidi; 2734 rmidi->private_data = ice; 2735 strcpy(rmidi->name, "ICE1724 MIDI"); 2736 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT | 2737 SNDRV_RAWMIDI_INFO_INPUT | 2738 SNDRV_RAWMIDI_INFO_DUPLEX; 2739 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, 2740 &vt1724_midi_output_ops); 2741 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, 2742 &vt1724_midi_input_ops); 2743 2744 /* set watermarks */ 2745 outb(VT1724_MPU_RX_FIFO | 0x1, 2746 ICEREG1724(ice, MPU_FIFO_WM)); 2747 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM)); 2748 /* set UART mode */ 2749 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL)); 2750 } 2751 } 2752 2753 sprintf(card->longname, "%s at 0x%lx, irq %i", 2754 card->shortname, ice->port, ice->irq); 2755 2756 err = snd_card_register(card); 2757 if (err < 0) { 2758 snd_card_free(card); 2759 return err; 2760 } 2761 pci_set_drvdata(pci, card); 2762 dev++; 2763 return 0; 2764 } 2765 2766 static void __devexit snd_vt1724_remove(struct pci_dev *pci) 2767 { 2768 snd_card_free(pci_get_drvdata(pci)); 2769 pci_set_drvdata(pci, NULL); 2770 } 2771 2772 #ifdef CONFIG_PM 2773 static int snd_vt1724_suspend(struct pci_dev *pci, pm_message_t state) 2774 { 2775 struct snd_card *card = pci_get_drvdata(pci); 2776 struct snd_ice1712 *ice = card->private_data; 2777 2778 if (!ice->pm_suspend_enabled) 2779 return 0; 2780 2781 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2782 2783 snd_pcm_suspend_all(ice->pcm); 2784 snd_pcm_suspend_all(ice->pcm_pro); 2785 snd_pcm_suspend_all(ice->pcm_ds); 2786 snd_ac97_suspend(ice->ac97); 2787 2788 spin_lock_irq(&ice->reg_lock); 2789 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice); 2790 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL)); 2791 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG)); 2792 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2793 spin_unlock_irq(&ice->reg_lock); 2794 2795 if (ice->pm_suspend) 2796 ice->pm_suspend(ice); 2797 2798 pci_disable_device(pci); 2799 pci_save_state(pci); 2800 pci_set_power_state(pci, pci_choose_state(pci, state)); 2801 return 0; 2802 } 2803 2804 static int snd_vt1724_resume(struct pci_dev *pci) 2805 { 2806 struct snd_card *card = pci_get_drvdata(pci); 2807 struct snd_ice1712 *ice = card->private_data; 2808 2809 if (!ice->pm_suspend_enabled) 2810 return 0; 2811 2812 pci_set_power_state(pci, PCI_D0); 2813 pci_restore_state(pci); 2814 2815 if (pci_enable_device(pci) < 0) { 2816 snd_card_disconnect(card); 2817 return -EIO; 2818 } 2819 2820 pci_set_master(pci); 2821 2822 snd_vt1724_chip_reset(ice); 2823 2824 if (snd_vt1724_chip_init(ice) < 0) { 2825 snd_card_disconnect(card); 2826 return -EIO; 2827 } 2828 2829 if (ice->pm_resume) 2830 ice->pm_resume(ice); 2831 2832 if (ice->pm_saved_is_spdif_master) { 2833 /* switching to external clock via SPDIF */ 2834 ice->set_spdif_clock(ice, 0); 2835 } else { 2836 /* internal on-card clock */ 2837 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 2838 } 2839 2840 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); 2841 2842 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG)); 2843 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK)); 2844 2845 if (ice->ac97) 2846 snd_ac97_resume(ice->ac97); 2847 2848 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2849 return 0; 2850 } 2851 #endif 2852 2853 static struct pci_driver driver = { 2854 .name = KBUILD_MODNAME, 2855 .id_table = snd_vt1724_ids, 2856 .probe = snd_vt1724_probe, 2857 .remove = __devexit_p(snd_vt1724_remove), 2858 #ifdef CONFIG_PM 2859 .suspend = snd_vt1724_suspend, 2860 .resume = snd_vt1724_resume, 2861 #endif 2862 }; 2863 2864 static int __init alsa_card_ice1724_init(void) 2865 { 2866 return pci_register_driver(&driver); 2867 } 2868 2869 static void __exit alsa_card_ice1724_exit(void) 2870 { 2871 pci_unregister_driver(&driver); 2872 } 2873 2874 module_init(alsa_card_ice1724_init) 2875 module_exit(alsa_card_ice1724_exit) 2876